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Publication years (Num. hits)
2005 (1) 2009 (4) 2010 (1) 2014 (2) 2015 (1)
Publication types (Num. hits)
inproceedings(9)
Venues (Conferences, Journals, ...)
ISQED(2) MICRO(2) CICC(1) DATE(1) ISCA(1) ISLPED(1) SoCC(1)
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Found 9 publication records. Showing 9 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
71Jaume Abella 0001, Javier Carretero, Pedro Chaparro, Xavier Vera, Antonio González 0001 Low Vccmin fault-tolerant cache with highly predictable performance. Search on Bibsonomy MICRO The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Vccmin, cache, faults, predictable performance
53Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Wei Wu 0024, Shih-Lien Lu Improving cache lifetime reliability at ultra-low voltages. Search on Bibsonomy MICRO The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
39Michail Mavropoulos, Georgios Keramidas, Dimitris Nikolos A defect-aware reconfigurable cache architecture for low-vccmin DVFS-enabled systems. Search on Bibsonomy DATE The full citation details ... 2015 DBLP  BibTeX  RDF
39Sang H. Dhong, Richard Guo, Ming-Zhang Kuo, Ping-Lin Yang, Cheng-Chung Lin, Kevin Huang 0005, Min-Jer Wang, Wei Hwang A 0.42V Vccmin ASIC-compatible pulse-latch solution as a replacement for a traditional master-slave flip-flop in a digital SOC. Search on Bibsonomy CICC The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
39Hiroyuki Yamauchi, Worawit Somha Errors in solving inverse problem for reversing RTN effects on VCCmin shift in SRAM reliability screening test designs. Search on Bibsonomy SoCC The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
33Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chishti, Wei Wu 0024, Dinesh Somasekhar, Shih-Lien Lu Reducing cache power with low-cost, multi-bit error-correcting codes. Search on Bibsonomy ISCA The full citation details ... 2010 DBLP  DOI  BibTeX  RDF ecc, edram, idle power, idle states, multi-bit ecc, refresh power, vccmin, dram
26Seung Eun Lee, Chris Wilkerson, Ming Zhang, Rajendra S. Yavatkar, Shih-Lien Lu, Nader Bagherzadeh Low power adaptive pipeline based on instruction isolation. Search on Bibsonomy ISQED The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
26S. Lakshminarayanan, J. Joung, Giri Narasimhan, Ravi Kapre, M. Slanina, J. Tung, Morgan Whately, C.-L. Hou, W.-J. Liao, S.-C. Lin, P.-G. Ma, C.-W. Fan, M.-C. Hsieh, F.-C. Liu, K.-L. Yeh, W.-C. Tseng, S. W. Lu Standby power reduction and SRAM cell optimization for 65nm technology. Search on Bibsonomy ISQED The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
26Rabiul Islam, Adam Brand, Dave Lippincott Low power SRAM techniques for handheld products. Search on Bibsonomy ISLPED The full citation details ... 2005 DBLP  DOI  BibTeX  RDF back-bias, bitcell, memory, leakage
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