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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 23 occurrences of 20 keywords
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Results
Found 21 publication records. Showing 21 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
46 | Fabio Cancare, Marco D. Santambrogio, Donatella Sciuto |
A direct bitstream manipulation approach for Virtex4-based evolvable systems. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
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36 | Priya Sundararajan, Aman Gayasen, Narayanan Vijaykrishnan, Tim Tuan |
Thermal characterization and optimization in platform FPGAs. |
ICCAD |
2006 |
DBLP DOI BibTeX RDF |
Virtex4, platform FPGAs, thermal floorplan, placement, temperature, thermal |
20 | Jason Cong, Yiping Fan, Junjuan Xu |
Simultaneous resource binding and interconnection optimization based on a distributed register-file microarchitecture. |
ACM Trans. Design Autom. Electr. Syst. |
2009 |
DBLP DOI BibTeX RDF |
distributed register file, Behavioral synthesis, resource binding |
20 | Dimitris Theodoropoulos, Catalin Bogdan Ciobanu, Georgi Kuzmanov |
Wave field synthesis for 3D audio: architectural prospectives. |
Conf. Computing Frontiers |
2009 |
DBLP DOI BibTeX RDF |
general purpose GPU computing, reconfigurable computing, 3D audio, wave field synthesis |
20 | Ioannis Sourdis, João Bispo, João M. P. Cardoso, Stamatis Vassiliadis |
Regular Expression Matching in Reconfigurable Hardware. |
J. Signal Process. Syst. |
2008 |
DBLP DOI BibTeX RDF |
network security, pattern matching, regular expression, reconfigurable hardware |
20 | Jean-Baptiste Note, Éric Rannaud |
From the bitstream to the netlist. |
FPGA |
2008 |
DBLP DOI BibTeX RDF |
bitstream format, FPGA, reverse-engineering |
20 | Matthew French, Erik K. Anderson, Dong-In Kang |
Autonomous System on a Chip Adaptation through Partial Runtime Reconfiguration. |
FCCM |
2008 |
DBLP DOI BibTeX RDF |
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20 | Francesco Bruschi, Vincenzo Rana, Donatella Sciuto |
An architecture for dynamically reconfigurable real time audio processing systems. |
ESTIMedia |
2008 |
DBLP DOI BibTeX RDF |
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20 | K. Scott Hemmert, Keith D. Underwood |
Floating-Point Divider Design for FPGAs. |
IEEE Trans. Very Large Scale Integr. Syst. |
2007 |
DBLP DOI BibTeX RDF |
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20 | Chang-Seok Choi, Hanho Lee |
A Partial Self-Reconfigurable Adaptive FIR Filter System. |
SiPS |
2007 |
DBLP DOI BibTeX RDF |
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20 | Christoforos Kachris, Stamatis Vassiliadis |
A reconfigurable platform for multi-service edge routers. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
edge routers, FPGA, reconfigurable logic |
20 | Oleg Maslennikow, Volodymyr Lepekha, Anatoli Sergyienko, Adam Tomas, Roman Wyrzykowski |
Parallel Implementation of Cholesky LLT-Algorithm in FPGA-Based Processor. |
PPAM |
2007 |
DBLP DOI BibTeX RDF |
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20 | Stefan Lemsitzer, Johannes Wolkerstorfer, Norbert Felber, Matthias Braendli |
Multi-gigabit GCM-AES Architecture Optimized for FPGAs. |
CHES |
2007 |
DBLP DOI BibTeX RDF |
Galois/Counter Mode (GCM), hybrid multiplier, Field Programmable Gate Array (FPGA), Very Large Scale Integration (VLSI), Advanced Encryption Standard (AES), high throughput, digit-serial multiplier, bit-parallel multiplier |
20 | Michael Cowell, Adam Postula |
Rachael SPARC: An Open Source 32-bit Microprocessor Core for SoCs. |
DSD |
2006 |
DBLP DOI BibTeX RDF |
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20 | G. Adam Covington, Charles L. G. Comstock, Andrew A. Levine, John W. Lockwood, Young H. Cho |
High Speed Document Clustering in Reconfigurable Hardware. |
FPL |
2006 |
DBLP DOI BibTeX RDF |
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20 | Carlos Morra, M. Sackmann, Sunil Shukla, Jürgen Becker 0001, Reiner W. Hartenstein |
From Equation to VHDL: Using Rewriting Logic for Automated Function Generation. |
FPL |
2006 |
DBLP DOI BibTeX RDF |
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20 | Martin C. Herbordt, Josh Model, Yongfeng Gu, Bharat Sukhwani, Tom Van Court |
Single Pass, BLAST-Like, Approximate String Matching on FPGAs. |
FCCM |
2006 |
DBLP DOI BibTeX RDF |
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20 | Osama Daifallah Al-Khaleel, Christos A. Papachristou, Francis G. Wolff, Kiamal Z. Pekmestzi |
A Large Scale Adaptable Multiplier for Cryptographic Applications. |
AHS |
2006 |
DBLP DOI BibTeX RDF |
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20 | Christoforos Kachris, Stamatis Vassiliadis |
Design of a web switch in a reconfigurable platform. |
ANCS |
2006 |
DBLP DOI BibTeX RDF |
web switch, reconfigurable logic |
20 | Michael Attig, John W. Lockwood |
A framework for rule processing in reconfigurable network systems (abstract only). |
FPGA |
2005 |
DBLP DOI BibTeX RDF |
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20 | Daewook Kim, Manho Kim, Gerald E. Sobelman |
FPGA-Based CDMA Switch for Networks-on-Chip. |
FCCM |
2005 |
DBLP DOI BibTeX RDF |
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