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Searching for Virtex4 with no syntactic query expansion in all metadata.

Publication years (Num. hits)
2005-2008 (18) 2009-2010 (3)
Publication types (Num. hits)
article(3) inproceedings(18)
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The graphs summarize 23 occurrences of 20 keywords

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Found 21 publication records. Showing 21 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
46Fabio Cancare, Marco D. Santambrogio, Donatella Sciuto A direct bitstream manipulation approach for Virtex4-based evolvable systems. Search on Bibsonomy ISCAS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
36Priya Sundararajan, Aman Gayasen, Narayanan Vijaykrishnan, Tim Tuan Thermal characterization and optimization in platform FPGAs. Search on Bibsonomy ICCAD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Virtex4, platform FPGAs, thermal floorplan, placement, temperature, thermal
20Jason Cong, Yiping Fan, Junjuan Xu Simultaneous resource binding and interconnection optimization based on a distributed register-file microarchitecture. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF distributed register file, Behavioral synthesis, resource binding
20Dimitris Theodoropoulos, Catalin Bogdan Ciobanu, Georgi Kuzmanov Wave field synthesis for 3D audio: architectural prospectives. Search on Bibsonomy Conf. Computing Frontiers The full citation details ... 2009 DBLP  DOI  BibTeX  RDF general purpose GPU computing, reconfigurable computing, 3D audio, wave field synthesis
20Ioannis Sourdis, João Bispo, João M. P. Cardoso, Stamatis Vassiliadis Regular Expression Matching in Reconfigurable Hardware. Search on Bibsonomy J. Signal Process. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF network security, pattern matching, regular expression, reconfigurable hardware
20Jean-Baptiste Note, Éric Rannaud From the bitstream to the netlist. Search on Bibsonomy FPGA The full citation details ... 2008 DBLP  DOI  BibTeX  RDF bitstream format, FPGA, reverse-engineering
20Matthew French, Erik K. Anderson, Dong-In Kang Autonomous System on a Chip Adaptation through Partial Runtime Reconfiguration. Search on Bibsonomy FCCM The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
20Francesco Bruschi, Vincenzo Rana, Donatella Sciuto An architecture for dynamically reconfigurable real time audio processing systems. Search on Bibsonomy ESTIMedia The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
20K. Scott Hemmert, Keith D. Underwood Floating-Point Divider Design for FPGAs. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
20Chang-Seok Choi, Hanho Lee A Partial Self-Reconfigurable Adaptive FIR Filter System. Search on Bibsonomy SiPS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
20Christoforos Kachris, Stamatis Vassiliadis A reconfigurable platform for multi-service edge routers. Search on Bibsonomy SBCCI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF edge routers, FPGA, reconfigurable logic
20Oleg Maslennikow, Volodymyr Lepekha, Anatoli Sergyienko, Adam Tomas, Roman Wyrzykowski Parallel Implementation of Cholesky LLT-Algorithm in FPGA-Based Processor. Search on Bibsonomy PPAM The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
20Stefan Lemsitzer, Johannes Wolkerstorfer, Norbert Felber, Matthias Braendli Multi-gigabit GCM-AES Architecture Optimized for FPGAs. Search on Bibsonomy CHES The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Galois/Counter Mode (GCM), hybrid multiplier, Field Programmable Gate Array (FPGA), Very Large Scale Integration (VLSI), Advanced Encryption Standard (AES), high throughput, digit-serial multiplier, bit-parallel multiplier
20Michael Cowell, Adam Postula Rachael SPARC: An Open Source 32-bit Microprocessor Core for SoCs. Search on Bibsonomy DSD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
20G. Adam Covington, Charles L. G. Comstock, Andrew A. Levine, John W. Lockwood, Young H. Cho High Speed Document Clustering in Reconfigurable Hardware. Search on Bibsonomy FPL The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
20Carlos Morra, M. Sackmann, Sunil Shukla, Jürgen Becker 0001, Reiner W. Hartenstein From Equation to VHDL: Using Rewriting Logic for Automated Function Generation. Search on Bibsonomy FPL The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
20Martin C. Herbordt, Josh Model, Yongfeng Gu, Bharat Sukhwani, Tom Van Court Single Pass, BLAST-Like, Approximate String Matching on FPGAs. Search on Bibsonomy FCCM The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
20Osama Daifallah Al-Khaleel, Christos A. Papachristou, Francis G. Wolff, Kiamal Z. Pekmestzi A Large Scale Adaptable Multiplier for Cryptographic Applications. Search on Bibsonomy AHS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
20Christoforos Kachris, Stamatis Vassiliadis Design of a web switch in a reconfigurable platform. Search on Bibsonomy ANCS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF web switch, reconfigurable logic
20Michael Attig, John W. Lockwood A framework for rule processing in reconfigurable network systems (abstract only). Search on Bibsonomy FPGA The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
20Daewook Kim, Manho Kim, Gerald E. Sobelman FPGA-Based CDMA Switch for Networks-on-Chip. Search on Bibsonomy FCCM The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
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