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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 2 occurrences of 2 keywords
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Results
Found 6 publication records. Showing 6 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
37 | André Silva, Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Marcelo Schiavon Porto, Sergio Bampi |
High performance motion estimation architecture using efficient adder-compressors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, SBCCI 2009, Natal, Brazil, August 31 - September 3, 2009, 2009, ACM, 978-1-60558-705-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
adder-compressor, motion estimation, fast algorithm |
29 | Gerson D. Andrade, Matheus Silva, Cínthia Schneider, Guilherme Paim, Sergio Bampi, Eduardo Costa 0001, Alexandra L. Zimpeck |
Robustness Analysis of 3-2 Adder Compressor Designed in 7-nm FinFET Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 70(3), pp. 1264-1268, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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29 | Thomas V. Fontanari, Guilherme Paim, Leandro M. G. Rocha, Patrícia Ücker, Eduardo A. C. da Costa, Sergio Bampi |
An Efficient N-bit 8-2 Adder Compressor with a Constant Internal Carry Propagation Delay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LASCAS ![In: 11th IEEE Latin American Symposium on Circuits & Systems, LASCAS 2020, San Jose, Costa Rica, February 25-28, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-3427-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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29 | Ming Ming Wong, Vikramkumar Pudi, Anupam Chattopadhyay |
Lightweight and High Performance SHA-256 using Architectural Folding and 4-2 Adder Compressor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8-10, 2018, pp. 95-100, 2018, IEEE, 978-1-5386-4756-1. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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29 | Raunak R. Lahoti, Shantanu Agarwal, S. Balamurugan 0001, R. Marimuthu 0001 |
Realization of 2-D DCT Using Adder Compressor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SocProS (2) ![In: Soft Computing for Problem Solving - SocProS 2018, Volume 2, VIT Vellore, India, December 17-19, 2018., pp. 575-580, 2018, Springer, 978-981-15-0183-8. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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29 | Raphael Dornelles, Guilherme Paim, Bianca Silveira, Mateus Fonseca, Eduardo A. C. da Costa, Sergio Bampi |
A power-efficient 4-2 Adder Compressor topology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NEWCAS ![In: 15th IEEE International New Circuits and Systems Conference, NEWCAS 2017, Strasbourg, France, June 25-28, 2017, pp. 281-284, 2017, IEEE, 978-1-5090-4991-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
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