Search results for "address-event"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
65	Thiago Teixeira, Eugenio Culurciello, Joon Hyuk Park, Dimitrios Lymberopoulos, Andrew Barton-Sweeney, Andreas Savvides	Address-event imagers for sensor networks: evaluation and modeling.	IPSN	2006	DBLP DOI BibTeX RDF	address-event, imager sensor networks, camera sensor networks
28	Daniel Bernhard Fasnacht, Adrian M. Whatley, Giacomo Indiveri	A serial communication infrastructure for multi-chip address event systems.	ISCAS	2008	DBLP DOI BibTeX RDF
28	Vladimir Brajovic	Lossless non-arbitrated address-event coding.	ISCAS (5)	2003	DBLP DOI BibTeX RDF
26	Alejandro Linares-Barranco, Gabriel Jiménez-Moreno, Bernabé Linares-Barranco, Antón Civit Balcells	On algorithmic rate-coded AER generation.	IEEE Trans. Neural Networks	2006	DBLP DOI BibTeX RDF
25	André van Schaik, Shih-Chii Liu	AER EAR: a matched silicon cochlea pair with address event representation interface.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
24	John Lazzaro, John Wawrzynek	A multi-sender asynchronous extension to the AER protocol.	ARVLSI	1995	DBLP DOI BibTeX RDF	multi-sender extension, AER, address-event representation, asynchronous point-to-point communications protocol, silicon neural systems, protocols, neural chips
24	Simeon A. Bamford, Alan F. Murray, David J. Willshaw	Large developing axonal arbors using a distributed and locally-reprogrammable address-event receiver.	IJCNN	2008	DBLP DOI BibTeX RDF
23	Raphael Berner, Tobi Delbrück, Antón Civit Balcells, Alejandro Linares-Barranco	A 5 Meps $100 USB2.0 Address-Event Monitor-Sequencer Interface.	ISCAS	2007	DBLP DOI BibTeX RDF
23	Eugenio Culurciello, Ralph Etienne-Cummings, Kwabena Boahen 0001	High dynamic range, arbitrated address event representation digital imager.	ISCAS (3)	2001	DBLP DOI BibTeX RDF
22	Harry L. Hu, Amine Bermak, Dominique Martinez	A New Video Compression Scheme Combining Conditional Replenishment and Address Event Representation.	SiPS	2007	DBLP DOI BibTeX RDF
22	Eugenio Culurciello, Andreas Savvides	Address-event image sensor network.	ISCAS	2006	DBLP DOI BibTeX RDF
22	Thiago Teixeira, Eugenio Culurciello, Andreas G. Andreou	An Address-Event Image Sensor Network.	ISCAS	2006	DBLP DOI BibTeX RDF
22	Mehdi Azadmehr, Jens Petter Abrahamsen, Philipp Häfliger	A foveated AER imager chip [address event representation].	ISCAS (3)	2005	DBLP DOI BibTeX RDF
20	Angel Jiménez-Fernandez, Carlos Daniel Luján-Martinez, Rafael Paz-Vicente, Alejandro Linares-Barranco, Gabriel Jiménez-Moreno, Antonio Abad Civit Balcells	From Vision Sensor to Actuators, Spike Based Robot Control through Address-Event-Representation.	IWANN (1)	2009	DBLP DOI BibTeX RDF
20	Zhengming Fu, Eugenio Culurciello, Patrick Lichtsteiner, Tobi Delbrück	Fall detection using an address-event temporal contrast vision sensor.	ISCAS	2008	DBLP DOI BibTeX RDF
20	Eugenio Culurciello, Joon Hyuk Park, Andreas Savvides	Address-Event Video Streaming over Wireless Sensor Networks.	ISCAS	2007	DBLP DOI BibTeX RDF
20	Rafael Paz, Francisco Gomez-Rodriguez, M. A. Rodriguez, Alejandro Linares-Barranco, Gabriel Jiménez, Antón Civit	Test Infrastructure for Address-Event-Representation Communications.	IWANN	2005	DBLP DOI BibTeX RDF
20	Manuel Rivas, Francisco Gomez-Rodriguez, Rafael Paz, Alejandro Linares-Barranco, Saturnino Vicente Diaz, D. Cascado	Tools for Address-Event-Representation Communication Systems and Debugging.	ICANN (1)	2005	DBLP DOI BibTeX RDF
20	Alejandro Linares-Barranco, Gabriel Jiménez, Antón Civit, Bernabé Linares-Barranco	Synthetic Generation of Events for Address-Event-Representation Communications.	PATMOS	2002	DBLP DOI BibTeX RDF
20	Kwabena Boahen 0001	A Throughput-On-Demand Address-Event Transmitter for Neuromorphic Chips.	ARVLSI	1999	DBLP DOI BibTeX RDF	Address-Events, Retinomorphic, VLSI, TDMA, Spiking Neurons, CMOS Imager, Neuromorphic
20	Madhuvanthi Srivatsav R, Shantanu Chakrabartty, Chetan Singh Thakur	Neuromorphic Computing With Address-Event-Representation Using Time-to-Event Margin Propagation.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2023	DBLP DOI BibTeX RDF
20	Luis A. Camuñas-Mesa, Antonio Acosta-Jimenez, Carlos Zamarreño-Ramos, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco	A 32, times, 32 Pixel Convolution Processor Chip for Address Event Vision Sensors With 155 ns Event Latency and 20 Meps Throughput.	IEEE Trans. Circuits Syst. I Regul. Pap.	2011	DBLP DOI BibTeX RDF
20	Jürgen Kogler, Martin Humenberger, Christoph Sulzbachner	Event-Based Stereo Matching Approaches for Frameless Address Event Stereo Data.	ISVC (1)	2011	DBLP DOI BibTeX RDF
15	R. Jacob Vogelstein, Udayan Mallik, Joshua T. Vogelstein, Gert Cauwenberghs	Dynamically Reconfigurable Silicon Array of Spiking Neurons With Conductance-Based Synapses.	IEEE Trans. Neural Networks	2007	DBLP DOI BibTeX RDF
15	Jinsong Wei, Jilin Zhang, Xumeng Zhang, Zuheng Wu, Rui Wang, Jian Lu, Tuo Shi, Mansun Chan, Qi Liu 0010, Hong Chen 0002	A neuromorphic core based on threshold switching memristor with asynchronous address event representation circuits.	Sci. China Inf. Sci.	2022	DBLP DOI BibTeX RDF
15	Zhaoxin Liu, Bangbo Huang, Jinjian Wu, Guangming Shi	Lightweight Convolutional SNN for Address Event Representation Signal Recognition.	CICAI	2021	DBLP DOI BibTeX RDF
15	Prafull Purohit, Rajit Manohar	Hierarchical Token Rings for Address-Event Encoding.	ASYNC	2021	DBLP DOI BibTeX RDF
15	Sharu Theresa Jose, Osvaldo Simeone	Address-Event Variable-Length Compression for Time-Encoded Data.	CoRR	2020	DBLP BibTeX RDF
15	Jongkil Park, Sang-Don Jung	Presynaptic Spike-Driven Spike Timing-Dependent Plasticity With Address Event Representation for Large-Scale Neuromorphic Systems.	IEEE Trans. Circuits Syst. I Regul. Pap.	2020	DBLP DOI BibTeX RDF
15	Sharu Theresa Jose, Osvaldo Simeone	Address-Event Variable-Length Compression for Time-Encoded Data.	ISITA	2020	DBLP BibTeX RDF
15	Ning Qiao, Giacomo Indiveri	A bi-directional Address-Event transceiver block for low-latency inter-chip communication in neuromorphic systems.	CoRR	2019	DBLP BibTeX RDF
15	Ning Qiao, Giacomo Indiveri	A clock-less ultra-low power bit-serial LVDS link for Address-Event multi-chip systems.	CoRR	2019	DBLP BibTeX RDF
15	Pablo Negri	Shapes Characterization on Address Event Representation Using Histograms of Oriented Events and an Extended LBP Approach.	CoRR	2018	DBLP BibTeX RDF
15	Ning Qiao, Giacomo Indiveri	A Clock-Less Ultra-Low Power Bit-Serial LVDS Link for Address-Event Multi-chip Systems.	ASYNC	2018	DBLP DOI BibTeX RDF
15	Ning Qiao, Giacomo Indiveri	A bi-directional Address-Event transceiver block for low-latency inter-chip communication in neuromorphic systems.	ISCAS	2018	DBLP DOI BibTeX RDF
15	Mireya Zapata, Janio Jadán, Jordi Madrenas	Efficient Configuration for a Scalable Spiking Neural Network Platform by means of a Synchronous Address Event Representation bus.	AHS	2018	DBLP DOI BibTeX RDF
15	Jongkil Park, Theodore Yu, Siddharth Joshi, Christoph Maier, Gert Cauwenberghs	Hierarchical Address Event Routing for Reconfigurable Large-Scale Neuromorphic Systems.	IEEE Trans. Neural Networks Learn. Syst.	2017	DBLP DOI BibTeX RDF
15	Bongki Son, Yunjae Suh, Sungho Kim, Heejae Jung, Jun-Seok Kim, Chang-Woo Shin, Keunju Park, Kyoobin Lee, Jin Man Park, Jooyeon Woo, Yohan Roh, Hyunku Lee, Yibing Michelle Wang, Ilia A. Ovsiannikov, Hyunsurk Ryu	4.1 A 640×480 dynamic vision sensor with a 9µm pixel and 300Meps address-event representation.	ISSCC	2017	DBLP DOI BibTeX RDF
15	Alfio Di Mauro, Francesco Conti 0001, Luca Benini	An Ultra-Low Power Address-Event Sensor Interface for Energy-Proportional Time-to-Information Extraction.	DAC	2017	DBLP DOI BibTeX RDF
15	Taho Dorta, Mireya Zapata, Jordi Madrenas, Giovanny Sánchez	AER-SRT: Scalable spike distribution by means of synchronous serial ring topology address event representation.	Neurocomputing	2016	DBLP DOI BibTeX RDF
15	Hongjie Zhu, Milin Zhang 0001, Yuanming Suo, Trac D. Tran, Jan Van der Spiegel	Design of a Digital Address-Event Triggered Compressive Acquisition Image Sensor.	IEEE Trans. Circuits Syst. I Regul. Pap.	2016	DBLP DOI BibTeX RDF
15	Jiangtao Xu, Mengxing Zhang, Shi Yan, Suying Yao	A Method to Solve the Side Effects of Dual-Line Timed Address Event Vision System.	J. Circuits Syst. Comput.	2015	DBLP DOI BibTeX RDF
15	Luma Issa Abdul-Kreem, Heiko Neumann	Bio-inspired Model for Motion Estimation using an Address-event Representation.	VISAPP (3)	2015	DBLP DOI BibTeX RDF
15	Paolo Motto Ros, Marco Paleari, Nicolo Celadon, Alessandro Sanginario, Alberto Bonanno, Marco Crepaldi, Paolo Ariano, Danilo Demarchi	A wireless address-event representation system for ATC-based multi-channel force wireless transmission.	IWASI	2013	DBLP DOI BibTeX RDF
15	Shoushun Chen, Polina Akselrod, Bo Zhao 0018, José Antonio Pérez-Carrasco, Bernabé Linares-Barranco, Eugenio Culurciello	Efficient Feedforward Categorization of Objects and Human Postures with Address-Event Image Sensors.	IEEE Trans. Pattern Anal. Mach. Intell.	2012	DBLP DOI BibTeX RDF
15	Antonio Rios, Cristina Conde, Isaac Martín de Diego, Enrique Cabello	Detection system from the driver's hands based on Address Event Representation (AER).	CompIMAGE	2012	DBLP DOI BibTeX RDF
15	Theodore Yu, Jongkil Park, Siddharth Joshi, Christoph Maier, Gert Cauwenberghs	65k-neuron integrate-and-fire array transceiver with address-event reconfigurable synaptic routing.	BioCAS	2012	DBLP DOI BibTeX RDF
15	Jongkil Park, Theodore Yu, Christoph Maier, Siddharth Joshi, Gert Cauwenberghs	Live demonstration: Hierarchical Address-Event Routing architecture for reconfigurable large scale neuromorphic systems.	ISCAS	2012	DBLP DOI BibTeX RDF
15	Kshitij Dhoble, Nuttapod Nuntalid, Giacomo Indiveri, Nikola K. Kasabov	Online spatio-temporal pattern recognition with evolving spiking neural networks utilising address event representation, rank order, and temporal spike learning.	IJCNN	2012	DBLP DOI BibTeX RDF
15	Ahmed Nabil Belbachir, Michael Hofstätter, Martin Litzenberger, Peter Schön	High-Speed Embedded-Object Analysis Using a Dual-Line Timed-Address-Event Temporal-Contrast Vision Sensor.	IEEE Trans. Ind. Electron.	2011	DBLP DOI BibTeX RDF
15	Francisco Gómez-Rodríguez, Lourdes Miro-Amarante, Manuel Rivas, Gabriel Jiménez, Fernando Díaz-del-Río	Neuromorphic Real-Time Objects Tracking Using Address Event Representation and Silicon Retina.	IWANN (1)	2011	DBLP DOI BibTeX RDF
15	Nabil Imam, Rajit Manohar	Address-Event Communication Using Token-Ring Mutual Exclusion.	ASYNC	2011	DBLP DOI BibTeX RDF
15	Fernando Perez-Peña, Arturo Morgado Estevez, Rafael J. Montero-Gonzalez, Alejandro Linares-Barranco, Gabriel Jiménez-Moreno	Video Surveillance at an Industrial Environment using an Address Event Vision Sensor - Comparative between Two Different Video Sensor based on a Bioinspired Retina.	SIGMAP	2011	DBLP BibTeX RDF
15	Manuel Domínguez-Morales, Elena Cerezuela-Escudero, Angel Jiménez-Fernandez, Rafael Paz-Vicente, Juan Luis Font-Calvo, Pablo Iñigo-Blasco, Alejandro Linares-Barranco, Gabriel Jiménez-Moreno	Image Matching Algorithms in Stereo Vision using Address-event-representation - A Theoretical Study and Evaluation of the Different Algorithms.	SIGMAP	2011	DBLP BibTeX RDF
15	Michael Hofstätter, Martin Litzenberger, Daniel Matolin, Christoph Posch	Hardware-accelerated address-event processing for high-speed visual object recognition.	ICECS	2011	DBLP DOI BibTeX RDF
15	Denis Guangyin Chen, Amine Bermak, Chi-Ying Tsui	A low-complexity image compression algorithm for Address-Event Representation (AER) PWM image sensors.	ISCAS	2011	DBLP DOI BibTeX RDF
15	Joseph H. Lin, Andreas G. Andreou	A 32×32 single photon avalanche diode imager with delay-insensitive address-event readout.	ISCAS	2011	DBLP DOI BibTeX RDF
15	Manuel Domínguez-Morales, Angel Jiménez-Fernandez, Rafael Paz, Manuel Ramon López-Torres, Elena Cerezuela-Escudero, Alejandro Linares-Barranco, Gabriel Jiménez-Moreno, Arturo Morgado Estevez	An Approach to Distance Estimation with Stereo Vision Using Address-Event-Representation.	ICONIP (1)	2011	DBLP DOI BibTeX RDF
15	Simeon A. Bamford, Alan F. Murray, David J. Willshaw	Large developing receptive fields using a distributed and locally reprogrammable address-event receiver.	IEEE Trans. Neural Networks	2010	DBLP DOI BibTeX RDF
15	Christoph Posch, Daniel Matolin, Rainer Wohlgenannt	A QVGA 143dB dynamic range asynchronous address-event PWM dynamic image sensor with lossless pixel-level video compression.	ISSCC	2010	DBLP DOI BibTeX RDF
15	Michael Hofstätter, Peter Schön, Christoph Posch	A SPARC-compatible general purpose address-event processor with 20-bit l0ns-resolution asynchronous sensor data interface in 0.18μm CMOS.	ISCAS	2010	DBLP DOI BibTeX RDF
15	Chiara Bartolozzi, Giacomo Indiveri	Selective Attention in Multi-Chip Address-Event Systems.	Sensors	2009	DBLP DOI BibTeX RDF
15	Carlos Daniel Luján-Martínez, Alejandro Linares-Barranco, Gabriel Jiménez, Antón Civit	Embedding Multi-Task Address-Event-Representation Computation.	Intelligent Technical Systems	2009	DBLP DOI BibTeX RDF
15	Joseph Lin, Kwabena Boahen 0001	A Delay-Insensitive Address-Event Link.	ASYNC	2009	DBLP DOI BibTeX RDF
15	Paolo Livi, Giacomo Indiveri	A Current-mode Conductance-based Silicon Neuron for Address-event Neuromorphic Systems.	ISCAS	2009	DBLP DOI BibTeX RDF
15	Angel Jiménez-Fernandez, Alejandro Linares-Barranco, Rafael Paz-Vicente, Gabriel Jiménez-Moreno, Raphael Berner	Spike-based control monitoring and analysis with Address Event Representation.	AICCSA	2009	DBLP DOI BibTeX RDF
15	Zhengming Fu, Tobi Delbrück, Patrick Lichtsteiner, Eugenio Culurciello	An Address-Event Fall Detector for Assisted Living Applications.	IEEE Trans. Biomed. Circuits Syst.	2008	DBLP DOI BibTeX RDF
15	Vincent Chan, Craig T. Jin, André van Schaik	An Address-Event Vision Sensor for Multiple Transient Object Detection.	IEEE Trans. Biomed. Circuits Syst.	2007	DBLP DOI BibTeX RDF
15	Vincent Chan, Shih-Chii Liu, André van Schaik	AER EAR: A Matched Silicon Cochlea Pair With Address Event Representation Interface.	IEEE Trans. Circuits Syst. I Regul. Pap.	2007	DBLP DOI BibTeX RDF
15	Stephan Schraml, Peter Schön, Nenad Milosevic	Smartcam for real-time stereo vision - address-event based embedded system.	VISAPP (2)	2007	DBLP BibTeX RDF
15	Kwabena A. Boahen	A burst-mode word-serial address-event link-III: analysis and test results.	IEEE Trans. Circuits Syst. I Regul. Pap.	2004	DBLP DOI BibTeX RDF
15	Kwabena A. Boahen	A burst-mode word-serial address-event link-I: transmitter design.	IEEE Trans. Circuits Syst. I Regul. Pap.	2004	DBLP DOI BibTeX RDF
15	Kwabena A. Boahen	A burst-mode word-serial address-event link-II: receiver design.	IEEE Trans. Circuits Syst. I Regul. Pap.	2004	DBLP DOI BibTeX RDF
15	Thomas Y. W. Choi, Bertram E. Shi, Kwabena A. Boahen	An ON-OFF orientation selective address event representation image transceiver chip.	IEEE Trans. Circuits Syst. I Regul. Pap.	2004	DBLP DOI BibTeX RDF
15	Patrick Lichtsteiner, Tobi Delbrück, Jörg Kramer	Improved ON/OFF temporally differentiating address-event imager.	ICECS	2004	DBLP DOI BibTeX RDF
15	R. Jacob Vogelstein, Udayan Mallik, Eugenio Culurciello, Ralph Etienne-Cummings, Gert Cauwenberghs	Spatial acuity modulation of an address-event imager.	ICECS	2004	DBLP DOI BibTeX RDF
15	R. Jacob Vogelstein, Udayan Mallik, Gert Cauwenberghs	Silicon spike-based synaptic array and address-event transceiver.	ISCAS (5)	2004	DBLP BibTeX RDF
15	Eugenio Culurciello, Andreas G. Andreou	A comparative study of access topologies for chip-level address-event communication channels.	IEEE Trans. Neural Networks	2003	DBLP DOI BibTeX RDF
14	David H. Goldberg, Gert Cauwenberghs, Andreas G. Andreou	Analog VLSI spiking neural network with address domain probabilistic synapses.	ISCAS (3)	2001	DBLP DOI BibTeX RDF
13	Carlos Daniel Luján-Martinez, Alejandro Linares-Barranco, Angel Jiménez-Fernandez, Gabriel Jiménez-Moreno, Antón Civit Balcells	Multi-task Implementation for Image Reconstruction of an AER Communication.	IWANN	2007	DBLP DOI BibTeX RDF
11	Patricia Derler, Edward A. Lee, Slobodan Matic	Simulation and Implementation of the PTIDES Programming Model.	DS-RT	2008	DBLP DOI BibTeX RDF
11	Lourdes Miro-Amarante, Angel Jiménez-Fernandez, Alejandro Linares-Barranco, Francisco Gomez-Rodriguez, Rafael Paz, Gabriel Jiménez, Antón Civit, Rafael Serrano-Gotarredona	LVDS Serial AER Link performance.	ISCAS	2007	DBLP DOI BibTeX RDF
11	Tobi Delbrück, Patrick Lichtsteiner	Fast sensory motor control based on event-based hybrid neuromorphic-procedural system.	ISCAS	2007	DBLP DOI BibTeX RDF
10	Vincent Chan, André van Schaik, Shih-Chii Liu	Spike response properties of an AER EAR.	ISCAS	2006	DBLP DOI BibTeX RDF
8	Holger Ziekow	Exploiting Process Knowledge for Event Processing in Distributed Business Applications.	OTM Workshops	2009	DBLP DOI BibTeX RDF
8	José Antonio Pérez-Carrasco, Carmen Serrano-Gotarredona, Begoña Acha-Piñero, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco	Advanced Vision Processing Systems: Spike-Based Simulation and Processing.	ACIVS	2009	DBLP DOI BibTeX RDF
8	José Antonio Pérez-Carrasco, Carmen Serrano, Begoña Acha, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco	Event based vision sensing and processing.	ICIP	2008	DBLP DOI BibTeX RDF
8	Jenny Anna Maria Olsson, Philipp Häfliger	Two color asynchronous event photo pixel.	ISCAS	2008	DBLP DOI BibTeX RDF
8	Francisco Gomez-Rodriguez, Alejandro Linares-Barranco, Lourdes Miro-Amarante, Shih-Chii Liu, André van Schaik, Ralph Etienne-Cummings, M. Anthony Lewis	AER Auditory Filtering and CPG for Robot Control.	ISCAS	2007	DBLP DOI BibTeX RDF
8	Alejandro Linares-Barranco, Francisco Gomez-Rodriguez, Angel Jiménez-Fernandez, Tobi Delbrück, P. Lichtensteiner	Using FPGA for visuo-motor control with a silicon retina and a humanoid robot.	ISCAS	2007	DBLP DOI BibTeX RDF
8	Giacomo Indiveri, Elisabetta Chicca, Rodney J. Douglas	A VLSI array of low-power spiking neurons and bistable synapses with spike-timing dependent plasticity.	IEEE Trans. Neural Networks	2006	DBLP DOI BibTeX RDF
8	Chen Shoushun, Amine Bermak	A second generation time-to-first-spike pixel with asynchronous self power-off.	ISCAS	2006	DBLP DOI BibTeX RDF
8	Håvard Kolle Riis, Philipp Häfliger	An Asynchronous 4-to-4 AER Mapper.	IWANN	2005	DBLP DOI BibTeX RDF
5	Alejandro Linares-Barranco, Rafael Paz, Francisco Gomez-Rodriguez, Angel Jiménez-Fernandez, Manuel Rivas, Gabriel Jiménez, Antón Civit	FPGA Implementations Comparison of Neuro-cortical Inspired Convolution Processors for Spiking Systems.	IWANN (1)	2009	DBLP DOI BibTeX RDF
5	Theodoros Lappas, Benjamin Arai, Manolis Platakis, Dimitrios Kotsakos, Dimitrios Gunopulos	On burstiness-aware search for document sequences.	KDD	2009	DBLP DOI BibTeX RDF	document sequences, search, burstiness
5	Rafael Serrano-Gotarredona, Teresa Serrano-Gotarredona, Antonio Acosta-Jimenez, Carmen Serrano-Gotarredona, José Antonio Pérez-Carrasco, Bernabé Linares-Barranco, Alejandro Linares-Barranco, Gabriel Jiménez-Moreno, Antón Civit Balcells	On Real-Time AER 2-D Convolutions Hardware for Neuromorphic Spike-Based Cortical Processing.	IEEE Trans. Neural Networks	2008	DBLP DOI BibTeX RDF
5	Raphael Berner, Patrick Lichtsteiner, Tobi Delbrück	Self-timed vertacolor dichromatic vision sensor for low power pattern detection.	ISCAS	2008	DBLP DOI BibTeX RDF
5	Mauro Tiziani, Nicola Massari, Syed A. Jawed, Massimo Gottardi	A self-adapting high dynamic-range visual representation algorithm for AER imagers.	ISCAS	2008	DBLP DOI BibTeX RDF
5	Luis A. Camuñas-Mesa, Antonio Acosta-Jimenez, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco	Fully digital AER convolution chip for vision processing.	ISCAS	2008	DBLP DOI BibTeX RDF
5	Pantelis Georgiou, Chris Toumazou	An adaptive ISFET chemical imager chip.	ISCAS	2008	DBLP DOI BibTeX RDF