Search results for "aggressor-victim"

Found 10 publication records. Showing 10 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
99	Ajoy Kumar Palit, Kishore K. Duganapalli, Walter Anheier	Influence of Resistive Bridging Fault on Crosstalk Coupling Effects in On-Chip Aggressor-Victim Interconnects.	DFT	2006	DBLP DOI BibTeX RDF	defective interconnects, defect’s severity, fault model, crosstalk, bridging fault
53	Ajoy Kumar Palit, Lei Wu, Kishore K. Duganapalli, Walter Anheier, Jürgen Schlöffel	A New, Flexible and Very Accurate Crosstalk Fault Model to Analyze the Effects of Coupling Noise between the Interconnects on Signal Integrity Losses in Deep Submicron Chips.	Asian Test Symposium	2005	DBLP DOI BibTeX RDF	crosstalk model, aggressor-victim, ABCD-model, crosstalk-hazards, signal integrity
46	Pascal Raiola, Dominik Erb, Sudhakar M. Reddy, Bernd Becker 0001	Accurate Diagnosis of Interconnect Open Defects Based on the Robust Enhanced Aggressor Victim Model.	VLSID	2017	DBLP DOI BibTeX RDF
46	Ravikishore Gandikota, Li Ding 0002, Peivand Tehrani, David T. Blaauw	Worst-case aggressor-victim alignment with current-source driver models.	DAC	2009	DBLP DOI BibTeX RDF	CSM, delay noise, crosstalk
46	Stefan Hillebrecht, Ilia Polian, Piet Engelke, Bernd Becker 0001, Martin Keim, Wu-Tung Cheng	Extraction, Simulation and Test Generation for Interconnect Open Defects Based on Enhanced Aggressor-Victim Model.	ITC	2008	DBLP DOI BibTeX RDF
38	Stefan Spinner, Ilia Polian, Piet Engelke, Bernd Becker 0001, Martin Keim, Wu-Tung Cheng	Automatic Test Pattern Generation for Interconnect Open Defects.	VTS	2008	DBLP DOI BibTeX RDF	Interconnect opens, Open-via defects, ATPG
34	Ajoy Kumar Palit, Kishore K. Duganapalli, Walter Anheier	Modeling of Crosstalk Fault in Defective Interconnects.	PATMOS	2006	DBLP DOI BibTeX RDF	defect-based-crosstalk fault model, signal integrity losses, aggres-sor-victim, ABCD-model, crosstalk-hazards
24	Ken Tseng, Mark Horowitz	False coupling exploration in timing analysis.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2005	DBLP DOI BibTeX RDF
24	Marong Phadoongsidhi, Kewal K. Saluja	Static Timing Analysis of Irreversible Crosstalk Noise Pulse Faults.	VLSI Design	2004	DBLP DOI BibTeX RDF
24	Michael A. Margolese, F. Joel Ferguson	Using Temporal Constraints for Eliminating Crosstalk Candidates for Design and Test.	VTS	1999	DBLP DOI BibTeX RDF