Search results for "arbiters"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
221	Alptekin Küpçü, Anna Lysyanskaya	Brief announcement: impossibility results for optimistic fair exchange with multiple autonomous arbiters.	PODC	2009	DBLP DOI BibTeX RDF	distributed arbiters, optimistic fair exchange, trusted third party
117	Krishnan Kailas, Viresh Paruthi, Brian Monwai	Formal verification of correctness and performance of random priority-based arbiters.	FMCAD	2009	DBLP DOI BibTeX RDF
117	Yu-Chen Kuo	Composite k-Arbiters.	IEEE Trans. Parallel Distributed Syst.	2001	DBLP DOI BibTeX RDF	h-out-of-k mutual exclusion, permission-based algorithms, fault tolerance, Distributed systems, quorums
83	Yuval Tamir, Hsin-Chou Chi	Symmetric Crossbar Arbiters for VLSI Communication Switches.	IEEE Trans. Parallel Distributed Syst.	1993	DBLP DOI BibTeX RDF	VLSI communication switches, symmetric crossbar arbiters, multistage interconnectionnetwork, switch arbitration policy, worst-case latency, circuitsimulation, performance evaluation, VLSI, circuit analysis computing, network simulations, critical path, multiprocessorinterconnection networks, system clock
71	Jer-Min Jou, Sih-Sian Wu, Yun-Lung Lee, Cheng Chou, Yuan-Long Jeang	New model-driven design and generation of multi-facet arbiters part I: from the design model to the architecture model.	DAC	2010	DBLP DOI BibTeX RDF	architecture model/template, model-driven design flow, multi-facet arbiter, granularity, design space, design model
71	Giorgos Dimitrakopoulos, Nikos Chrysos, Costas Galanopoulos	Fast arbiters for on-chip network switches.	ICCD	2008	DBLP DOI BibTeX RDF
71	Lindsay Kleeman, Antonio Cantoni	The Analysis and Performance of Batching Arbiters.	SIGMETRICS	1986	DBLP DOI BibTeX RDF
56	Ganesh Gopalakrishnan	Developing Micropipeline Wavefront Arbiters.	IEEE Des. Test Comput.	1994	DBLP DOI BibTeX RDF
52	Andrey Mokhov, Victor Khomenko, Alexandre Yakovlev	Flat Arbiters.	ACSD	2009	DBLP DOI BibTeX RDF	Asynchronous circuits, Signal Transition Graph (STG), Arbiters, Speed-independent circuits
52	Alexandre V. Bystrov, D. J. Kinniment, Alexandre Yakovlev	Priority Arbiters.	ASYNC	2000	DBLP DOI BibTeX RDF	dynamic priority, asynchronous circuits, concurrent systems, arbiters, static priority
46	Min Zhang 0012, Chiu-sing Choy	Low-Cost VC Allocator Design for Virtual Channel Wormhole Routers in Networks-on-Chip.	NOCS	2008	DBLP DOI BibTeX RDF
46	Eiji Oki, Zhigang Jing, Roberto Rojas-Cessa, H. Jonathan Chao	Concurrent round-robin-based dispatching schemes for Clos-network switches.	IEEE/ACM Trans. Netw.	2002	DBLP DOI BibTeX RDF	Clos-network switch, throughput, packet switch, arbitration, dispatching
46	Yoshifumi Manabe, Naka Tajima	(h-k)-Arbiter for h-out of-k Mutual Exclusion Problem.	ICDCS	1999	DBLP DOI BibTeX RDF
43	Nikos Chrysos, Giorgos Dimitrakopoulos	Backlog-Aware Crossbar Schedulers: A New Algorithm and its Efficient Hardware Implementation.	Hot Interconnects	2008	DBLP DOI BibTeX RDF	VOQ crossbar scheduler, backlog-aware, deterministic service guarantees, round-robin arbiters, ASIC design
40	Petr Mikusek, Vaclav Dvorak	On Lookup Table Cascade-Based Realizations of Arbiters.	DSD	2008	DBLP DOI BibTeX RDF
40	Yu-Chen Kuo, Huang-Chen Lee	A Lightweight Group Mutual k-Exclusion Algorithm Using Bi-k-Arbiters.	DISC	2005	DBLP DOI BibTeX RDF
40	Goichiro Hanaoka, Junji Shikata, Yumiko Hanaoka, Hideki Imai	The Role of Arbiters in Asymmetric Authentication Schemes.	ISC	2003	DBLP DOI BibTeX RDF
40	Ernest F. Brickell, Douglas R. Stinson	Authentication Codes with Multiple Arbiters (Extended Abstract).	EUROCRYPT	1988	DBLP DOI BibTeX RDF
31	Amir Gourgy, Ted H. Szymanski	Cooperative Token-Ring Scheduling For Input-Queued Switches.	IEEE Trans. Computers	2009	DBLP DOI BibTeX RDF
31	Yan Zhang	Architecture and performance comparison of a statistic-based lottery arbiter for shared bus on chip.	ASP-DAC	2005	DBLP DOI BibTeX RDF
31	Kanishka Lahiri, Anand Raghunathan	Power analysis of system-level on-chip communication architectures.	CODES+ISSS	2004	DBLP DOI BibTeX RDF	system-on-chip, network-on-chip, low-power design, power analysis, communication architectures
31	Shubhendu S. Mukherjee, Federico Silla, Peter J. Bannon, Joel S. Emer, Steven Lang, David Webb	A comparative study of arbitration algorithms for the Alpha 21364 pipelined router.	ASPLOS	2002	DBLP DOI BibTeX RDF
31	Hartmann J. Genrich, Robert M. Shapiro	Formal Verification of an Arbiter Cascade.	Application and Theory of Petri Nets	1992	DBLP DOI BibTeX RDF
27	Ilias Iliadis, Cyriel Minkenberg	Performance of a speculative transmission scheme for scheduling-latency reduction.	IEEE/ACM Trans. Netw.	2008	DBLP DOI BibTeX RDF	electrooptic switches, scheduling, modeling, packet switching, arbiters
25	Hala Ibrahim, Haytham Azmi, M. Watheq El-Kharashi, Mona Safar	Hardware Security Analysis of Arbiters: Trojan Modeling and Formal Verification.	VLSI-SoC	2023	DBLP DOI BibTeX RDF
25	Dimitar Tyanev, Yulka Petkova, Milen Angelov	Fast Asynchronous Arbiters. Determining Final Delays.	CompSysTech	2022	DBLP DOI BibTeX RDF
25	Hayun Chung, Minji Hyun, Jungwon Kim	A 360-fs-Time-Resolution 7-bit Stochastic Time-to-Digital Converter With Linearity Calibration Using Dual Time Offset Arbiters in 65-nm CMOS.	IEEE J. Solid State Circuits	2021	DBLP DOI BibTeX RDF
25	Muhammad Ali 0014, Piotr Sapiezynski, Aleksandra Korolova, Alan Mislove, Aaron Rieke	Ad Delivery Algorithms: The Hidden Arbiters of Political Messaging.	WSDM	2021	DBLP DOI BibTeX RDF
25	Jalal Rostami Monfared, Abdolmajid Mousavi	Design and simulation of nano-arbiters using quantum-dot cellular automata.	Microprocess. Microsystems	2020	DBLP DOI BibTeX RDF
25	Yong-sen Wang, Song Cheng, A.-long Zhao, Heng You, Shushan Qiao	A 8bits, 6.2ps resolution two-step time-to-digital converter with set-reset-based arbiters and signal tracking mechanism.	IEICE Electron. Express	2020	DBLP DOI BibTeX RDF
25	Lindsay Kleeman	Recursive Formulations for N Input Asynchronous First Come First Served Arbiters.	ASYNC	2020	DBLP DOI BibTeX RDF
25	Muhammad Ali 0014, Piotr Sapiezynski, Aleksandra Korolova, Alan Mislove, Aaron Rieke	Ad Delivery Algorithms: The Hidden Arbiters of Political Messaging.	CoRR	2019	DBLP BibTeX RDF
25	Robert Wittig, Mattis Hasler, Emil Matús, Gerhard P. Fettweis	Probabilistic Models for Off-Line Arbiters in Embedded Systems.	VLSI-SoC	2019	DBLP DOI BibTeX RDF
25	Iddo Bentov, Alex Mizrahi, Meni Rosenfeld	Decentralized Prediction Market without Arbiters.	CoRR	2017	DBLP BibTeX RDF
25	Iddo Bentov, Alex Mizrahi, Meni Rosenfeld	Decentralized Prediction Market Without Arbiters.	Financial Cryptography Workshops	2017	DBLP DOI BibTeX RDF
25	Sanmay Das, Allen Lavoie, Malik Magdon-Ismail	Manipulation among the Arbiters of Collective Intelligence: How Wikipedia Administrators Mold Public Opinion.	ACM Trans. Web	2016	DBLP DOI BibTeX RDF
25	Siarhei S. Zalivaka, Alexander V. Puchkov, Vladimir P. Klybik, Alexander A. Ivaniuk, Chip-Hong Chang	Multi-valued Arbiters for quality enhancement of PUF responses on FPGA implementation.	ASP-DAC	2016	DBLP DOI BibTeX RDF
25	Serge Vaudenay	Clever Arbiters Versus Malicious Adversaries - On the Gap Between Known-Input Security and Chosen-Input Security.	The New Codebreakers	2016	DBLP DOI BibTeX RDF
25	James S. Tandon, Satoshi Komatsu, Takahiro J. Yamaguchi, Kunihiro Asada	A comparative study of body biased time-to-digital converters based on stochastic arbiters and stochastic comparators.	NEWCAS	2016	DBLP DOI BibTeX RDF
25	Masashi Imai, Tomohiro Yoneda	Novel Implementation Method of Multiple-Way Asynchronous Arbiters.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2015	DBLP DOI BibTeX RDF
25	Gabriele Miorandi, Davide Bertozzi, Steven M. Nowick	Increasing Impartiality and Robustness in High-Performance N-Way Asynchronous Arbiters.	ASYNC	2015	DBLP DOI BibTeX RDF
25	Satoshi Komatsu, Takahiro J. Yamaguchi, Mohamed Abbas, Nguyen Ngoc Mai Khanh, James S. Tandon, Kunihiro Asada	A Flash TDC with 2.6-4.2ps Resolution Using a Group of UnbalancedCMOS Arbiters.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2014	DBLP DOI BibTeX RDF
25	Shangdi Chen, Hao Ma	Two Constructions of Authentication Codes with Multiple Arbiters.	Ars Comb.	2014	DBLP BibTeX RDF
25	Sanmay Das, Allen Lavoie, Malik Magdon-Ismail	Manipulation among the arbiters of collective intelligence: how wikipedia administrators mold public opinion.	CIKM	2013	DBLP DOI BibTeX RDF
25	Andrey Mokhov, Victor Khomenko, Alexandre Yakovlev	Flat Arbiters.	Fundam. Informaticae	2011	DBLP DOI BibTeX RDF
25	Esteve Almirall, Jonathan Wareham	Living Labs: arbiters of mid- and ground-level innovation.	Technol. Anal. Strateg. Manag.	2011	DBLP DOI BibTeX RDF
25	Jer-Min Jou, Yun-Lung Lee, Sih-Sian Wu	Model-Driven Design and Generation of New Multi-Facet Arbiters: From the Design Model to the Hardware Synthesis.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2011	DBLP DOI BibTeX RDF
25	Giorgos Dimitrakopoulos, Christoforos Kachris, Emmanouil Kalligeros	Scalable Arbiters and Multiplexers for On-FGPA Interconnection Networks.	FPL	2011	DBLP DOI BibTeX RDF
25	Andreas Schranzhofer, Rodolfo Pellizzoni, Jian-Jia Chen, Lothar Thiele, Marco Caccamo	Timing Analysis for Resource Access Interference on Adaptive Resource Arbiters.	IEEE Real-Time and Embedded Technology and Applications Symposium	2011	DBLP DOI BibTeX RDF
25	Václav Dvorák, Petr Mikusek	Design of Arbiters and Allocators Based on Multi-Terminal BDDs.	J. Univers. Comput. Sci.	2010	DBLP DOI BibTeX RDF
25	Esteve Almirall, Jonathan Wareham	Living Labs: Arbiters of Mid- and Ground-Level Innovation.	Global Sourcing Workshop	2010	DBLP DOI BibTeX RDF
25	Delong Shang, Fei Xia, Alexandre Yakovlev	Highly parallel multi-resource arbiters.	ISCAS	2010	DBLP DOI BibTeX RDF
25	Alptekin Küpçü, Anna Lysyanskaya	Optimistic Fair Exchange with Multiple Arbiters.	ESORICS	2010	DBLP DOI BibTeX RDF
25	Gadiel Auerbach, Fady Copty, Viresh Paruthi	Formal verification of arbiters using property strengthening and underapproximations.	FMCAD	2010	DBLP BibTeX RDF
25	Alptekin Küpçü, Anna Lysyanskaya	Optimistic Fair Exchange with Multiple Arbiters.	IACR Cryptol. ePrint Arch.	2009	DBLP BibTeX RDF
25	Masashi Imai, Tomohiro Yoneda, Takashi Nanya	N-way ring and square arbiters.	ICCD	2009	DBLP DOI BibTeX RDF
25	Si-Qing Zheng, Mei Yang	Algorithm-Hardware Codesign of Fast Parallel Round-Robin Arbiters.	IEEE Trans. Parallel Distributed Syst.	2007	DBLP DOI BibTeX RDF	circuits and systems, round-robin arbiter, parallel processing, matching, Arbitration, switch scheduling
25	Yoshifumi Manabe, Naka Tajima	(h, k)-Arbiters for h-out-of-k mutual exclusion problem.	Theor. Comput. Sci.	2004	DBLP DOI BibTeX RDF
25	Hassan B. Diab	Fuzzy logic arbiters for multiple-bus multiprocessor systems.	IEEE Trans. Syst. Man Cybern. Part C	2004	DBLP DOI BibTeX RDF
25	C. Emanuel Savin, Tim McSmythurs, James Czilli	Binary tree search architecture for efficient implementation of round robin arbiters.	ICASSP (5)	2004	DBLP DOI BibTeX RDF
25	Jean-Baptiste Rigaud, Laurent Fesquet, Marc Renaudin, Jerome Quartana	High-Level Modeling and Design of Asynchronous Arbiters for On-Chip Communication Systems.	DATE	2002	DBLP DOI BibTeX RDF
25	A. M. M. Lelkens, Hans-Jürgen Reumerman, J. Ungermann, A. Van Wageningen	A packet switch with bufferless switch cards and partial distribution of VOQ-state information to parallel arbiters.	ICC	2002	DBLP DOI BibTeX RDF
25	Jean-Baptiste Rigaud, Jerome Quartana, Laurent Fesquet, Marc Renaudin	Modeling and Design of Asynchronous Priority Arbiters for On-Chip Communication Systems.	VLSI-SOC	2001	DBLP BibTeX RDF
25	Takashige Hoshiai	Approximate analysis of access contention for multiprocessor systems with common bus arbiters.	Syst. Comput. Jpn.	1996	DBLP DOI BibTeX RDF
25	Hsin-Chou Chi, Yuval Tamir	Starvation Prevention for Arbiters of Crossbars with Multi-Queue Input Buffers.	COMPCON	1994	DBLP DOI BibTeX RDF
25	Michael Mendler, Terry Stroup	Newtonian Arbiters Cannot be Proven Correct.	Formal Methods Syst. Des.	1993	DBLP DOI BibTeX RDF
25	Jo C. Ebergen	Arbiters: An Exercise in Specifying and Decomposing Asynchronously Communicating Components.	Sci. Comput. Program.	1992	DBLP DOI BibTeX RDF
25	Michael Mendler, Terry Stroup	Newtonian Arbiters Cannot be Proven Correct.	Designing Correct Circuits	1992	DBLP BibTeX RDF
25	Thomas S. Anantharaman	Human Arbiters of Chess Tactics?	J. Int. Comput. Games Assoc.	1991	DBLP DOI BibTeX RDF
25	Hsin-Chou Chi, Yuval Tamir	Decomposed Arbiters for Large Crossbars with Multi-Queue Input Buffers.	ICCD	1991	DBLP DOI BibTeX RDF
25	Qing Yang 0001, Ravi Raja	Design and Analysis of Multiple-Bus Arbiters with Different Priority Schemes.	PARBASE / Architectures	1990	DBLP DOI BibTeX RDF
25	David L. Black 0001	On the Existence of Delay-Insensitive Fair Arbiters: Trace Theory and its Limitations.	Distributed Comput.	1986	DBLP DOI BibTeX RDF
25	Ichiro Suzuki, Y. Motohashi, Kenichi Taniguchi, Tadao Kasami, Tatsuaki Okamoto	Specification and Verification of Decentralized Daisy Chain Arbiters with omega-Extended Regular Expressions.	Theor. Comput. Sci.	1986	DBLP DOI BibTeX RDF
25	Marc Courvoisier, Jean Claude Geffroy	Cascaded Self-Checking Bus Arbiters for Multicomputer Systems.	RTSS	1982	DBLP BibTeX RDF
25	Patricia A. Jacobson	Approximate Analytic Models of Arbiters.	SIGMETRICS	1981	DBLP DOI BibTeX RDF
25	William W. Plummer	Asynchronous Arbiters.	IEEE Trans. Computers	1972	DBLP DOI BibTeX RDF
15	Deng Pan, Yuanyuan Yang 0001	Localized Independent Packet Scheduling for Buffered Crossbar Switches.	IEEE Trans. Computers	2009	DBLP DOI BibTeX RDF
15	Dana Vantrease, Nathan L. Binkert, Robert Schreiber, Mikko H. Lipasti	Light speed arbitration and flow control for nanophotonic interconnects.	MICRO	2009	DBLP DOI BibTeX RDF
15	Jan Staschulat, Marco Bekooij	Dataflow models for shared memory access latency analysis.	EMSOFT	2009	DBLP DOI BibTeX RDF	multiprocessor performance analysis, real-time, memory accesses, dataflow model
15	Dragos Truscan, Tiberiu Seceleanu, Johan Lilius, Hannu Tenhunen	A Model-Based Design Process for the SegBus Distributed Architecture.	ECBS	2008	DBLP DOI BibTeX RDF	Segmented Bus Architecture, UML, MDA, model transformation
15	Benny Akesson, Liesbeth Steffens, Eelke Strooisma, Kees Goossens	Real-Time Scheduling Using Credit-Controlled Static-Priority Arbitration.	RTCSA	2008	DBLP DOI BibTeX RDF
15	Khalid Latif 0002, Moazzam Fareed Niazi, Hannu Tenhunen, Tiberiu Seceleanu, Sakir Sezer	Application development flow for on-chip distributed architectures.	SoCC	2008	DBLP DOI BibTeX RDF
15	Abbe Mowshowitz, Nanda Kumar	Public vs. private interest on the internet.	Commun. ACM	2007	DBLP DOI BibTeX RDF
15	Cedric Koch-Hofer, Marc Renaudin, Yvain Thonnart, Pascal Vivet	ASC, a SystemC Extension for Modeling Asynchronous Systems, and Its Application to an Asynchronous NoC.	NOCS	2007	DBLP DOI BibTeX RDF
15	Julian J. H. Pontes, Rafael Soares, Ewerson Carvalho, Fernando Moraes 0001, Ney Calazans	SCAFFI: An intrachip FPGA asynchronous interface based on hard macros.	ICCD	2007	DBLP DOI BibTeX RDF
15	Ashish Mathur, Sourav Roy, Rajat Bhatia, Arup Chakraborty, Vijay Bhargava, Jatin Bhartia	JouleQuest: An Accurate Power Model for the StarCore DSP Platform.	VLSI Design	2007	DBLP DOI BibTeX RDF
15	Wladek Olesinski, Nils Gura, Hans Eberle, Andres Mejia	Low-latency scheduling in large switches.	ANCS	2007	DBLP DOI BibTeX RDF	scheduling, switching, low latency, arbiter
15	Chien-Hua Chen, Geeng-Wei Lee, Juinn-Dar Huang, Jing-Yang Jou	A real-time and bandwidth guaranteed arbitration algorithm for SoC bus communication.	ASP-DAC	2006	DBLP DOI BibTeX RDF
15	Po-Tsang Huang, Wei Hwang	2-level FIFO architecture design for switch fabrics in network-on-chip.	ISCAS	2006	DBLP DOI BibTeX RDF
15	Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park, Vijaykrishnan Narayanan, Mazin S. Yousif, Chita R. Das	A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks.	ISCA	2006	DBLP DOI BibTeX RDF
15	Steve Scott, Dennis Abts, John Kim, William J. Dally	The BlackWidow High-Radix Clos Network.	ISCA	2006	DBLP DOI BibTeX RDF
15	Gaspar Mora, José Flich, José Duato, Pedro López 0001, Elvira Baydal, Olav Lysne	Towards an efficient switch architecture for high-radix switches.	ANCS	2006	DBLP DOI BibTeX RDF	arbiter efficiency, partitioned crossbar, switch organization
15	Deng Pan, Yuanyuan Yang 0001	Localized asynchronous packet scheduling for buffered crossbar switches.	ANCS	2006	DBLP DOI BibTeX RDF	100% throughput, buffered crossbar switches, priority encoders, packet scheduling
15	Daniela Rosu 0001, Asit Dan	Managing End-to-End Lifecycle of Global Service Policies.	ICSOC	2005	DBLP DOI BibTeX RDF
15	Mehrdad Najibi, Kamran Saleh, Mohsen Naderi, Hossein Pedram, Mehdi Sedighi	Prototyping globally asynchronous locally synchronous circuits on commercial synchronous FPGAs (abstract only).	FPGA	2005	DBLP DOI BibTeX RDF
15	Mehrdad Najibi, Kamran Saleh, Mohsen Naderi, Hossein Pedram, Mehdi Sedighi	Prototyping Globally Asynchronous Locally Synchronous Circuits on Commercial Synchronous FPGAs.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
15	Radu Negulescu	General Testers for Asynchronous Circuits.	ASYNC	2004	DBLP DOI BibTeX RDF
15	Peter M. Levine, Gordon W. Roberts	A High-Resolution Flash Time-to-Digital Converter and Calibration Scheme.	ITC	2004	DBLP DOI BibTeX RDF
15	Roberto Rojas-Cessa, Eiji Oki, H. Jonathan Chao	Concurrent fault detection for a multiple-plane packet switch.	IEEE/ACM Trans. Netw.	2003	DBLP DOI BibTeX RDF	parallel planes, fault detection, packet switch, concurrent testing, single fault
15	Marek Tudruj, Lukasz Masko	Communication on the Fly and Program Execution Control in a System of Dynamically Configurable SMP Clusters.	PDP	2003	DBLP DOI BibTeX RDF