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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 11 occurrences of 10 keywords
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Results
Found 11 publication records. Showing 11 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
66 | Peter G. Neumann, T. R. N. Rao |
Error-Correcting Codes for Byte-Organized Arithmetic Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 24(3), pp. 226-232, 1975. The full citation details ...](Pics/full.jpeg) |
1975 |
DBLP DOI BibTeX RDF |
AN codes, biresidue codes, byte-organized, gAN, low-cost residues, multiresidue codes, non-binary codes, arithmetic codes |
37 | Shigeo Kaneda, Eiji Fujiwara |
Single Byte Error Correcting - Double Byte Error Detecting Codes for Memory Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 31(7), pp. 596-602, 1982. The full citation details ...](Pics/full.jpeg) |
1982 |
DBLP DOI BibTeX RDF |
single byte error correcting? double byte error detecting codes, Byte-organized memory chips, LSI implementation, reliability, error correcting codes |
29 | Mitsuru Hamada, Eiji Fujiwara |
A Class of Error Control Codes for Byte Organized Memory Systems -SbEC-(Sb+S)ED Codes-. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 46(1), pp. 105-109, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
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29 | Eiji Fujiwara, Masato Kitakami |
A class of error-correcting codes for byte-organized memory systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Inf. Theory ![In: IEEE Trans. Inf. Theory 40(6), pp. 1857-1865, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
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29 | Eiji Fujiwara, Masato Kitakami |
A Class of Error Locating Codes for Byte-Organized Memory Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FTCS ![In: Digest of Papers: FTCS-23, The Twenty-Third Annual International Symposium on Fault-Tolerant Computing, Toulouse, France, June 22-24, 1993, pp. 110-119, 1993, IEEE Computer Society, 0-8186-3680-7. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
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29 | Chin-Long Chen |
Error-correcting codes for byte-organized memory systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Inf. Theory ![In: IEEE Trans. Inf. Theory 32(2), pp. 181-185, 1986. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
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29 | Larry A. Dunning |
SEC-BED-DED Codes for Error Control in Byte-Organized Memory Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 34(6), pp. 557-562, 1985. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
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29 | Larry A. Dunning, Murali R. Varanasi |
Code Constructions for Error Control in Byte Organized Memory Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 32(6), pp. 535-542, 1983. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP DOI BibTeX RDF |
SEC-BED codes, Byte errors, byte organization, package failures, fault tolerance, memories, error-correcting codes, error-detecting codes, linear codes |
29 | Tich T. Dao |
SEC-DED Nonbinary Code for Fault-Torelant Byte-Organized Memory Implemented with Quaternary Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 30(9), pp. 662-666, 1981. The full citation details ...](Pics/full.jpeg) |
1981 |
DBLP DOI BibTeX RDF |
SEC/DED code, Byte-error correcting code, multivalued Galois logic, nonbinary Hamming code, dynamic programming, I, fault-tolerant memory |
29 | V. M. Gritsenko |
Comments on "Error-Correcting Codes for Byte-Organized Arithmetic Processors". ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 27(2), pp. 189-190, 1978. The full citation details ...](Pics/full.jpeg) |
1978 |
DBLP DOI BibTeX RDF |
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29 | Tich T. Dao |
Design and implementation of a non-binary code for byte-organized memory with binary and quaternary logics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MVL ![In: Proceedings of the eighth international symposium on Multiple-valued logic, MVL 1978, Rosemont, Illinois, USA, 1978, pp. 55-64, 1978, IEEE Computer Society Press. The full citation details ...](Pics/full.jpeg) |
1978 |
DBLP BibTeX RDF |
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