Search results for "chipsets"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
66	David Raymond Lutz, B. Kahne	Performance analysis for chipsets and systems.	IPCCC	1999	DBLP DOI BibTeX RDF
48	N. Patrick Kelly, Ben W. Jones, Nestor A. Fesas, John M. Morton	Design of 802.11 Access Point Chipsets for Enterprise Applications, invited.	IWSOC	2005	DBLP DOI BibTeX RDF
36	John C. Linford, Adrian Sandu	Vector stream processing for effective application of heterogeneous parallelism.	SAC	2009	DBLP DOI BibTeX RDF	dimension splitting, vector stream processing, modeling, cell broadband engine, chemical transport modeling
36	Ravi R. Iyer 0001	Characterization and Evaluation of Cache Hierarchies for Web Servers.	World Wide Web	2004	DBLP DOI BibTeX RDF	chipsets, snoop filters, simulation, performance evaluation, memory hierarchy, web servers, cache coherence, shared caches, commercial workloads
30	Huanbo Li, Jixin Chen, Debin Hou, Zekun Li 0005, Rui Zhou, Zhe Chen, Pinpin Yan, Wei Hong 0002	W-band Scalable 2×2 Phased-Array Transmitter and Receiver Chipsets in SiGe BiCMOS for High Data-Rate Communication.	IEEE J. Solid State Circuits	2022	DBLP DOI BibTeX RDF
30	Lu Zeng, Sree Hari Krishnan Parthasarathi, Yuzong Liu, Alex Escott, Santosh Cheekatmalla, Nikko Strom, Shiv Vitaladevuni	Sub 8-Bit Quantization of Streaming Keyword Spotting Models for Embedded Chipsets.	CoRR	2022	DBLP DOI BibTeX RDF
30	Jun Kamioka, Yoshifumi Kawamura, Ryota Komaru, Masatake Hangai, Yoshitaka Kamo, Tetsuo Kodera, Shintaro Shinjo	X-Band GaN Chipsets for Cost-Effective 20W T/R Modules.	IEICE Trans. Electron.	2022	DBLP DOI BibTeX RDF
30	Gerrit Maus, Wiebke Gerth, Dieter Brückmann	A parking spot occupancy sensor based on commodity wireless chipsets.	SAS	2022	DBLP DOI BibTeX RDF
30	Lu Zeng, Sree Hari Krishnan Parthasarathi, Yuzong Liu, Alex Escott, Santosh Cheekatmalla, Nikko Strom, Shiv Vitaladevuni	Sub 8-Bit Quantization of Streaming Keyword Spotting Models for Embedded Chipsets.	TSD	2022	DBLP DOI BibTeX RDF
30	Erman Timurdogan, Zhan Su 0001, Ren-Jye Shiue, Matthew J. Byrd, Christopher V. Poulton, Kenneth Jabon, Christopher DeRose, Benjamin R. Moss, Ehsan S. Hosseini, Ivan Duzevik, Michael Whitson, Ronald P. Millman, Dogan A. Atlas, Michael R. Watts	400G Silicon Photonics Integrated Circuit Transceiver Chipsets for CPO, OBO, and Pluggable Modules.	OFC	2020	DBLP BibTeX RDF
30	Feng Zhu 0012, Xianlu Tao, Wanke Liu, Xiang Shi, Fuhong Wang, Xiaohong Zhang	Walker: Continuous and Precise Navigation by Fusing GNSS and MEMS in Smartphone Chipsets for Pedestrians.	Remote. Sens.	2019	DBLP DOI BibTeX RDF
30	Francesco Gringoli, Matthias Schulz 0001, Jakob Link, Matthias Hollick	Free Your CSI: A Channel State Information Extraction Platform For Modern Wi-Fi Chipsets.	WiNTECH@MOBICOM	2019	DBLP DOI BibTeX RDF
30	Ioannis L. Syllaios	Hybrid ΔΣ Programmable Phase/Frequency Detector for IoT Chipsets.	ISCAS	2018	DBLP DOI BibTeX RDF
30	David Pérez-Díaz De Cerio, Ángela Hernández-Solana, José Luis Valenzuela, Antonio Valdovinos	Analytical and Experimental Performance Evaluation of BLE Neighbor Discovery Process Including Non-Idealities of Real Chipsets.	Sensors	2017	DBLP DOI BibTeX RDF
30	Chris Roff, James R. Henderson, Damien Clarke, Marcus C. Walden, Steve Fitz	Low-cost millimeter-wave radio-frequency sensors: New applications enabled by developments in low cost chipsets.	IEEE SENSORS	2017	DBLP DOI BibTeX RDF
30	Tenglong Fan, Dexin Ye, Jiangtao Huangfu, Yongzhi Sun, Changzhi Li, Lixin Ran	Hand gesture recognition based on Wi-Fi chipsets.	RWS	2017	DBLP DOI BibTeX RDF
30	Ioannis L. Syllaios	Hybrid-DPLL-based constant-envelope modulator for Internet-of-Things chipsets.	ISCAS	2017	DBLP DOI BibTeX RDF
30	Elena Aragon, Juan M. Jiménez, Arian Maghazeh, Jim Rasmusson, Unmesh D. Bordoloi	Pattern matching in OpenCL: GPU vs CPU energy consumption on two mobile chipsets.	IWOCL	2014	DBLP DOI BibTeX RDF
30	Guan-Sing Chen, Chin-Yang Wu, Chen-Lun Lin, Hao-Wei Hung, Jri Lee	Fully-integrated 40-Gb/s pulse pattern generator and bit-error-rate tester chipsets in 65-nm CMOS technology.	A-SSCC	2014	DBLP DOI BibTeX RDF
30	Jhih-Yu Jiang, Ping-Chuan Chiang, Hao-Wei Hung, Chen-Lun Lin, Ty Yoon, Jri Lee	100Gb/s ethernet chipsets in 65nm CMOS technology.	ISSCC	2013	DBLP DOI BibTeX RDF
30	Alberto Valdes-Garcia, Scott K. Reynolds, Arun Natarajan 0001, Dong Gun Kam, Duixian Liu, Jie-Wei Lai, Yen-Lin Oscar Huang, Ping-Yu Chen, Ming-Da Tsai, Jing-Hong Conan Zhan, Sean Nicolson, Brian A. Floyd	Single-element and phased-array transceiver chipsets for 60-ghz Gb/s communications.	IEEE Commun. Mag.	2011	DBLP DOI BibTeX RDF
30	Sebastian Robitzsch, Liam Murphy 0001, John Fitzpatrick	An analysis of the Received Signal Strength accuracy in 802.11a networks using Atheros chipsets: A solution towards self configuration.	GLOBECOM Workshops	2011	DBLP DOI BibTeX RDF
30	Monica, Ajay K. Sharma	Comparative Investigation for Energy Consumption of Different Chipsets Based on Scheduling for Wireless Sensor Networks	CoRR	2010	DBLP BibTeX RDF
30	Steven J. Vaughan-Nichols	Bull Market for IEEE 802.11 WLAN Chipsets.	Computer	2002	DBLP DOI BibTeX RDF
30	Ning Bi, Harinath Garudadri, Chienchung Chang, Andrew DeJaco, Yingyong Qi, Naren Malayath, William Huang	A robust speech recognition system embedded in CDMA cellular phone chipsets.	ICASSP	2002	DBLP DOI BibTeX RDF
18	Martín Casado, Michael J. Freedman, Justin Pettit, Jianying Luo, Natasha Gude, Nick McKeown, Scott Shenker	Rethinking enterprise network control.	IEEE/ACM Trans. Netw.	2009	DBLP DOI BibTeX RDF	security, architecture, network, management
18	Sherri Sparks, Shawn Embleton, Cliff Changchun Zou	A chipset level network backdoor: bypassing host-based firewall & IDS.	AsiaCCS	2009	DBLP DOI BibTeX RDF	network backdoor, rootkit, hardware security
18	Jeff A. Stuart, John D. Owens	Message passing on data-parallel architectures.	IPDPS	2009	DBLP DOI BibTeX RDF
18	Ka-Lok Hung, Brahim Bensaou	Bandwidth allocation in IEEE 802.11 WLANs in presence of inter-BSSs hidden terminals.	ISCC	2009	DBLP DOI BibTeX RDF
18	Andrzej Glowacz, Michal Grega, Piotr Romaniak, Mikolaj Leszczuk, Zdzislaw Papir, Ignacy Pardyka	Compression and distribution of panoramic videos utilising MPEG-7-based image registration.	Multim. Tools Appl.	2008	DBLP DOI BibTeX RDF	Wireless content distribution, Edge histogram descriptor, MPEG-7, Mean opinion score, Quality evaluation, Panoramic image
18	Bruce C. Kim, Craig Force	Guest Editors' Introduction: The Evolution of RFIC Design and Test.	IEEE Des. Test Comput.	2008	DBLP DOI BibTeX RDF	RFIC chips, RF measurement, wireless, CMOS technology, design and test
18	Gregory Buehrer, Srinivasan Parthasarathy 0001, Matthew Goyder	Data mining on the cell broadband engine.	ICS	2008	DBLP DOI BibTeX RDF	cell bdea, mutlicore, CMP
18	Stéphane Eranian	What can performance counters do for memory subsystem analysis?	MSPC	2008	DBLP DOI BibTeX RDF	PMU, Linux, performance monitoring, performance counters
18	Sergey Bratus, Cory Cornelius, David Kotz, Daniel Peebles	Active behavioral fingerprinting of wireless devices.	WISEC	2008	DBLP DOI BibTeX RDF	fingerprinting, 802.11, link layer
18	Dejan Raskovic, David Giessel	Battery-Aware Embedded GPS Receiver Node.	MobiQuitous	2007	DBLP DOI BibTeX RDF
18	Jaeouk Ok, Pedro Morales, Andreas Darmawan, Hiroyuki Morikawa	Using Shared Beacon Channel for Fast Handoff in IEEE 802.11 Wireless Networks.	VTC Spring	2007	DBLP DOI BibTeX RDF
18	Ren-Jie Lee, Ming-Fang Lai, Hung-Ming Chen	Fast Flip-Chip Pin-Out Designation Respin by Pin-Block Design and Floorplanning for Package-Board Codesign.	ASP-DAC	2007	DBLP DOI BibTeX RDF
18	Mohammed Ismail 0001	First-pass-silicon radio IPs for B3G wireless networks.	SBCCI	2007	DBLP DOI BibTeX RDF	low power, wireless, 4G, RF
18	Carlo Parata, Vincenzo Scarpa, Gabriella Convertino	Flex-WiFi: a mixed infrastructure and ad-hoc IEEE 802.11 network for data traffic in a home environment.	WOWMOM	2007	DBLP DOI BibTeX RDF
18	Hung-Cheng Shih, Kuochen Wang	An Adaptive Hybrid Dynamic Power Management Method.	SUTC (1)	2006	DBLP DOI BibTeX RDF
18	G. Sandhya, K. Gopinath	Design and Analysis of Rate Aware Ad Hoc 802.11 Networks.	ICDCN	2006	DBLP DOI BibTeX RDF
18	Xiaohan Liao	Government R&D Programs on Software Technology.	QSIC	2006	DBLP DOI BibTeX RDF
18	Hong-Yi Chang, Chang Wu Yu	Constructing Long-Lived Scatternets in Bluetooth Networks.	ICITA (2)	2005	DBLP DOI BibTeX RDF	BTCP, Bluetooth, piconet, scatternet formation
18	Bhaskaran Raman, Kameswari Chebrolu	Design and evaluation of a new MAC protocol for long-distance 802.11 mesh networks.	MobiCom	2005	DBLP DOI BibTeX RDF	MAC design, network topology design, signal-to-interference ratio, 802.11 mesh networks
18	Mathieu Lacage, Mohammad Hossein Manshaei, Thierry Turletti	IEEE 802.11 rate adaptation: a practical approach.	MSWiM	2004	DBLP DOI BibTeX RDF	ARF, MADWIFI, PHY rate selection, RBAR, IEEE 802.11
18	Itamar Elhanany, Kurt Busch, Derek Chiou	Switch Fabric Interfaces.	Computer	2003	DBLP DOI BibTeX RDF
18	Hojun Shim, Yongsoo Joo, Yongseok Choi, Hyung Gyu Lee, Naehyuck Chang	Low-energy off-chip SDRAM memory systems for embedded applications.	ACM Trans. Embed. Comput. Syst.	2003	DBLP DOI BibTeX RDF	Low power, memory system, SDRAM
18	Thomas M. Conte	Choosing the Brain(s) of an Embedded System.	Computer	2002	DBLP DOI BibTeX RDF
18	Mike J. G. Lewis, L. E. M. Brackenbury	Exploiting Typical DSP Data Access Patterns and Asynchrony for a Low Power Multiported Register Bank.	ASYNC	2001	DBLP DOI BibTeX RDF
18	Mike J. G. Lewis, L. E. M. Brackenbury	An Instruction Buffer for a Low-Power DSP.	ASYNC	2000	DBLP DOI BibTeX RDF
18	Jenwei Hsieh, Tau Leng, Victor Mashayekhi, Reza Rooholamini	Impact of Level 2 Cache and Memory Subsystem on the Scalability of Clusters of Small-Scale SMP Servers.	CLUSTER	2000	DBLP DOI BibTeX RDF	Level 2 Cache, Clusters of SMP Servers, Parallel Benchmark, Performance Evaluation, Message Passing Interface, Memory Subsystem
18	Elisenda Roca, Servando Espejo-Meana, Rafael Domínguez-Castro, Gustavo Liñán, Ángel Rodríguez-Vázquez	A Programmable Imager for Very High Speed Cellular Signal Processing.	J. VLSI Signal Process.	1999	DBLP DOI BibTeX RDF
18	S. J. Krolikoski, Frank Schirrmeister, B. Salefski, J. Rowson, Grant Martin	Methodology and technology for virtual component driven hardware/software co-design on the system-level.	ISCAS (6)	1999	DBLP DOI BibTeX RDF