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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 3407 occurrences of 2001 keywords
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Results
Found 9248 publication records. Showing 9248 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
64 | Jennifer Y.-L. Lo, Wu-An Kuo, Allen C.-H. Wu, TingTing Hwang |
A Custom-Cell Identification Method for High-Performance Mixed Standard/Custom-Cell Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 11102-11103, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
58 | Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha |
Custom-instruction synthesis for extensible-processor platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(2), pp. 216-228, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
57 | Laurence Bull, Peter Stañski, David Squire |
Content extraction signatures using XML digital signatures and custom transforms on-demand. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WWW ![In: Proceedings of the Twelfth International World Wide Web Conference, WWW 2003, Budapest, Hungary, May 20-24, 2003, pp. 170-177, 2003, ACM, 1-58113-680-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Net framework XML signature API, XML signature custom transforms, content extraction signatures, XML signatures, dynamic signature verification |
52 | Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha |
A Synthesis Methodology for Hybrid Custom Instruction and Coprocessor Generation for Extensible Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(11), pp. 2035-2045, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
52 | Vasian Cepa, Mira Mezini |
Declaring and Enforcing Dependencies Between .NET Custom Attributes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GPCE ![In: Generative Programming and Component Engineering: Third International Conference, GPCE 2004, Vancouver, Canada, October 24-28, 2004. Proceedings, pp. 283-297, 2004, Springer, 3-540-23580-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
52 | Michael Gansen, Frank Richter, Oliver Weiss, Tobias G. Noll |
A Datapath Generator for Full-Custom Macros of Iterative Logic Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 1997 International Conference on Application-Specific Systems, Architectures, and Processors (ASAP '97), 14-16 July 1997, Zurich, Switzerland, pp. 438-447, 1997, IEEE Computer Society, 0-8186-7958-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
52 | Andrew Chang 0001, William J. Dally |
Explaining the gap between ASIC and custom power: a custom perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 281-284, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
custom circuits, normalized metrics, low power, energy efficiency, ASIC, EDA, technology scaling |
51 | Ruchir Puri, William H. Joyner, Shekhar Borkar, Ty Garibay, Jonathan Lotz, Robert K. Montoye |
Custom is from Venus and synthesis from Mars. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 992, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
IC synthesis techniques, custom IC design, VLSI design |
50 | Juan A. Montiel-Nelson, V. de Armas, Roberto Sarmiento, Antonio Núñez |
A Cell and Macrocell Compiler for GaAs VLSI Full-Custom Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1998 Design, Automation and Test in Europe (DATE '98), February 23-26, 1998, Le Palais des Congrès de Paris, Paris, France, pp. 947-948, 1998, IEEE Computer Society, 0-8186-8359-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Gallium Arsenide automated layout generation system, GaAs VLSI design, power supply and ground distribution model, full-custom cell layout style, full-custom layouts of very high speed circuits, cell library builder, random logic macrocell generator, iterative logic array generator |
46 | Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose |
Soft vector processors vs FPGA custom hardware: measuring and reducing the gap. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, FPGA 2009, Monterey, California, USA, February 22-24, 2009, pp. 277, 2009, ACM, 978-1-60558-410-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
eembc, soft, viram, fpga, adaptable, vector, data parallel, processor, simd |
46 | Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha |
Hybrid Custom Instruction and Co-Processor Synthesis Methodology for Extensible Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 473-476, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
46 | Bruce R. Childers, Jack W. Davidson |
Custom Wide Counterflow Pipelines for High-Performance Embedded Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 53(2), pp. 141-158, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Counterflow pipelines, automatic architectural synthesis, application-specific processors |
46 | Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha |
Synthesis of Application-Specific Heterogeneous Multiprocessor Architectures Using Extensible Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 551-556, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
45 | Naren Datha, Tanuja Joshi, Joseph Joy, Vibhuti S. Sengar |
Custom local search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GIS ![In: 17th ACM SIGSPATIAL International Symposium on Advances in Geographic Information Systems, ACM-GIS 2009, November 4-6, 2009, Seattle, Washington, USA, Proceedings, pp. 424-427, 2009, ACM, 978-1-60558-649-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
custom location search, robust parsing, geocoding |
45 | Tao Li 0008, Zhigang Sun, Wu Jigang, Xicheng Lu |
Fast enumeration of maximal valid subgraphs for custom-instruction identification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2009 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2009, Grenoble, France, October 11-16, 2009, pp. 29-36, 2009, ACM. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
ISE identification, custom processors, maximal subgraph |
45 | Emre Özer 0001, Andy Nisbet, David Gregg |
A stochastic bitwidth estimation technique for compact and low-power custom processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 7(3), pp. 34:1-34:30, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Bit-width analysis, custom hardware, FPGA, statistical estimation, extreme value theory |
45 | Hai Lin 0004, Yunsi Fei |
Utilizing custom registers in application-specific instruction set processors for register spills elimination. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 323-328, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
custom register, ASIP, register file |
45 | Laurence Bull, David McG. Squire |
XML Signature Extensibility Using Custom Transforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WISE ![In: Web Information Systems - WISE 2004, 5th International Conference on Web Information Systems Engineering, Brisbane, Australia, November 22-24, 2004, Proceedings, pp. 102-112, 2004, Springer, 3-540-23894-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
XML Signature Custom Transforms, XML Signatures |
45 | José Carlos Alves, João Canas Ferreira, C. Albuquerque, José Fernando Oliveira, José Soeiro Ferreira, José Silva Matos |
FAFNER-Accelerating Nesting Problems with FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 21-23 April 1999, Napa, CA, USA, pp. 168-, 1999, IEEE Computer Society, 0-7695-0375-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Custom computing, nesting problems, FPGAs |
45 | Neil W. Bergmann, Yuk Ying Chung |
Video Compression on FPGA-Based Custom Computers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP (1) ![In: Proceedings 1997 International Conference on Image Processing, ICIP '97, Santa Barbara, California, USA, October 26-29, 1997, pp. 361-364, 1997, IEEE Computer Society, 0-8186-8183-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
FPGA-based custom computers, 2D DCT algorithms, Scalable Parallel Architecture for Concurrency Experiments, field programmable gate arrays, field programmable gate array, video compression, experimental result, SPACE, workstation, distributed arithmetic, super-computer, processing speed |
45 | Jason L. Dedrick, Sean Xin Xu, Kevin Zhu |
Information Technology and the Number of Suppliers in a Supply Chain: Is There a Relationship? ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 41st Hawaii International International Conference on Systems Science (HICSS-41 2008), Proceedings, 7-10 January 2008, Waikoloa, Big Island, HI, USA, pp. 390, 2008, IEEE Computer Society, 0-7695-3075-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
supply chain relationships, number of suppliers, electronic procurement, custom goods, systems integration, transaction costs economics |
41 | Nabeel Shirazi, Al Walters, Peter M. Athanas |
Quantitative analysis of floating point arithmetic on FPGA based custom computing machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 3rd IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '95), 19-21 April 1995, Napa Valley, CA, USA, pp. 155-163, 1995, IEEE Computer Society, 0-8186-7086-X. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
41 | Rick Amerson, Richard J. Carter, W. Bruce Culbertson, Philip Kuekes, Greg Snider |
Teramac-configurable custom computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 3rd IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '95), 19-21 April 1995, Napa Valley, CA, USA, pp. 32-38, 1995, IEEE Computer Society, 0-8186-7086-X. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
41 | Tao Li 0008, Wu Jigang, Siew Kei Lam, Thambipillai Srikanthan, Xicheng Lu |
Efficient Heuristic Algorithm for Rapid Custom-Instruction Selection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACIS-ICIS ![In: 8th IEEE/ACIS International Conference on Computer and Information Science, IEEE/ACIS ICIS 2009, June 1-3, 2009, Shanghai, China, pp. 266-270, 2009, IEEE Computer Society, 978-0-7695-3641-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
41 | Liana Razmerita, Niels Bjørn-Andersen |
Towards Ubiquitous e-Custom Services. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Web Intelligence ![In: 2007 IEEE / WIC / ACM International Conference on Web Intelligence, WI 2007, 2-5 November 2007, Silicon Valley, CA, USA, Main Conference Proceedings, pp. 833-837, 2007, IEEE Computer Society, 0-7695-3026-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
41 | Mehrdad Reshadi, Bita Gorjiara, Daniel D. Gajski |
Utilizing Horizontal and Vertical Parallelism with a No-Instruction-Set Compiler for Custom Datapaths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 23rd International Conference on Computer Design (ICCD 2005), 2-5 October 2005, San Jose, CA, USA, pp. 69-76, 2005, IEEE Computer Society, 0-7695-2451-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
40 | Elizeu Santos-Neto, Samer Al-Kiswany, Nazareno Andrade, Sathish Gopalakrishnan, Matei Ripeanu |
enabling cross-layer optimizations in storage systems with custom metadata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPDC ![In: Proceedings of the 17th International Symposium on High-Performance Distributed Computing (HPDC-17 2008), 23-27 June 2008, Boston, MA, USA, pp. 213-216, 2008, ACM, 978-1-59593-997-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
custom metadata, cross-layer optimization, distributed storage systems |
40 | David G. Chinnery, Kurt Keutzer |
Closing the power gap between ASIC and custom: an ASIC perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 275-280, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
power, energy, custom, ASIC, comparison, standard cell |
40 | Heidi E. Ziegler, Byoungro So, Mary W. Hall, Pedro C. Diniz |
Coarse-Grain Pipelining on Multiple FPGA Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), 22-24 April 2002, Napa, CA, USA, Proceedings, pp. 77-, 2002, IEEE Computer Society, 0-7695-1801-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Coarse-grain Pipelining, FPGA-based Custom Computing Machines, Parallelizing Compiler Analysis Techniques |
40 | Li-C. Wang, Magdy S. Abadir |
On Efficiently Producing Quality Tests for Custom Circuits in PowerPCTM Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 16(1-2), pp. 121-130, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
custom circuits, high level circuit extraction, ATPG, DFT, time-to-market |
40 | David G. Chinnery, Kurt Keutzer |
Closing the gap between ASIC and custom: an ASIC perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 637-642, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
custom, ASIC, comparison, clock frequency, clock speed |
40 | Bernardo Kastrup, Arjan Bink, Jan Hoogerbrugge |
ConCISe: A Compiler-Driven CPLD-Based Instruction Set Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 21-23 April 1999, Napa, CA, USA, pp. 92-, 1999, IEEE Computer Society, 0-7695-0375-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
XPLA, compilers, static-analysis, computer-architecture, reconfigurable-computing, compiler-optimizations, hardware-acceleration, programmable-logic, CPLD, custom-instructions |
40 | Eric Persoon |
A Pipelined Image Analysis System Using Custom Integrated Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Pattern Anal. Mach. Intell. ![In: IEEE Trans. Pattern Anal. Mach. Intell. 10(1), pp. 110-116, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
pipelined image analysis system, custom integrated circuits, iconic image-processing, mask generation, programmable image delay, subsample filtering, computer vision, computerised picture processing, pipeline processing, shape recognition, digital integrated circuits, computer vision system |
35 | Kubilay Atasu, Can C. Özturan, Günhan Dündar, Oskar Mencer, Wayne Luk |
CHIPS: Custom Hardware Instruction Processor Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(3), pp. 528-541, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
35 | Pan Yu, Tulika Mitra |
Disjoint Pattern Enumeration for Custom Instructions Identification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 273-278, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
35 | Bita Gorjiara, Daniel D. Gajski |
Custom Processor Design Using NISC: A Case-Study on DCT algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESTIMedia ![In: Proceedings of the 2005 3rd Workshop on Embedded Systems for Real-Time Multimedia, ESTIMedia 2005, September 22-23, 2005, New York Metropolitan Area, USA, pp. 55-60, 2005, IEEE Computer Society, 0-7803-9347-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
35 | Antonio Blotti, Roberto Saletti |
Ultralow-power adiabatic circuit semi-custom design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 12(11), pp. 1248-1253, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
35 | Chris Gniady, Babak Falsafi |
Speculative Sequential Consistency with Little Custom Storage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 2002 International Conference on Parallel Architectures and Compilation Techniques (PACT 2002), 22-25 September 2002, Charlottesville, VA, USA, pp. 179-188, 2002, IEEE Computer Society, 0-7695-1620-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
35 | Emery D. Berger, Benjamin G. Zorn, Kathryn S. McKinley |
Reconsidering custom memory allocation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
OOPSLA ![In: Proceedings of the 2002 ACM SIGPLAN Conference on Object-Oriented Programming Systems, Languages and Applications, OOPSLA 2002, Seattle, Washington, USA, November 4-8, 2002., pp. 1-12, 2002, ACM, 1-58113-471-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
35 | Narayanan Krishnamurthy, Jayanta Bhadra, Magdy S. Abadir, Jacob A. Abraham |
Is State Mapping Essential for Equivalence Checking Custom Memories in Scan-Based Designs? ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April - 2 May 2002, Monterey, CA, USA, pp. 275-280, 2002, IEEE Computer Society, 0-7695-1570-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
34 | Huynh Phung Huynh, Tulika Mitra |
Runtime Adaptive Extensible Embedded Processors - A Survey. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation, 9th International Workshop, SAMOS 2009, Samos, Greece, July 20-23, 2009. Proceedings, pp. 215-225, 2009, Springer, 978-3-642-03137-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
34 | Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha |
A Scalable Synthesis Methodology for Application-Specific Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(11), pp. 1175-1188, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Maged M. Michael, Ashwini K. Nanda, Beng-Hong Lim |
Coherence Controller Architectures for Scalable Shared-Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(2), pp. 245-255, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Coherence controller, protocol processor, multiprocessor, shared memory |
34 | Maged M. Michael, Ashwini K. Nanda, Beng-Hong Lim, Michael L. Scott |
Coherence Controller Architectures for SMP-Based CC-NUMA Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 24th International Symposium on Computer Architecture, Denver, Colorado, USA, June 2-4, 1997, pp. 219-228, 1997, ACM, 0-89791-901-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
34 | Daniel K. Beece, Jinjun Xiong, Chandu Visweswariah, Vladimir Zolotov, Yifang Liu |
Transistor sizing of custom high-performance digital circuits with parametric yield considerations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 781-786, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
custom circuits, optimization |
34 | João Miguel Ferro, Fernando J. Velez |
Routing in a Custom-Made IEEE 802.11E Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
World Congress on Engineering (Selected Papers) ![In: Advances in Electrical Engineering and Computational Science, [revised and extended papers from the World Congress on Engineering, WCE 2008, London, UK, July 2-4, 2008], pp. 243-253, 2008, Springer, 978-90-481-2310-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
IEEE 802.11E Simulator, Custom-Made, multi-hop environment, Routing, network simulation |
34 | Jayanta Bhadra, Andrew K. Martin, Jacob A. Abraham |
A Formal Framework for Verification of Embedded Custom Memories of the Motorola MPC7450 Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 27(1-2), pp. 67-112, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
efficient memory models, embedded memory verification, custom circuit verification, equivalence checking, symbolic trajectory evaluation |
34 | GuangWei Zou, Xiang Liu |
An Efficient Approach to Custom Instruction Set Generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2005), 17-19 August 2005, Hong Kong, China, pp. 547-550, 2005, IEEE Computer Society, 0-7695-2346-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Major Block, Profiling, Hardware Acceleration, ASIPs, Custom Instruction |
34 | Javier Ramírez 0001, Uwe Meyer-Bäse, Fred J. Taylor, Antonio García 0001, Antonio Lloris-Ruíz |
Design and Implementation of High-Performance RNS Wavelet Processors Using Custom IC Technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 34(3), pp. 227-237, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
RNS arithmetic, custom integrated circuit, field-programmable logic devices, discrete wavelet transform |
34 | Barbara Cannas, Gianni Celli, Alessandra Fanni, Fabrizio Pilo |
Automated Recurrent Neural Network Design of a Neural Controller in a Custom Power Device. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Intell. Robotic Syst. ![In: J. Intell. Robotic Syst. 31(1-3), pp. 229-251, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
custom power protection device, universal Tabu Search, recurrent neural networks, neural controller |
34 | Apostolos Dollas, Euripides Sotiriades, Apostolos Emmanouelides |
Architecture and Design of GE1, a FCCM for Golomb Ruler Derivation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 15-17 April 1998, Napa Valley, CA, USA, pp. 48-56, 1998, IEEE Computer Society, 0-8186-8900-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
FPGA, Architecture, Custom, Golomb Ruler |
34 | Venkat Thanvantri, Sartaj Sahni |
Optimal folding of standard and custom cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 1(1), pp. 123-143, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
custom cell folding, standard cell folding, layout area |
33 | Hamid Noori, Farhad Mehdipour, Kazuaki J. Murakami, Koji Inoue, Morteza Saheb Zamani |
An architecture framework for an adaptive extensible processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 45(3), pp. 313-340, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Reconfigurable functional unit, Profiling, Temporal partitioning, Custom instruction, Extensible processor, Similarity detection |
33 | Guy G. Lemieux, Tarek A. El-Ghazawi |
Designing with extreme parallelism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008, pp. 1-2, 2008, ACM, 978-1-59593-934-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
custom compute engine, high-level electronic design, FPGA, parallel processing, reconfigurable computing, hardware description language |
33 | Beng-Hong Lim, Philip Heidelberger, Pratap Pattnaik, Marc Snir |
Message Proxies for Efficient, Protected Communication on SMP Clusters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture (HPCA '97), San Antonio, Texas, USA, February 1-5, 1997, pp. 116-127, 1997, IEEE Computer Society, 0-8186-7764-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
message proxies, protected communication, custom hardware, IBM Model G30 SMPs, cache-miss latency, cache-update mechanism, performance model, multiprocessing systems, symmetric multiprocessor clusters |
30 | Jackson H. C. Yeung, C. C. Tsang, Kuen Hung Tsoi, Bill S. H. Kwan, Chris C. C. Cheung, Anthony P. C. Chan, Philip Heng Wai Leong |
Map-reduce as a Programming Model for Custom Computing Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2008, 14-15 April 2008, Stanford, Palo Alto, California, USA, pp. 149-159, 2008, IEEE Computer Society, 978-0-7695-3307-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Christian Plessl, Marco Platzner |
Custom Computing Machines for the Set Covering Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), 22-24 April 2002, Napa, CA, USA, Proceedings, pp. 163-172, 2002, IEEE Computer Society, 0-7695-1801-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
30 | Mark J. Boyd, Tracy Larrabee |
A Scalable, Loadable Custom Programmable Logic Device for Solving Boolean Satisfiability Problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 17-19 April 2000, Napa Valley, CA, USA, Proceedings, pp. 13-21, 2000, IEEE Computer Society, 0-7695-0871-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
30 | W. Bruce Culbertson, Rick Amerson, Richard J. Carter, Philip Kuekes, Greg Snider |
Defect tolerance on the Teramac custom computer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97), 16-18 April 1997, Napa Valley, CA, USA, pp. 116-124, 1997, IEEE Computer Society, 0-8186-8159-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
30 | Neil W. Bergmann, Yuk Ying Chung, Bernard K. Gunther |
Efficient implementation of the DCT on custom computers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97), 16-18 April 1997, Napa Valley, CA, USA, pp. 244-245, 1997, IEEE Computer Society, 0-8186-8159-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
30 | Glenn H. Chapman, Benoit Dufort |
Laser defect correction applications to FPGA based custom computers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97), 16-18 April 1997, Napa Valley, CA, USA, pp. 240-241, 1997, IEEE Computer Society, 0-8186-8159-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
30 | Kazuhiro Hayashi, Toshiaki Miyazaki, Kazuhiro Shirakawa, Kazuhisa Yamada, Naohisa Ohta |
Reconfigurable real-time signal transport system using custom FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 3rd IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '95), 19-21 April 1995, Napa Valley, CA, USA, pp. 68-77, 1995, IEEE Computer Society, 0-8186-7086-X. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
30 | Wayne Luk |
A declarative approach to incremental custom computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 3rd IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '95), 19-21 April 1995, Napa Valley, CA, USA, pp. 164-172, 1995, IEEE Computer Society, 0-8186-7086-X. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
29 | Zhanpeng Jin, Richard Neil Pittman, Alessandro Forin |
Reconfigurable custom floating-point instructions (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, FPGA 2010, Monterey, California, USA, February 21-23, 2010, pp. 287, 2010, ACM, 978-1-60558-911-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
emips, reconfigurable, extension, floating-point, partial reconfiguration |
29 | Siddharth Garg, Diana Marculescu, Radu Marculescu |
Custom feedback control: enabling truly scalable on-chip power management for MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010, pp. 425-430, 2010, ACM, 978-1-4503-0146-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
distributed control, dynamic voltage/frequency scaling |
29 | Hai Lin 0004, Yunsi Fei |
Exploring custom instruction synthesis for application-specific instruction set processors with multiple design objectives. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010, pp. 141-146, 2010, ACM, 978-1-4503-0146-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
asips, multi-objective design |
29 | Vinayak Honkote, Baris Taskin |
PEEC based parasitic modeling for power analysis on custom rotary rings. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010, pp. 111-116, 2010, ACM, 978-1-4503-0146-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
resonant clocking, simulation, modeling, interconnect |
29 | Vinayak Honkote, Baris Taskin |
Custom rotary clock router. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 26th International Conference on Computer Design, ICCD 2008, 12-15 October 2008, Lake Tahoe, CA, USA, Proceedings, pp. 114-119, 2008, IEEE Computer Society, 978-1-4244-2657-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Kang Zhao, Jinian Bian, Sheqin Dong, Yang Song 0002, Satoshi Goto |
HyMacs: hybrid memory access optimization based on custom-instruction scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, Orlando, Florida, USA, May 4-6, 2008, pp. 89-94, 2008, ACM, 978-1-59593-999-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
asip, cad algorithm, hardware/software co-design |
29 | Nagaraju Pothineni, Anshul Kumar, Kolin Paul |
A Novel Approach to Compute Spatial Reuse in the Design of Custom Instructions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India, pp. 348-353, 2008, IEEE Computer Society, 0-7695-3083-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Hamid Noori, Farhad Mehdipour, Kazuaki J. Murakami, Koji Inoue, Maziar Goudarzi |
Interactive presentation: Generating and executing multi-exit custom instructions for an adaptive extensible processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 325-330, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
29 | Su-Shin Ang, George A. Constantinides, Wayne Luk, Peter Y. K. Cheung |
A Hybrid Memory Sub-system for Video Coding Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2007, 23-25 April 2007, Napa, California, USA, pp. 317-318, 2007, IEEE Computer Society, 0-7695-2940-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
29 | Alin Jula, Lawrence Rauchwerger |
Custom Memory Allocation for Free. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing, 19th International Workshop, LCPC 2006, New Orleans, LA, USA, November 2-4, 2006. Revised Papers, pp. 299-313, 2006, Springer, 978-3-540-72520-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Lorenz Huelsbergen |
Fast evolution of custom machine representations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Congress on Evolutionary Computation ![In: Proceedings of the IEEE Congress on Evolutionary Computation, CEC 2005, 2-4 September 2005, Edinburgh, UK, pp. 97-104, 2005, IEEE, 0-7803-9363-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Pan Yu, Tulika Mitra |
Satisfying real-time constraints with custom instructions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2005, Jersey City, NJ, USA, September 19-21, 2005, pp. 166-171, 2005, ACM, 1-59593-161-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
real-time systems, execution time, instruction-set extensions, worst-case, customizable processors |
29 | Krishnan Srinivasan, Karam S. Chatha |
ISIS: A Genetic Algorithm Based Technique for Custom On-Chip Interconnection Network Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 623-628, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Shannon Xu, Thomas R. Dean |
Transforming Embedded Java Code into Custom Tags. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCAM ![In: 5th IEEE International Workshop on Source Code Analysis and Manipulation (SCAM 2005), 30 September - 1 October 2005, Budapest, Hungary, pp. 173-182, 2005, IEEE Computer Society, 0-7695-2290-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Shawn Phillips, Scott Hauck |
Automating the Layout of Reconfigurable Subsystems Using Circuit Generators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 17-20 April 2005, Napa, CA, USA, Proceedings, pp. 203-212, 2005, IEEE Computer Society, 0-7695-2445-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Rick Mugridge |
Test Driving Custom Fit Fixtures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
XP ![In: Extreme Programming and Agile Processes in Software Engineering, 5th International Conference, XP 2004, Garmisch-Partenkirchen, Germany, June 6-10, 2004, Proceedings, pp. 11-19, 2004, Springer, 3-540-22137-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Customer testing, tdd, it |
29 | Marcos Martínez Peiró, Francisco José Ballester-Merelo, Guillermo Payá Vayá, Ricardo José Colom-Palero, Rafael Gadea Gironés, J. Belenguer |
FPGA Custom DSP for ECG Signal Analysis and Compression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings, pp. 954-958, 2004, Springer, 3-540-22989-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Dan Kuyper, Hesham H. Ali, Amr M. Mohamed, Steven H. Hinrichs |
Identification of Mycobacterium Species Using Curated Custom Databases. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), CD-ROM / Abstracts Proceedings, 26-30 April 2004, Santa Fe, New Mexico, USA, 2004, IEEE Computer Society, 0-7695-2132-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Pan Yu, Tulika Mitra |
Scalable custom instructions identification for instruction-set extensible processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2004 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2004, Washington DC, USA, September 22 - 25, 2004, pp. 69-78, 2004, ACM, 1-58113-890-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
subgraph enumeration algorithm, ASIPs, instruction-set extensions, customizable processors |
29 | Juan Antonio Carballo, Jeffrey L. Burns, Seung-Moon Yoo, Ivan Vo, V. Robert Norman |
A semi-custom voltage-island technique and its application to high-speed serial links. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003, pp. 60-65, 2003, ACM, 1-58113-682-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
island, voltage, communications, low power, links, serial |
29 | Mihai Sima, Stamatis Vassiliadis, Sorin Cotofana, Jos T. J. van Eijndhoven, Kees A. Vissers |
Field-Programmable Custom Computing Machines - A Taxonomy -. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 79-88, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Paul P. Polanski, Robert B. Johnston |
International Custom as a Source of Law in Global Electronic Commerce. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 35th Hawaii International Conference on System Sciences (HICSS-35 2002), CD-ROM / Abstracts Proceedings, 7-10 January 2002, Big Island, HI, USA, pp. 166, 2002, IEEE Computer Society, 0-7695-1435-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Bruce R. Childers, Jack W. Davidson |
Custom Wide Counterflow Pipelines for High-Performance Embedded Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques (PACT'00), Philadelphia, Pennsylvania, USA, October 15-19, 2000, pp. 57-70, 2000, IEEE Computer Society, 0-7695-0622-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
29 | Andrew A. Duncan, David C. Hendry, Peter Gray |
An Overview of the COBRA-ABS High Level Synthesis System for Multi-FPGA Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 15-17 April 1998, Napa Valley, CA, USA, pp. 106-115, 1998, IEEE Computer Society, 0-8186-8900-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
29 | James B. Peterson, Peter M. Athanas |
High-speed 2-D convolution with a custom computing machine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 12(1), pp. 7-19, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
29 | R. Larry Dooley, G. Heimke, Ajit Dingankar, E. Berg, E. Kimbrough |
Automated Design and Analysis System for Design of Custom Orthopedic Implants. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEA/AIE (Vol. 1) ![In: Proceedings of the First International Conference on Industrial & Engineering Applications of Artificial Intelligence & Expert Systems, IEA/AIE 1988, June 1-3, 1988, Tullahoma, TN, USA. ACM, 1988 - Volume 1, pp. 405-412, 1988, ACM, 0-89791-271-3. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
LISP |
28 | Robert Law |
Using student blogs for documentation in software development projects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITiCSE ![In: Proceedings of the 16th Annual SIGCSE Conference on Innovation and Technology in Computer Science Education, ITiCSE 2011, Darmstadt, Germany, June 27-29, 2011, pp. 366, 2011, ACM, 978-1-4503-0697-3. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
28 | Matthew Canton |
The presence table: a reactive surface for ambient connection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TEI ![In: Proceedings of the 5th International Conference on Tangible and Embedded Interaction 2011, Funchal, Madeira, Portugal, January 22-26, 2011, pp. 401-402, 2011, ACM, 978-1-4503-0478-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
28 | Muhammad Bilal Anwer, Murtaza Motiwala, Muhammad Mukarram Bin Tariq, Nick Feamster |
SwitchBlade: a platform for rapid deployment of network protocols on programmable hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGCOMM ![In: Proceedings of the ACM SIGCOMM 2010 Conference on Applications, Technologies, Architectures, and Protocols for Computer Communications, New Delhi, India, August 30 -September 3, 2010, pp. 183-194, 2010, ACM, 978-1-4503-0201-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
network virtualization, NetFPGA |
28 | Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha |
Application-specific heterogeneous multiprocessor synthesis using extensible processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(9), pp. 1589-1602, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
28 | Trieu C. Chieu, Florian Pinel, Jih-Shyr Yih |
Unified Commerce Server Architecture for Large Number of Enterprise Stores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CEC ![In: 2004 IEEE International Conference on E-Commerce Technology (CEC 2004), 6-9 July 2004, San Diego, CA, USA, pp. 93-100, 2004, IEEE Computer Society, 0-7695-2098-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
28 | Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha |
A Scalable Application-Specific Processor Synthesis Methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2003 International Conference on Computer-Aided Design, ICCAD 2003, San Jose, CA, USA, November 9-13, 2003, pp. 283-290, 2003, IEEE Computer Society / ACM, 1-58113-762-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
28 | Nianjun Zhou, Da Peng An, Liang-Jie Zhang, Chih-Hong Wong |
Leveraging Cloud Platform for Custom Application Development. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE SCC ![In: IEEE International Conference on Services Computing, SCC 2011, Washington, DC, USA, 4-9 July, 2011, pp. 584-591, 2011, IEEE Computer Society, 978-1-4577-0863-3. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
custom application development, solution workbench, project assembly, cloud image, team collaboration, asset reuse, cloud computing, project management |
28 | Marcio Juliato, Catherine H. Gebotys |
Tailoring a Reconfigurable Platform to SHA-256 and HMAC through Custom Instructions and Peripherals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings, pp. 195-200, 2009, IEEE Computer Society, 978-0-7695-3917-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Processor Specialization, SHA-2, Cryptography, HMAC, HW/SW Partitioning, Co-Processor, Custom Instruction |
28 | Ajay Kumar Verma, Philip Brisk, Paolo Ienne |
Rethinking custom ISE identification: a new processor-agnostic method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 125-134, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
ISE identification, custom processors, maximal cluster |
28 | Ilias Tagkopoulos, Charles A. Zukowski, German Cavelier, Dimitris Anastassiou |
A custom FPGA for the simulation of gene regulatory networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, Washington, DC, USA, April 28-29, 2003, pp. 132-135, 2003, ACM, 1-58113-677-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
custom mixed signal FPGA, genetic pathways, gene regulatory networks |
28 | Pedro C. Diniz, Joonseok Park |
Data Search and Reorganization Using FPGAs: Application to Spatial Pointer-based Data Structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 8-11 April 2003, Napa, CA, USA, Proceedings, pp. 207-217, 2003, IEEE Computer Society, 0-7695-1979-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Custom Computing, Data search and Data Reorganization Engines, Hardware support for Pointer Operations, Field-Programmable- Gate-Arrays (FPGAs) |
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