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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 417 occurrences of 279 keywords
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Results
Found 711 publication records. Showing 711 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
86 | David Szczesny, Sebastian Hessel, Felix Bruns, Attila Bilgic |
On-the-fly hardware acceleration for protocol stack processing in next generation mobile devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2009, Grenoble, France, October 11-16, 2009, pp. 155-162, 2009, ACM, 978-1-60558-628-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
embedded systems, real-time, hardware acceleration, virtual prototyping, hardware/software co-design, LTE, DMA |
40 | Holger Scherl, Stefan Hoppe, Markus Kowarschik, Joachim Hornegger |
Design and implementation of the software architecture for a 3-D reconstruction system in medical imaging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSE ![In: 30th International Conference on Software Engineering (ICSE 2008), Leipzig, Germany, May 10-18, 2008, pp. 661-668, 2008, ACM, 978-1-60558-079-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
hardware abstraction layer, software design and architecture, parallel programming, patterns, medical imaging, hardware acceleration, 3-d reconstruction |
40 | H. Andrés Lagar-Cavilla, Niraj Tolia, Mahadev Satyanarayanan, Eyal de Lara |
VMM-independent graphics acceleration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VEE ![In: Proceedings of the 3rd International Conference on Virtual Execution Environments, VEE 2007, San Diego, California, USA, June 13-15, 2007, pp. 33-43, 2007, ACM, 978-1-59593-630-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
VMM-independence, virtualization, graphics, portability, hardware acceleration |
37 | Joel Coburn, Srivaths Ravi 0001, Anand Raghunathan |
Power emulation: a new paradigm for power estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 700-705, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
simulation, FPGA, design, design methodologies, emulation, hardware acceleration, power estimation, register-transfer level, macromodels |
37 | Stephan Gatzka, Christian Hochberger |
On the Scope of Hardware Acceleration of Reconfigurable Processors in Mobile Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 38th Hawaii International Conference on System Sciences (HICSS-38 2005), CD-ROM / Abstracts Proceedings, 3-6 January 2005, Big Island, HI, USA, 2005, IEEE Computer Society, 0-7695-2268-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
35 | Tse-Wei Chen 0001, Yi-Ling Chen 0008, Shao-Yi Chien |
Photo Retrieval Based on Spatial Layout with Hardware Acceleration for Mobile Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Mob. Comput. ![In: IEEE Trans. Mob. Comput. 10(11), pp. 1646-1660, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
image segmentation, parallel processing, hardware acceleration, K-Means clustering, Photo retrieval |
35 | Stephen L. Smith 0002, Andrew J. Greensted, Jon Timmis |
Hardware Acceleration of an Immune Network Inspired Evolutionary Algorithm for Medical Diagnosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICES ![In: Evolvable Systems: From Biology to Hardware, 8th International Conference, ICES 2008, Prague, Czech Republic, September 21-24, 2008. Proceedings, pp. 34-46, 2008, Springer, 978-3-540-85856-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Parkinson’s disease, Evolutionary algorithm, Artificial immune systems, Hardware acceleration, Immune networks |
35 | Qinru Qiu, Daniel J. Burns, Prakash Mukre, Qing Wu 0002 |
Hardware acceleration of multi-deme genetic algorithm for the application of DNA codeword searching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO ![In: Genetic and Evolutionary Computation Conference, GECCO 2007, Proceedings, London, England, UK, July 7-11, 2007, pp. 1349-1356, 2007, ACM, 978-1-59593-697-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
genetic algorithm, hardware acceleration, DNA |
35 | Chengyu Sun, Divyakant Agrawal, Amr El Abbadi |
Hardware Acceleration for Spatial Selections and Joins. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMOD Conference ![In: Proceedings of the 2003 ACM SIGMOD International Conference on Management of Data, San Diego, California, USA, June 9-12, 2003, pp. 455-466, 2003, ACM, 1-58113-634-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
spatial selection, hardware acceleration, spatial join |
35 | Srihari Cadambi, Chandra Mulpuri, Pranav Ashar |
A fast, inexpensive and scalable hardware acceleration technique for functional simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 570-575, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
FPGA, hardware acceleration, VLIW, functional simulation |
35 | Lisa M. Sobierajski, Ricardo S. Avila |
A Hardware Acceleration Method for Volumetric Ray Tracing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Visualization ![In: 6th IEEE Visualization Conference, IEEE Vis 1995, Atlanta, GA, USA, October 29 - November 3, 1995, Proceedings, pp. 27-34, 1995, IEEE Computer Society Press, 0-8186-7187-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
Volume Rendering, Ray Tracing, Hardware Acceleration |
35 | Yajun Ha, Radovan Hipik, Serge Vernalde, Diederik Verkest, Marc Engels, Rudy Lauwereins, Hugo De Man |
Adding Hardware Support to the HotSpot Virtual Machine for Domain Specific Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 1135-1138, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
32 | Robert W. Horst |
IP Storage and the CPU Consumption Myth. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NCA ![In: IEEE International Symposium on Network Computing and Applications (NCA 2001), October 8-10, 2001, Cambridge, MA, USA, pp. 194-200, 2001, IEEE Computer Society, 0-7695-1432-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
32 | Bruno Zatt, Valter Ferreira, Luciano Volcan Agostini, Flávio Rech Wagner, Altamiro Amadeu Susin, Sergio Bampi |
Motion Compensation Hardware Accelerator Architecture for H.264/AVC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PSIVT ![In: Advances in Image and Video Technology, Second Pacific Rim Symposium, PSIVT 2007, Santiago, Chile, December 17-19, 2007, Proceedings, pp. 24-35, 2007, Springer, 978-3-540-77128-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
MPEG-4 AVC, Video Coding, H.264/AVC, Motion Compensation, Hardware Acceleration |
32 | M. Ernst, Michael Jung 0002, Felix Madlener, Sorin A. Huss, Rainer Blümel |
A Reconfigurable System on Chip Implementation for Elliptic Curve Cryptography over GF(2n). ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2002, 4th International Workshop, Redwood Shores, CA, USA, August 13-15, 2002, Revised Papers, pp. 381-399, 2002, Springer, 3-540-00409-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
$ mathbb {GF}(2^n)$ arithmetic, Karatsuba multiplication, VHDL model generator, coprocessor synthesis, FPGA hardware acceleration, Atmel FPSLIC platform, Elliptic Curve cryptography |
31 | Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong-Min Kyung |
Communication-efficient hardware acceleration for fast functional simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 293-298, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
functional verification, communication overhead, simulation acceleration |
29 | Zhengdong Kang |
Hardware acceleration of the SED algorithm for Biomolecular activity predictionBiomolecular activity algorithm (SED) uses FPGA parallel programmability to achieve hardware acceleration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISAIMS ![In: Proceedings of the 2023 4th International Symposium on Artificial Intelligence for Medicine Science, ISAIMS 2023, Chengdu, China, October 20-22, 2023, pp. 1136-1140, 2023, ACM. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
29 | Sejong Oh, Tag Gon Kim, Jeonghun Cho, Elaheh Bozorgzadeh |
Speculative Loop-Pipelining in Binary Translation for Hardware Acceleration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(3), pp. 409-422, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
27 | Thomas Lenart, Mats Gustafsson, Viktor Öwall |
A Hardware Acceleration Platform for Digital Holographic Imaging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 52(3), pp. 297-311, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
digital holography, flexible FFT, data scaling, hybrid floating-point, burst oriented memory, matrix transpose |
25 | Vassilis Dimopoulos, Giorgos Papadopoulos, Dionisios N. Pnevmatikatos |
On the Importance of Header Classification in HW/SW Network Intrusion Detection Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Panhellenic Conference on Informatics ![In: Advances in Informatics, 10th Panhellenic Conference on Informatics, PCI 2005, Volos, Greece, November 11-13, 2005, Proceedings, pp. 661-671, 2005, Springer, 3-540-29673-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Dionisis Chaikalis, Georgios Passalis, Nikos Sgouros, Dimitris Maroulis, Theoharis Theoharis |
Hardware Acceleration for 3D Image Reconstruction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Panhellenic Conference on Informatics ![In: Panhellenic Conference on Informatics, PCI 2008, August 28-30, 2008, Samos Island, Greece, Proceedings, pp. 147-151, 2008, IEEE Computer Society, 978-0-7695-3323-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
25 | David J. Lau, Orion Pritchard |
Rapid System-on-a-Programmable-Chip Development and Hardware Acceleration Of ANSI C Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-6, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Suhaib A. Fahmy, Peter Y. K. Cheung, Wayne Luk |
Hardware Acceleration of Hidden Markov Model Decoding for Person Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 8-13, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Philip M. Spira, Carl Hage |
Hardware acceleration of gate array layout. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 22nd ACM/IEEE conference on Design automation, DAC 1985, Las Vegas, Nevada, USA, 1985., pp. 359-366, 1985, ACM, 0-8186-0635-5. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
|
23 | Emilien Fournier |
Accélération matérielle de la vérification de sûreté et vivacité sur des architectures reconfigurables. (Hardware acceleration of safety and liveness verification on reconfigurable architectures). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2022 |
RDF |
|
23 | Marco Pagani |
Enabling Predictable Hardware Acceleration in Heterogeneous SoC-FPGA Computing Platforms. (Techniques pour l'amélioration de la prévisibilité de l'accélération matérielle pour les plateformes informatiques hétérogènes SoC-FPGA). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2020 |
RDF |
|
23 | Andrea Bocco |
A variable precision hardware acceleration for scientific computing. (Une accélération matérielle à précision variable pour le calcul scientifique). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2020 |
RDF |
|
23 | Joël Cathébras |
Hardware Acceleration for Homomorphic Encryption. (Accélération matérielle pour la cryptographie homomorphe). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2018 |
RDF |
|
23 | Maxime Legendre |
Accélération algorithmique et matérielle des méthodes d'estimation de cartes d'abondances en imagerie hyperspectrale. (Algorithmic and hardware acceleration of abundance maps estimation methods in hyperspectral imaging). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2015 |
RDF |
|
23 | Kenneth L. Rice, Tarek M. Taha, Christopher N. Vutsinas |
Scaling analysis of a neocortex inspired cognitive model on the Cray XD1. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 47(1), pp. 21-43, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Cognitive algorithms, Performance scaling, Parallel computing, Reconfigurable computing |
23 | Shih-Hao Wang, Wen-Hsiao Peng, Yuwen He, Guan-Yi Lin, Cheng-Yi Lin, Shih-Chien Chang, Chung-Neng Wang, Tihao Chiang |
A Software-Hardware Co-Implementation of MPEG-4 Advanced Video Coding (AVC) Decoder with Block Level Pipelining. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 41(1), pp. 93-110, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
advanced video coding (AVC), joint video team (JVT), software-hardware co-implementation, MB level pipelining, H.264, MPEG-4, task partition |
23 | Wenyin Fu, Katherine Compton |
An execution environment for reconfigurable computing (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, FPGA 2005, Monterey, California, USA, February 20-22, 2005, pp. 267, 2005, ACM, 1-59593-029-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Oskar Mencer |
ASC: a stream compiler for computing with FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(9), pp. 1603-1617, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Imre Pechan, Béla Fehér |
Molecular Docking on FPGA and GPU Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: International Conference on Field Programmable Logic and Applications, FPL 2011, September 5-7, Chania, Crete, Greece, pp. 474-477, 2011, IEEE Computer Society, 978-1-4577-1484-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
FPGA vs, AutoDock, bioinformatics, GPU, hardware acceleration, molecular docking |
21 | Souradip Sarkar, Gaurav Ramesh Kulkarni, Partha Pratim Pande, Ananth Kalyanaraman |
Network-on-Chip Hardware Accelerators for Biological Sequence Alignment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 59(1), pp. 29-41, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
DNA/protein sequence alignment, on-chip parallelism, bioinformatics, Network-on-chip, hardware acceleration |
21 | Ramin Mafi, Shahin Sirouspour, Behzad Mahdavikhah, Brian Moody, Kaveh Elizeh, Adam B. Kinsman, Nicola Nicolici |
A Parallel Computing Platform for Real-Time Haptic Interaction with Deformable Bodies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Haptics ![In: IEEE Trans. Haptics 3(3), pp. 211-223, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Object deformation, FPGA, parallel computing, haptics, finite element method, hardware acceleration, real-time simulation |
21 | Maxwell Walton, Gary Gréwal, Gerarda A. Darlington |
Parallel FPGA-based implementation of scatter search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO ![In: Genetic and Evolutionary Computation Conference, GECCO 2010, Proceedings, Portland, Oregon, USA, July 7-11, 2010, pp. 1075-1082, 2010, ACM, 978-1-4503-0072-8. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
0-1 knapsack problem, field programmable gate arrays, pipelining, hardware acceleration, data parallelism, scatter search |
21 | René Müller 0001, Jens Teubner |
FPGAs: a new point in the database design space. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDBT ![In: EDBT 2010, 13th International Conference on Extending Database Technology, Lausanne, Switzerland, March 22-26, 2010, Proceedings, pp. 721-723, 2010, ACM, 978-1-60558-945-9. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
FPGA, VLSI, hardware acceleration, data processing |
21 | Ningyi Xu, Xiongfei Cai, Rui Gao, Lei Zhang 0001, Feng-Hsiung Hsu |
FPGA Acceleration of RankBoost in Web Search Engines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 1(4), pp. 19:1-19:19, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
FPGA, hardware acceleration |
21 | Peter Bertels, Wim Heirman, Erik H. D'Hollander, Dirk Stroobandt |
Efficient memory management for hardware accelerated Java Virtual Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 14(4), pp. 48:1-48:18, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Java Virtual Machine, hardware acceleration, Dynamic memory management |
21 | Xavier Llorà, Anusha Priya, Rohit Bhargava |
Observer-invariant histopathology using genetics-based machine learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Nat. Comput. ![In: Nat. Comput. 8(1), pp. 101-120, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Observer-invariant histopathology, Vector instruction, MPI, Learning Classifier Systems, Hardware acceleration, Massive parallelism, Genetics-based machine learning, SSE2 |
21 | Yotam Livny, Zvi Kogan, Jihad El-Sana |
Seamless patches for GPU-based terrain rendering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Vis. Comput. ![In: Vis. Comput. 25(3), pp. 197-208, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Level-of-detail rendering, Hardware acceleration, Terrain visualization, View-dependent rendering |
21 | René Müller 0001, Jens Teubner |
FPGA: what's in it for a database? ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMOD Conference ![In: Proceedings of the ACM SIGMOD International Conference on Management of Data, SIGMOD 2009, Providence, Rhode Island, USA, June 29 - July 2, 2009, pp. 999-1004, 2009, ACM, 978-1-60558-551-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
data processing vlsi, fpga, hardware acceleration |
21 | Jonathan Rohrer, Kubilay Atasu, Jan van Lunteren, Christoph Hagleitner |
Memory-efficient distribution of regular expressions for fast deep packet inspection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2009, Grenoble, France, October 11-16, 2009, pp. 147-154, 2009, ACM, 978-1-60558-628-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
regular expression, hardware acceleration, network intrusion detection, DFA, deep packet inspection |
21 | Srihari Cadambi, Igor Durdanovic, Venkata Jakkula, Murugan Sankaradass, Eric Cosatto, Srimat T. Chakradhar, Hans Peter Graf |
A Massively Parallel FPGA-Based Coprocessor for Support Vector Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: FCCM 2009, 17th IEEE Symposium on Field Programmable Custom Computing Machines, Napa, California, USA, 5-7 April 2009, Proceedings, pp. 115-122, 2009, IEEE Computer Society, 978-0-7695-3716-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Machine Learning, FPGAs, Support Vector Machines, Parallel Architectures, Hardware Acceleration |
21 | Peter Bertels, Wim Heirman, Dirk Stroobandt |
Strategies for dynamic memory allocation in hybrid architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 6th Conference on Computing Frontiers, 2009, Ischia, Italy, May 18-20, 2009, pp. 217-220, 2009, ACM, 978-1-60558-413-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
java, memory management, hardware acceleration |
21 | Yotam Livny, Michael Press, Jihad El-Sana |
Interactive GPU-based adaptive cartoon-style rendering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Vis. Comput. ![In: Vis. Comput. 24(4), pp. 239-247, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Cartoon rendering, Hardware acceleration, View-dependent rendering |
21 | Li Zhao 0002, Laxmi N. Bhuyan, Ravi R. Iyer 0001, Srihari Makineni, Donald Newell |
Hardware Support for Accelerating Data Movement in Server Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 56(6), pp. 740-753, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Copy engine, performance evaluation, TCP/IP, hardware acceleration, servers |
21 | Ove Daae Lampe, Ivan Viola, Nathalie Reuter, Helwig Hauser |
Two-Level Approach to Efficient Visualization of Protein Dynamics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Vis. Comput. Graph. ![In: IEEE Trans. Vis. Comput. Graph. 13(6), pp. 1616-1623, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
protein dynamics, hardware acceleration, Molecular visualization |
21 | Andrew Kinane, Noel E. O'Connor |
Energy-efficient Hardware Accelerators for the SA-DCT and Its Inverse. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 47(2), pp. 127-152, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
shape adaptive DCT/IDCT, low power, MPEG-4, hardware acceleration, video objects |
21 | José M. González, Vern Paxson, Nicholas Weaver |
Shunting: a hardware/software architecture for flexible, high-performance network intrusion prevention. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCS ![In: Proceedings of the 2007 ACM Conference on Computer and Communications Security, CCS 2007, Alexandria, Virginia, USA, October 28-31, 2007, pp. 139-149, 2007, ACM, 978-1-59593-703-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
nips, fpga, intrusion detection, hardware acceleration, intrusion prevention, nids |
21 | Nicholas Weaver, Vern Paxson, José M. González |
The shunt: an FPGA-based accelerator for network intrusion prevention. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, FPGA 2007, Monterey, California, USA, February 18-20, 2007, pp. 199-206, 2007, ACM, 978-1-59593-600-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
FPGA, intrusion detection, hardware acceleration, NIC |
21 | Robert Cochran, Jay E. Steele |
Second-order illumination in real-time (student paper). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Southeast Regional Conference ![In: Proceedings of the 45th Annual Southeast Regional Conference, 2007, Winston-Salem, North Carolina, USA, March 23-24, 2007, pp. 13-18, 2007, ACM, 978-1-59593-629-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
GPU processing, global illumination, hardware acceleration, realtime rendering |
21 | Kin Fun Li, Darshika G. Perera |
An Investigation of Chip-Level Hardware Support for Web Mining. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA Workshops (1) ![In: 21st International Conference on Advanced Information Networking and Applications (AINA 2007), Workshops Proceedings, Volume 1, May 21-23, 2007, Niagara Falls, Canada, pp. 341-348, 2007, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
web mining, hardware acceleration, platform-based design, cosine similarity |
21 | Alfred R. Fuller, Harinarayan Krishnan, Karim Mahrous, Bernd Hamann, Kenneth I. Joy |
Real-time procedural volumetric fire. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SI3D ![In: Proceedings of the 2007 Symposium on Interactive 3D Graphics, SI3D 2007, April 30 - May 2, 2007, Seattle, Washington, USA, pp. 175-180, 2007, ACM, 978-1-59593-628-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
fire modeling, volume rendering, hardware acceleration, free-form deformation |
21 | Haitao Zhang, Arie E. Kaufman |
Interactive Point-based Isosurface Exploration and High-quality Rendering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Vis. Comput. Graph. ![In: IEEE Trans. Vis. Comput. Graph. 12(5), pp. 1267-1274, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
point-based visualization, hardware acceleration, Isosurface, isosurface extraction, GPU acceleration |
21 | Eric B. Lum, James Shearer, Kwan-Liu Ma |
Interactive multi-scale exploration for volume classification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Vis. Comput. ![In: Vis. Comput. 22(9-11), pp. 622-630, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Visualization, Classification, Volume rendering, Interface design, Hardware acceleration, Transfer functions, Filter banks, Scale-space filtering |
21 | Thomas Hübner, Yanci Zhang, Renato Pajarola |
Multi-view point splatting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GRAPHITE ![In: Proceedings of the 4th International Conference on Computer Graphics and Interactive Techniques in Australasia and Southeast Asia 2006, Kuala Lumpur, Malaysia, November 29 - December 2, 2006, pp. 285-294, 2006, ACM, 1-59593-564-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
GPU processing, auto-stereoscopic visualization, multi-view rendering, hardware acceleration, point based rendering |
21 | Nathaniel Fout, Kwan-Liu Ma, James P. Ahrens |
Time-varying, multivariate volume data reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2005 ACM Symposium on Applied Computing (SAC), Santa Fe, New Mexico, USA, March 13-17, 2005, pp. 1224-1230, 2005, ACM, 1-58113-964-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
compression, volume rendering, vector quantization, hardware acceleration, interactive visualization, time-varying data, multivariate data |
21 | GuangWei Zou, Xiang Liu |
An Efficient Approach to Custom Instruction Set Generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2005), 17-19 August 2005, Hong Kong, China, pp. 547-550, 2005, IEEE Computer Society, 0-7695-2346-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Major Block, Profiling, Hardware Acceleration, ASIPs, Custom Instruction |
21 | Daniel E. Laney, Steven P. Callahan, Nelson L. Max, Cláudio T. Silva, Steven Langer, Randall Frank |
Hardware-Accelerated Simulated Radiography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Visualization ![In: 16th IEEE Visualization Conference, IEEE Vis 2005, Minneapolis, MN, USA, October 23-28, 2005, Proceedings, pp. 343-350, 2005, IEEE Computer Society, 0-7803-9462-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
volume rendering, hardware acceleration |
21 | Iouliia Skliarova, António de Brito Ferrari |
Reconfigurable Hardware SAT Solvers: A Survey of Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 53(11), pp. 1449-1461, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
FPGA, reconfigurable computing, hardware acceleration, Boolean satisfiability |
21 | David M. Harris |
An Exponentiation Unit for an OpenGL Lighting Engine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 53(3), pp. 251-258, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
OpenGL hardware acceleration, table complexity, bipartite tables, Powering, computer arithmetic, table lookups, exponentiation |
21 | Xiaoming Wei, Ye Zhao 0004, Zhe Fan, Wei Li 0004, Feng Qiu, Suzanne Yoakum-Stover, Arie E. Kaufman |
Lattice-Based Flow Field Modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Vis. Comput. Graph. ![In: IEEE Trans. Vis. Comput. Graph. 10(6), pp. 719-729, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
force evaluation, flow field interaction, two-way solid-fluid coupling, bubble simulation, feather simulation, computation on GPU, hardware acceleration, Lattice Boltzmann model |
21 | Marc Nienhaus, Jürgen Döllner |
Sketchy drawings. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Afrigraph ![In: Proceedings of the 3rd International Conference on Computer Graphics, Virtual Reality, Visualisation and Interaction in Africa, Afrigraph 2004, Stellenbosch, South Africa, November 3-5, 2004, pp. 73-81, 2004, ACM, 1-58113-863-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
depth sprites, non-photorealistic rendering, sketching, real-time rendering, hardware-acceleration, image-space |
21 | Wang Chen, Panos Kosmas, Miriam Leeser, Carey M. Rappaport |
An FPGA implementation of the two-dimensional finite-difference time-domain (FDTD) algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, FPGA 2004, Monterey, California, USA, February 22-24, 2004, pp. 213-222, 2004, ACM, 1-58113-829-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
finite-difference time-domain, FPGA, hardware acceleration, hardware implementation, FDTD |
21 | Wei Chen 0001, Liu Ren, Matthias Zwicker, Hanspeter Pfister |
Hardware-Accelerated Adaptive EWA Volume Splatting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Visualization ![In: 15th IEEE Visualization Conference, IEEE Vis 2004, Austin, TX, USA, October 10-15, 2004, Proceedings, pp. 67-74, 2004, IEEE Computer Society, 0-7803-8788-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
volume splatting, EWA filter, hardware acceleration, Direct volume rendering |
21 | Bartosz von Rymon-Lipinski, Nils Hanssen, Thomas Jansen 0005, Lutz Ritter, Erwin Keeve |
Efficient Point-Based Isosurface Exploration Using the Span-Triangle. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Visualization ![In: 15th IEEE Visualization Conference, IEEE Vis 2004, Austin, TX, USA, October 10-15, 2004, Proceedings, pp. 441-448, 2004, IEEE Computer Society, 0-7803-8788-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Point-Based Visualization, Visualization in Medicine, Hardware Acceleration, Isosurfaces, Large Data Set Visualization |
21 | Simon Stegmaier, Thomas Ertl |
A Graphics Hardware-Based Vortex Detection and Visualization System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Visualization ![In: 15th IEEE Visualization Conference, IEEE Vis 2004, Austin, TX, USA, October 10-15, 2004, Proceedings, pp. 195-202, 2004, IEEE Computer Society, 0-7803-8788-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Features in Volume Data Sets, Flow Visualization, Hardware Acceleration, 3D Vector Field Visualization |
21 | Patrick S. McCormick, Jeff T. Inman, James P. Ahrens, Charles D. Hansen, Greg Roth |
Scout: A Hardware-Accelerated System for Quantitatively Driven Visualization and Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Visualization ![In: 15th IEEE Visualization Conference, IEEE Vis 2004, Austin, TX, USA, October 10-15, 2004, Proceedings, pp. 171-178, 2004, IEEE Computer Society, 0-7803-8788-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
volume rendering, hardware acceleration, Visualization systems, multivariate visualization |
21 | Peter Groen, Panu Hämäläinen, Ben H. H. Juurlink, Timo Hämäläinen 0001 |
Accelerating the secure remote password protocol using reconfigurable hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the First Conference on Computing Frontiers, 2004, Ischia, Italy, April 14-16, 2004, pp. 471-480, 2004, ACM, 1-58113-741-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
secure remote password protocol, authentication, WLAN, hardware acceleration, reconfigurable hardware, modular exponentiation |
21 | Daniel Weiskopf, Klaus Engel, Thomas Ertl |
Interactive Clipping Techniques for Texture-Based Volume Visualization and Volume Shading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Vis. Comput. Graph. ![In: IEEE Trans. Vis. Comput. Graph. 9(3), pp. 298-312, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Volume rendering, hardware acceleration, clipping, volume shading |
21 | Tommer Leyvand, Olga Sorkine, Daniel Cohen-Or |
Ray space factorization for from-region visibility. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Graph. ![In: ACM Trans. Graph. 22(3), pp. 595-604, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
line parameterization, visibility, hardware acceleration, PVS, occlusion culling, dual space |
21 | Huamin Qu, Feng Qiu, Nan Zhang 0011, Arie E. Kaufman, Ming Wan |
Ray Tracing Height Fields. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer Graphics International ![In: 2003 Computer Graphics International (CGI 2003), 9-11 July 2003, Tokyo, Japan, pp. 202-209, 2003, IEEE Computer Society, 0-7695-1946-6. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
ray tracing, hardware acceleration, terrain rendering, layered depth image, height field, depth image |
21 | Bong-Soo Sohn, Chandrajit L. Bajaj, Vinay Siddavanahalli |
Feature based volumetric video compression for interactive playback. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VolVis ![In: IEEE/SIGGRAPH Symposium on Volume Visualization and Graphics, VolVis 2002, Boston, MA, USA, October 28-29, 2002, pp. 89-96, 2002, IEEE Computer Society, 0-78037-641-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
isocontouring, time-varying volume visualization, wavelet transform, compression, hardware-acceleration |
21 | Kenneth E. Hoff III, Andrew Zaferakis, Ming C. Lin, Dinesh Manocha |
Fast and simple 2D geometric proximity queries using graphics hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SI3D ![In: Proceedings of the 2001 Symposium on Interactive 3D Graphics, SI3D 2001, Chapel Hill, NC, USA, March 26-29, 2001, pp. 145-148, 2001, ACM, 1-58113-292-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
graphics hardware acceleration, multi-pass techniques, collision detection, penetration depth, proximity queries |
21 | Bernardo Kastrup, Arjan Bink, Jan Hoogerbrugge |
ConCISe: A Compiler-Driven CPLD-Based Instruction Set Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 21-23 April 1999, Napa, CA, USA, pp. 92-, 1999, IEEE Computer Society, 0-7695-0375-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
XPLA, compilers, static-analysis, computer-architecture, reconfigurable-computing, compiler-optimizations, hardware-acceleration, programmable-logic, CPLD, custom-instructions |
21 | Chia-Tien Dan Lo, Yi-Gang Tai |
Highly Space Efficient Counters for Perl Compatible Regular Expressions in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures, Tools and Applications, 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008. Proceedings, pp. 51-62, 2008, Springer, 978-3-540-78609-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
21 | Marco D. Santambrogio, Seda Ogrenci Memik, Vincenzo Rana, Umut A. Acar, Donatella Sciuto |
A novel SoC design methodology combining adaptive software and reconfigurable hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2007 International Conference on Computer-Aided Design, ICCAD 2007, San Jose, CA, USA, November 5-8, 2007, pp. 303-308, 2007, IEEE Computer Society, 1-4244-1382-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Changsong Shen, Steve Oldridge, Sidney S. Fels |
Open Source Vision Library (OpenVL) Based Local Positioning System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AVSS ![In: Advanced Video and Signal Based Surveillance, 2006 IEEE International Conference on Video and Signal Based Surveillance (AVSS'06), 22-24 November 2006, Sydney, Australia., pp. 105, 2006, IEEE Computer Society, 0-7695-2688-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Ronald Scrofano, Viktor K. Prasanna |
Molecular dynamics - Preliminary investigation of advanced electrostatics in molecular dynamics on reconfigurable computers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE SC2006 Conference on High Performance Networking and Computing, November 11-17, 2006, Tampa, FL, USA, pp. 90, 2006, ACM Press, 0-7695-2700-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
FPGA, reconfigurable, molecular dynamics, electrostatics |
20 | Andrea Damiani |
On how to facilitate hardware acceleration of machine learning for non-experts in hardware design over the Edge, the Fog, and the Cloud ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2023 |
RDF |
|
20 | Feng Shi 0006 |
Adaptive AI Algorithms for Generic Hardware and Unified Hardware Acceleration Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2021 |
RDF |
|
20 | Kris Min, Brenda Ly, Joshua Garner, Shahnam Mirzaei |
A Novel Method for Hardware Acceleration of Convex Hull Algorithm on Reconfigurable Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: 33rd IEEE International System-on-Chip Conference, SoCC 2020, Las Vegas, NV, USA, September 8-11, 2020, pp. 78-83, 2020, IEEE, 978-1-7281-8746-4. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Farnoud Farahmand, Viet Ba Dang, Duc Tri Nguyen, Kris Gaj |
Evaluating the Potential for Hardware Acceleration of Four NTRU-Based Key Encapsulation Mechanisms Using Software/Hardware Codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PQCrypto ![In: Post-Quantum Cryptography - 10th International Conference, PQCrypto 2019, Chongqing, China, May 8-10, 2019 Revised Selected Papers, pp. 23-43, 2019, Springer, 978-3-030-25509-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | The H. Vu, Ryunosuke Murakami, Yuichi Okuyama 0001, Abderazek Ben Abdallah |
Efficient Optimization and Hardware Acceleration of CNNs towards the Design of a Scalable Neuro inspired Architecture in Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BigComp ![In: 2018 IEEE International Conference on Big Data and Smart Computing, BigComp 2018, Shanghai, China, January 15-17, 2018, pp. 326-332, 2018, IEEE Computer Society, 978-1-5386-3649-7. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
19 | Weihang Zhu |
A study of parallel evolution strategy: pattern search on a GPU computing platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GEC Summit ![In: Proceedings of the first ACM/SIGEVO Summit on Genetic and Evolutionary Computation, GEC Summit 2009, Shanghai, China, June 12-14, 2009, pp. 765-772, 2009, ACM, 978-1-60558-326-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
evolutionary computations, GPU, evolution strategy, pattern search |
18 | Justin L. Tripp, Maya B. Gokhale, Anders A. Hansson |
A Case Study of Hardware/Software Partitioning of Traffic Simulation on the Cray XD1. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(1), pp. 66-74, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Young-Il Kim, Chong-Min Kyung |
Automatic translation of behavioral testbench for fully accelerated simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 218-221, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Lin Shi, Hao Chen 0002, Jianhua Sun 0002 |
vCUDA: GPU accelerated high performance computing in virtual machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009, pp. 1-11, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
17 | Pavel Zemcík, Martin Zádník |
AdaBoost Engine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 656-660, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Byeong Kil Lee, Lizy Kurian John, Eugene John |
Architectural enhancements for network congestion control applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(6), pp. 609-615, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Byeong Kil Lee, Lizy Kurian John, Eugene John |
Architectural Support for Accelerating Congestion Control Applications in Network Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 16th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2005), 23-25 July 2005, Samos, Greece, pp. 169-178, 2005, IEEE Computer Society, 0-7695-2407-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Yusuke Matsuoka, Patrick Schaumont, Kris Tiri, Ingrid Verbauwhede |
Java cryptography on KVM and its performance and security optimization using HW/SW co-design techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2004 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2004, Washington DC, USA, September 22 - 25, 2004, pp. 303-311, 2004, ACM, 1-58113-890-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
security, java, design, embedded systems, cryptography |
15 | E. Riegel, T. Indinger, Nikolaus A. Adams |
Numerical simulation of fluid flow on complex geometries using the Lattice-Boltzmann method and CUDA-enabled GPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGGRAPH Posters ![In: International Conference on Computer Graphics and Interactive Techniques, SIGGRAPH 2009, New Orleans, Louisiana, USA, August 3-7, 2009, Poster Proceedings, 2009, ACM, 978-1-4503-7928-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
15 | Radoslaw Mantiuk, Dawid Pajak |
Acceleration of High Dynamic Range Imaging Pipeline Based on Multi-threading and SIMD Technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCS (1) ![In: Computational Science - ICCS 2008, 8th International Conference, Kraków, Poland, June 23-25, 2008, Proceedings, Part I, pp. 780-789, 2008, Springer, 978-3-540-69383-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
multi-threading architecture, computer visualization, image processing, high dynamic range imaging, SIMD architecture, SSE |
15 | Hao-Da Huang, Xin Tong 0001, Wen-Cheng Wang |
Accelerated Parallel Texture Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 22(5), pp. 761-769, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
parallel, GPU, texture synthesis, flow visualization, energy minimization |
15 | Love Singhal, Elaheh Bozorgzadeh |
Heterogeneous Floorplanner for FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2007, 23-25 April 2007, Napa, California, USA, pp. 311-312, 2007, IEEE Computer Society, 0-7695-2940-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Jason D. Bakos |
FPGA Acceleration of Gene Rearrangement Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2007, 23-25 April 2007, Napa, California, USA, pp. 85-94, 2007, IEEE Computer Society, 0-7695-2940-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Wencheng Wang, Feng Wei, Enhua Wu |
View Dependent Sequential Point Trees. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 21(2), pp. 181-188, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
GPU, real time rendering, point-based rendering, visibility culling, view dependence |
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