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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 17 occurrences of 15 keywords
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Results
Found 18 publication records. Showing 18 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
126 | Srimat T. Chakradhar, Savita Banerjee, Rabindra K. Roy, Dhiraj K. Pradhan |
Synthesis of initializable asynchronous circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 4(2), pp. 254-263, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
69 | Savita Banerjee, Rabindra K. Roy, Srimat T. Chakradhar |
Initialization issues in asynchronous circuit synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 9(3), pp. 237-250, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
asynchronous circuit synthesis, initialization, signal transition graph |
36 | Hsing-Chung Liang, Chung-Len Lee 0001, Jwu E. Chen |
Identifying Untestable Faults in Sequential Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 12(3), pp. 14-23, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
initializable, invalid states, controllability, test generation, untestable faults |
34 | Takashi Katoh, Keisuke Goto 0001 |
In-place initializable arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Theor. Comput. Sci. ![In: Theor. Comput. Sci. 916, pp. 62-69, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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34 | Michele Alberti, Angela Botros, Narayan Schütz, Rolf Ingold, Marcus Liwicki, Mathias Seuret |
Trainable Spectrally Initializable Matrix Transformations in Convolutional Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPR ![In: 25th International Conference on Pattern Recognition, ICPR 2020, Virtual Event / Milan, Italy, January 10-15, 2021, pp. 8204-8211, 2020, IEEE, 978-1-7281-8808-9. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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34 | Michele Alberti, Angela Botros, Narayan Schütz, Rolf Ingold, Marcus Liwicki, Mathias Seuret |
Trainable Spectrally Initializable Matrix Transformations in Convolutional Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1911.05045, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
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34 | Frank Kammer, Andrej Sajenko |
Extra Space during Initialization of Succinct Data Structures and of Dynamical Initializable Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1803.09675, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
|
34 | Frank Kammer, Andrej Sajenko |
Extra Space during Initialization of Succinct Data Structures and Dynamical Initializable Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MFCS ![In: 43rd International Symposium on Mathematical Foundations of Computer Science, MFCS 2018, August 27-31, 2018, Liverpool, UK, pp. 65:1-65:16, 2018, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-086-6. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
34 | Takashi Katoh, Keisuke Goto 0001 |
In-Place Initializable Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1709.08900, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
34 | Srimat T. Chakradhar, Savita Banerjee, Rabindra K. Roy, Dhiraj K. Pradhan |
Synthesis of Initializable Asynchronous Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: Proceedings of the Seventh International Conference on VLSI Design, VLSI Design 1994, Calcutta, India, January 5-8, 1994, pp. 383-388, 1994, IEEE Computer Society, 0-8186-4990-9. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
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34 | Kwang-Ting Cheng, Vishwani D. Agrawal |
State assignment for initializable synthesis (gate level analysis). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 1989 IEEE International Conference on Computer-Aided Design, ICCAD 1989, Santa Clara, CA, USA, November 5-9, 1989. Digest of Technical Papers, pp. 212-215, 1989, IEEE Computer Society, 0-8186-1986-4. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
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23 | Mitsuhisa Sato, Taisuke Boku, Daisuke Takahashi |
OmniRPC: a Grid RPC ystem for Parallel Programming in Cluster and Grid Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCGRID ![In: 3rd IEEE International Symposium on Cluster Computing and the Grid (CCGrid 2003), 12-15 May 2003, Tokyo, Japan, pp. 206-213, 2003, IEEE Computer Society, 0-7695-1919-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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23 | Kaamran Raahemifar, Majid Ahmadi |
A new initialization technique for asynchronous circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 581-584, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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23 | Dong Xiang, Yi Xu |
Partial Reset for Synchronous Sequential Circuits Using Almost Independent Reset Signals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA, USA, pp. 82-87, 2001, IEEE Computer Society, 0-7695-1122-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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23 | Montek Singh, Steven M. Nowick |
Synthesis for logical initializability of synchronous finite-state machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 8(5), pp. 542-557, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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23 | Jalal A. Wehbeh, Daniel G. Saab |
Initialization of Sequential Circuits and its Application to ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 13(3), pp. 259-271, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
verification, CAD, ATPG, initialization |
23 | Montek Singh, Steven M. Nowick |
Synthesis for Logical Initializability of Synchronous Finite State Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 76-81, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
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23 | Jalal A. Wehbeh, Daniel G. Saab |
Initialization of sequential circuits and its application to ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 14th IEEE VLSI Test Symposium (VTS'96), April 28 - May 1, 1996, Princeton, NJ, USA, pp. 246-253, 1996, IEEE Computer Society, 0-8186-7304-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
initialization sequence, X-value simulation, functional initializability, VLSI, logic testing, integrated circuit testing, sequential circuits, sequential circuits, ATPG, automatic testing, integrated logic circuits, structural decomposition |
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