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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 11 occurrences of 11 keywords
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Results
Found 7 publication records. Showing 7 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
54 | Fei Wu 0005, Liang Wang, Jiguang Wan |
A Low Cost and Inner-round Pipelined Design of ECB-AES-256 Crypto Engine for Solid State Disk. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NAS ![In: Fifth International Conference on Networking, Architecture, and Storage, NAS 2010, Macau, China, July 15-17, 2010, pp. 485-491, 2010, IEEE Computer Society, 978-0-7695-4134-1. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
inner-round, ECB-AES-256 crypto engine, SSD |
28 | Afshin Shiravi, Yoon G. Kim, Paul S. Min |
Proportional Nested Deficit Round Robin: Improving the Latency of Packet Scheduler with an O(1) Complexity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAA-IDEA ![In: First International Workshop on Advanced Architectures and Algorithms for Internet Delivery and Applications, AAA-IDEA 2005, Orlando, Florida, USA, June 15, 2005, pp. 34-41, 2005, IEEE Computer Society, 0-7695-2525-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Nested- DRR, Quantum Size, Complexity, Packet switch, Fair queueing, Deficit Round Robin |
22 | Sanjay Deshpande, Kris Gaj |
Analysis and Inner-Round Pipelined Implementation of Selected Parallelizable CAESAR Competition Candidates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Euromicro Conference on Digital System Design, DSD 2017, Vienna, Austria, August 30 - Sept. 1, 2017, pp. 274-282, 2017, IEEE Computer Society, 978-1-5386-2146-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
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17 | Alireza Hodjat, Ingrid Verbauwhede |
Area-Throughput Trade-Offs for Fully Pipelined 30 to 70 Gbits/s AES Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 55(4), pp. 366-372, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
crypto-processor, security, VLSI, cryptography, Advanced Encryption Standard (AES), ASIC, hardware architectures |
17 | Alireza Hodjat, Ingrid Verbauwhede |
Minimum Area Cost for a 30 to 70 Gbits/s AES Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), Emerging Trends in VLSI Systems Design, 19-20 February 2004, Lafayette, LA, USA, pp. 83-88, 2004, IEEE Computer Society, 0-7695-2097-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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17 | Alireza Hodjat, Ingrid Verbauwhede |
A 21.54 Gbits/s Fully Pipelined AES Processor on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 20-23 April 2004, Napa, CA, USA, Proceedings, pp. 308-309, 2004, IEEE Computer Society, 0-7695-2230-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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12 | Sébastien Kunz-Jacques, Frédéric Muller, Frédéric Valette |
The Davies-Murphy Power Attack. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASIACRYPT ![In: Advances in Cryptology - ASIACRYPT 2004, 10th International Conference on the Theory and Application of Cryptology and Information Security, Jeju Island, Korea, December 5-9, 2004, Proceedings, pp. 451-467, 2004, Springer, 3-540-23975-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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