Search results for "latency-tolerance"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
62	Shashank S. Nemawarkar, Guang R. Gao	Latency Tolerance: A Metric for Performance Analysis of Multithreaded Architectures.	IPPS	1997	DBLP DOI BibTeX RDF	performance analysis metric, multithreaded multiprocessor systems, tolerance index, program workload parameters, fine grain parallel program workloads, parallel architectures, multithreaded architectures, latency tolerance, closed queueing networks, analytical framework
42	Joan-Manuel Parcerisa, Antonio González 0001	Improving Latency Tolerance of Multithreading through Decoupling.	IEEE Trans. Computers	2001	DBLP DOI BibTeX RDF	Access/execute decoupling, instruction-level parallelism, simultaneous multithreading, latency hiding, hardware complexity
36	Bo Liang, Hong An, Fang Lu, Rui Guo	Improving Latency Tolerance of Network Processors Through Simultaneous Multithreading.	APPT	2005	DBLP DOI BibTeX RDF
35	Onur Mutlu, Hyesoon Kim, Yale N. Patt	Efficient Runahead Execution: Power-Efficient Memory Latency Tolerance.	IEEE Micro	2006	DBLP DOI BibTeX RDF	memory latency tolerance, processors, Runahead execution
33	Alvin R. Lebeck, Tong Li 0003, Eric Rotenberg, Jinson Koppanalil, Jaidev P. Patwardhan	A Large, Fast Instruction Window for Tolerating Cache Misses.	ISCA	2002	DBLP DOI BibTeX RDF	Cache Memory, Memory Latency, Latency Tolerance, Instruction Window
32	Jarek Nieplocha, Vinod Tipparaju, Manojkumar Krishnan, Gopalakrishnan Santhanaraman, Dhabaleswar K. Panda 0001	Optimizing Mechanisms for Latency Tolerance in Remote Memory Access Communication on Clusters.	CLUSTER	2003	DBLP DOI BibTeX RDF
29	Todd C. Mowry, Chi-Keung Luk	Predicting Data Cache Misses in Non-Numeric Applications through Correlation Profiling.	MICRO	1997	DBLP DOI BibTeX RDF	cache miss prediction, non-numeric applications, profiling, correlation, latency tolerance
26	Ronald D. Barnes, Shane Ryoo, Wen-mei W. Hwu	Tolerating Cache-Miss Latency with Multipass Pipelines.	IEEE Micro	2006	DBLP DOI BibTeX RDF	Flea-flicker, multipass pipelining, memory-latency tolerance, in-order design
24	Raquel Pinto, Ricardo Bianchini, Claudio Luis de Amorim	Comparing Latency-Tolerance Techniques for Software DSM Systems.	IEEE Trans. Parallel Distributed Syst.	2003	DBLP DOI BibTeX RDF	performance, Distributed systems
24	Perry H. Wang, Hong Wang 0003, Jamison D. Collins, Ed Grochowski, Ralph-Michael Kling, John Paul Shen	Memory Latency-Tolerance Approaches for Itanium Processors: Out-of-Order Execution vs. Speculative Precomputation.	HPCA	2002	DBLP DOI BibTeX RDF
23	Satyanarayana Nekkalapu, Haitham Akkary, Komal Jothi, Renjith Retnamma, Xiaoyu Song	A simple latency tolerant processor.	ICCD	2008	DBLP DOI BibTeX RDF
23	Dongkeun Kim, Donald Yeung	Design and evaluation of compiler algorithms for pre-execution.	ASPLOS	2002	DBLP DOI BibTeX RDF
22	Chen Ding, Ken Kennedy	The Memory Bandwidth Bottleneck and its Amelioration by a Compiler.	IPDPS	2000	DBLP DOI BibTeX RDF	memory performance model, array reduction, store elimination, memory hierarchy, compiler optimizations, Memory bandwidth, loop fusion
19	Seif Haridi, Peter Van Roy, Per Brand, Michael Mehl, Ralf Scheidhauer, Gert Smolka	Efficient logic variables for distributed computing.	ACM Trans. Program. Lang. Syst.	1999	DBLP DOI BibTeX RDF	Mozart, distributed algorithms, Oz
18	Haitham Akkary, Komal Jothi, Renjith Retnamma, Satyanarayana Nekkalapu, Doug Hall, Shahrokh Shahidzadeh	On the potential of latency tolerant execution in speculative multithreading.	IFMT	2008	DBLP DOI BibTeX RDF	latency-tolerant architectures, chip multiprocessors, speculative multithreading, many-core processors
18	Dongkeun Kim, Donald Yeung	A study of source-level compiler algorithms for automatic construction of pre-execution code.	ACM Trans. Comput. Syst.	2004	DBLP DOI BibTeX RDF	pre-execution, prefetch conversion, speculative loop parallelization, multithreading, program slicing, Data prefetching, memory-level parallelism
18	Andrew D. Hilton, Santosh Nagarakatte, Amir Roth	iCFP: Tolerating All-Level Cache Misses in In-Order Processors.	IEEE Micro	2010	DBLP DOI BibTeX RDF	in-order processors, data cache misses, multithreaded execution, latency tolerance
18	Jacob Sorensen, Scott B. Baden	Hiding Communication Latency with Non-SPMD, Graph-Based Execution.	ICCS (1)	2009	DBLP DOI BibTeX RDF	non-SPMD, coarse grain dataflow, parallel programming, latency tolerance
18	Parry Husbands, Katherine A. Yelick	Multi-threading and one-sided communication in parallel LU factorization.	SC	2007	DBLP DOI BibTeX RDF	multithreading, latency tolerance, dense linear algebra
18	Jordi Cortadella, Michael Kishinevsky, Bill Grundmann	Synthesis of synchronous elastic architectures.	DAC	2006	DBLP DOI BibTeX RDF	protocols, synthesis, latency-tolerance, latency-insensitive design
18	Michel Dubois 0001	Fighting the memory wall with assisted execution.	Conf. Computing Frontiers	2004	DBLP DOI BibTeX RDF	prefetching, cache memories, superscalar processors, simultaneous multithreading, latency tolerance
18	Srikanth T. Srinivasan, Ravi Rajwar, Haitham Akkary, Amit Gandhi, Michael Upton	Continual flow pipelines.	ASPLOS	2004	DBLP DOI BibTeX RDF	CFP, non-blocking, latency tolerance, instruction window
18	Thilo Kielmann, Henri E. Bal, Sergei Gorlatch	Bandwidth-Efficient Collective Communication for Clustered Wide Area Systems.	IPDPS	2000	DBLP DOI BibTeX RDF	Models for Parallel Computers, Optimization, Grid Computing, Interconnection Networks, MPI, Performance Modeling, Cluster Computing, Runtime Support, Latency Tolerance
18	Peter Van Roy, Seif Haridi, Per Brand, Gert Smolka, Michael Mehl, Ralf Scheidhauer	Mobile Objects in Distributed Oz.	ACM Trans. Program. Lang. Syst.	1997	DBLP DOI BibTeX RDF	network transparency, mobile objects, latency tolerance
18	William W. Pugh, Evan Rosser	Iteration Space Slicing and Its Application to Communication Optimization.	International Conference on Supercomputing	1997	DBLP DOI BibTeX RDF	message coalescing, program slicing, communication optimization, latency tolerance
18	Fredrik Dahlgren, Per Stenström	Evaluation of Hardware-Based Stride and Sequential Prefetching in Shared-Memory Multiprocessors.	IEEE Trans. Parallel Distributed Syst.	1996	DBLP DOI BibTeX RDF	Hardware-controlled prefetching, relaxed memory consistency, performance evaluation, shared-memory multiprocessors, latency tolerance
18	Luddy Harrison	Examination of a Memory Access Classification Scheme for Pointer-Intensive and Numeric Programs.	International Conference on Supercomputing	1996	DBLP DOI BibTeX RDF	CPU architecture, instruction profiling, memory access pattern classification, memory latency tolerance, data cache
18	Fredrik Dahlgren, Michel Dubois 0001, Per Stenström	Sequential Hardware Prefetching in Shared-Memory Multiprocessors.	IEEE Trans. Parallel Distributed Syst.	1995	DBLP DOI BibTeX RDF	Hardware-controlled prefetching, sequential prefetching, performance evaluation, shared-memory multiprocessors, memory consistency models, latency tolerance
18	John G. Cleary, Murray Pearson, Husam Kinawi	The architecture of an optimistic CPU: the WarpEngine.	HICSS (1)	1995	DBLP DOI BibTeX RDF	optimistic CPU, WarpEngine, shared memory CPU, single instructions, memory latency tolerance, executable instructions, TimeWarp algorithm, optimistic, single linear address space, single thread of control, reliability, caches, parallel architectures, fault tolerant computing, concurrency control, synchronisation, synchronisation, shared memory systems, memory architecture, cache storage, memory system, memory model, time stamped, memory accesses, local memory
17	Marcelo Orenes-Vera, Aninda Manocha, Jonathan Balkind, Fei Gao 0016, Juan L. Aragón, David Wentzlaff, Margaret Martonosi	Tiny but mighty: designing and realizing scalable latency tolerance for manycore SoCs.	ISCA	2022	DBLP DOI BibTeX RDF
17	Rachata Ausavarungnirun, Saugata Ghose, Onur Kayiran, Gabriel H. Loh, Chita R. Das, Mahmut T. Kandemir, Onur Mutlu	Holistic Management of the GPGPU Memory Hierarchy to Manage Warp-level Latency Tolerance.	CoRR	2018	DBLP BibTeX RDF
17	Victor Eijkhout	Task Graph Transformations for Latency Tolerance.	CoRR	2018	DBLP BibTeX RDF
17	Akhil Arunkumar, Shin-Ying Lee, Vignesh Soundararajan, Carole-Jean Wu	LATTE-CC: Latency Tolerance Aware Adaptive Cache Compression Management for Energy Efficient GPUs.	HPCA	2018	DBLP DOI BibTeX RDF
17	Sharanyan Srikanthan, Sandhya Dwarkadas, Kai Shen	Coherence Stalls or Latency Tolerance: Informed CPU Scheduling for Socket and Core Sharing.	USENIX Annual Technical Conference	2016	DBLP BibTeX RDF
17	Youngsam Shin, Seok Joong Hwang, Jae Don Lee, Won-Jong Lee, Soojung Ryu	Latency tolerance techniques for real-time ray tracing on mobile computing platform.	SIGGRAPH Asia Mobile Graphics and Interactive Applications	2015	DBLP DOI BibTeX RDF
17	Neal Clayton Crago, Omid Azizi, Steven S. Lumetta, Sanjay J. Patel	Hybrid latency tolerance for robust energy-efficiency on 1000-core data parallel processors.	HPCA	2013	DBLP DOI BibTeX RDF
17	David Alexander Munday	Energy Efficient Memory Speculation With Memory Latency Tolerance Supporting Sequential Consistency Without A Coherence Protocol.		2013	RDF
17	Muhammad Irfan Uddin, Chris R. Jesshope, Michiel W. van Tol, Raphael Poss	Collecting signatures to model latency tolerance in high-level simulations of microthreaded cores.	RAPIDO	2012	DBLP DOI BibTeX RDF
17	Chien-Ping Lu, Brian Ko	Latency tolerance for Throughput Computing: Designer track.	ICCAD	2012	DBLP DOI BibTeX RDF
17	Neal Clayton Crago	Energy-efficient latency tolerance for 1000-core data parallel processors with decoupled strands		2012	RDF
17	Neal Clayton Crago, Sanjay J. Patel	OUTRIDER: efficient memory latency tolerance with decoupled strands.	ISCA	2011	DBLP DOI BibTeX RDF
17	Ashok Srinivasan, Namas Chandra	Latency tolerance through parallelization of time in scientific applications.	Parallel Comput.	2005	DBLP DOI BibTeX RDF
17	Srikanth T. Srinivasan, Ravi Rajwar, Haitham Akkary, Amit Gandhi, Michael Upton	Continual Flow Pipelines: Achieving Resource-Efficient Latency Tolerance.	IEEE Micro	2004	DBLP DOI BibTeX RDF
17	Jarek Nieplocha, Vinod Tipparaju, Manojkumar Krishnan, Gopalakrishnan Santhanaraman, Dhabaleswar K. Panda 0001	Optimisation and performance evaluation of mechanisms for latency tolerance in remote memory access communication on clusters.	Int. J. High Perform. Comput. Netw.	2004	DBLP DOI BibTeX RDF
17	Teemu Mäki-Patola, Perttu Hämäläinen	Latency Tolerance for Gesture Controlled Continuous Sound Instrument without Tactile Feedback.	ICMC	2004	DBLP BibTeX RDF
17	Ashok Srinivasan, Namas Chandra	Latency Tolerance through Parallelization of Time in Scientific Applications.	IPDPS	2004	DBLP DOI BibTeX RDF
17	Srikanth T. Srinivasan, Alvin R. Lebeck	Load Latency Tolerance in Dynamically Scheduled Processors.	J. Instr. Level Parallelism	1999	DBLP BibTeX RDF
17	Brian R. Fisk, R. Iris Bahar	The Non-Critical Buffer: Using Load Latency Tolerance to Improve Data Cache Efficiency.	ICCD	1999	DBLP DOI BibTeX RDF	Algorithms, Architecture, Caches
17	Srikanth T. Srinivasan, Alvin R. Lebeck	Load Latency Tolerance in Dynamically Scheduled Processors.	MICRO	1998	DBLP DOI BibTeX RDF
17	Todd C. Mowry, Charles Q. C. Chan, Adley K. W. Lo	Comparative Evaluation of Latency Tolerance Techniques for Software Distributed Shared Memory.	HPCA	1998	DBLP DOI BibTeX RDF
17	Charles Selvidge	Compilation-based prefetching for memory latency tolerance.		1992	RDF
16	Huiyang Zhou	A case for fault tolerance and performance enhancement using chip multi-processors.	IEEE Comput. Archit. Lett.	2006	DBLP DOI BibTeX RDF
16	Vijay S. Pai, Sarita V. Adve	Comparing and Combining Read Miss Clustering and Software Prefetching.	IEEE PACT	2001	DBLP DOI BibTeX RDF
16	Costas Kyriacou, Paraskevas Evripidou	Communication Assist for Data Driven Multithreading.	Panhellenic Conference on Informatics	2001	DBLP DOI BibTeX RDF
16	Youngsoo Shin, Kiyoung Choi	Software synthesis through task decomposition by dependency analysis.	ICCAD	1996	DBLP DOI BibTeX RDF	CDFG, scheduler, dependency, C, VHDL, thread, Software synthesis
15	Onur Mutlu, Jared Stark, Chris Wilkerson, Yale N. Patt	Runahead Execution: An Alternative to Very Large Instruction Windows for Out-of-Order Processors.	HPCA	2003	DBLP DOI BibTeX RDF
15	Vijay S. Pai, Parthasarathy Ranganathan, Hazim Abdel-Shafi, Sarita V. Adve	The Impact of Exploiting Instruction-Level Parallelism on Shared-Memory Multiprocessors.	IEEE Trans. Computers	1999	DBLP DOI BibTeX RDF	performance evaluation, instruction-level parallelism, Shared-memory multiprocessors, software prefetching
15	Joan-Manuel Parcerisa, Antonio González 0001	The Synergy of Multithreading and Access/Execute Decoupling.	HPCA	1999	DBLP DOI BibTeX RDF
15	Naraig Manjikian	Combining Loop Fusion with Prefetching on Shared-memory Multiprocessors.	ICPP	1997	DBLP DOI BibTeX RDF	Cache locality enhancement, Compilers, Prefetching, Shared-memory multiprocessors, Loop transformations
15	Koray Öner, Michel Dubois 0001	Effects of Memory Latencies on Non-Blocking Processor/Cache Architectures.	International Conference on Supercomputing	1993	DBLP DOI BibTeX RDF	SPARC
11	George Chin Jr., Andrès Márquez, Sutanay Choudhury, Kristyn J. Maschhoff	Implementing and evaluating multithreaded triad census algorithms on the Cray XMT.	IPDPS	2009	DBLP DOI BibTeX RDF
11	Farshad Ahdi, Vikram Srinivasan, Kee Chaing Chua	Topology Control for Delay Sensitive Applications in Wireless Sensor Networks.	Mob. Networks Appl.	2007	DBLP DOI BibTeX RDF	delay sensitive applications, wireless sensor networks, topology control
11	Gregory A. Koenig, Laxmikant V. Kalé	Optimizing Distributed Application Performance Using Dynamic Grid Topology-Aware Load Balancing.	IPDPS	2007	DBLP DOI BibTeX RDF
11	Todd C. Mowry, Chi-Keung Luk	Understanding Why Correlation Profiling Improves the Predictability of Data Cache Misses in Nonnumeric Applications.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	cache miss prediction, correlation-based profiling, Cache performance
11	Yuetsu Kodama, Hirofumi Sakane, Hanpei Koike, Mitsuhisa Sato, Shuichi Sakai, Yoshinori Yamaguchi	Parallel Execution of Radix Sort Program Using Fine-Grain Communication.	IEEE PACT	1997	DBLP DOI BibTeX RDF	fine-grain communication, parallel radix sort, performance scalability, EM-X
11	Yuetsu Kodama, Hirohumi Sakane, Mitsuhisa Sato, Hayato Yamana, Shuichi Sakai, Yoshinori Yamaguchi	The EM-X Parallel Computer: Architecture and Basic Performance.	ISCA	1995	DBLP DOI BibTeX RDF
8	Eiman Ebrahimi, Onur Mutlu, Chang Joo Lee, Yale N. Patt	Coordinated control of multiple prefetchers in multi-core systems.	MICRO	2009	DBLP DOI BibTeX RDF	prefetching, multi-core, feedback control, memory systems
8	Jacob Leverich, Hideho Arakida, Alex Solomatnikov, Amin Firoozshahian, Mark Horowitz, Christos Kozyrakis	Comparative evaluation of memory models for chip multiprocessors.	ACM Trans. Archit. Code Optim.	2008	DBLP DOI BibTeX RDF	streaming memory, parallel programming, Chip multiprocessors, cache coherence, locality optimizations
8	Rajendra Singh, Peter Graham	Performance Driven Partial Checkpoint/Migrate for LAM-MPI.	HPCS	2008	DBLP DOI BibTeX RDF	Grids, MPI, Cluster Computing, Checkpoint, Migration
8	Kevin D. Kissell	MIPS MT: A Multithreaded RISC Architecture for Embedded Real-Time Processing.	HiPEAC	2008	DBLP DOI BibTeX RDF
8	Abhishek Das, William J. Dally	Stream Scheduling: A Framework to Manage Bulk Operations in a Memory Hierarchy.	PACT	2007	DBLP DOI BibTeX RDF
8	Jacob Leverich, Hideho Arakida, Alex Solomatnikov, Amin Firoozshahian, Mark Horowitz, Christos Kozyrakis	Comparing memory systems for chip multiprocessors.	ISCA	2007	DBLP DOI BibTeX RDF	streaming memory, parallel programming, chip multiprocessors, locality optimizations, coherent caches
8	Guangming Tan, Shengzhong Feng, Ninghui Sun	Biology - Locality and parallelism optimization for dynamic programming algorithm in bioinformatics.	SC	2006	DBLP DOI BibTeX RDF	parallelism, dynamic programming, locality, tiling, cache-oblivious
8	Guilherme Ottoni, Ram Rangan, Adam Stoler, David I. August	Automatic Thread Extraction with Decoupled Software Pipelining.	MICRO	2005	DBLP DOI BibTeX RDF
8	Ashok Srinivasan, Yanan Yu, Namas Chandra	Application of Reduce Order Modeling to Time Parallelization.	HiPC	2005	DBLP DOI BibTeX RDF
8	Seungryul Choi, Nicholas Kohout, Sumit Pamnani, Dongkeun Kim, Donald Yeung	A general framework for prefetch scheduling in linked data structures and its application to multi-chain prefetching.	ACM Trans. Comput. Syst.	2004	DBLP DOI BibTeX RDF	memory parallelism, pointer-chasing code, Data prefetching
8	Alfredo Cristóbal-Salas, Andrey Chernykh, Edelmira Rodríguez-Alcantar, Jean-Luc Gaudiot	Exploiting Single-Assignment Properties to Optimize Message-Passing Programs by Code Transformations.	IFL	2004	DBLP DOI BibTeX RDF
8	Keita Teranishi, Padma Raghavan	Parallel Hybrid Sparse Solvers Through Flexible Incomplete Cholesky Preconditioning.	PARA	2004	DBLP DOI BibTeX RDF
8	Naohiko Shimizu, Ken Takatori	A transparent Linux super page kernel for Alpha, Sparc64 and IA32: reducing TLB misses of applications.	SIGARCH Comput. Archit. News	2003	DBLP DOI BibTeX RDF	Linux
8	Adeline Jacquet, Vincent Janot, Clement Leung, Guang R. Gao, Ramaswamy Govindarajan, Thomas L. Sterling	An Executable Analytical Performance Evaluation Approach for Early Performance Prediction.	IPDPS	2003	DBLP DOI BibTeX RDF
8	Chris R. Jesshope	Multi-threaded Microprocessors - Evolution or Revolution.	Asia-Pacific Computer Systems Architecture Conference	2003	DBLP DOI BibTeX RDF
8	Paramjit S. Oberoi, Gurindar S. Sohi	Parallelism in the Front-End.	ISCA	2003	DBLP DOI BibTeX RDF
8	Jack J. Dongarra	High Performance Computing, Computational Grid, and Numerical Libraries.	PARA	2002	DBLP DOI BibTeX RDF
8	Amir Roth, Gurindar S. Sohi	A quantitative framework for automated pre-execution thread selection.	MICRO	2002	DBLP DOI BibTeX RDF
8	James C. Phillips, Gengbin Zheng, Sameer Kumar 0001, Laxmikant V. Kalé	NAMD: biomolecular simulation on thousands of processors.	SC	2002	DBLP DOI BibTeX RDF
8	Nicholas Kohout, Seungryul Choi, Dongkeun Kim, Donald Yeung	Multi-Chain Prefetching: Effective Exploitation of Inter-Chain Memory Parallelism for Pointer-Chasing Codes.	IEEE PACT	2001	DBLP DOI BibTeX RDF
8	José Nelson Amaral, Guang R. Gao, Erturk Dogan Kocalar, Patrick O'Neill, Xinan Tang	Design and Implementation of an Efficient Thread Partitioning Algorithm.	ISHPC	2000	DBLP DOI BibTeX RDF
8	Craig B. Zilles, Joel S. Emer, Gurindar S. Sohi	The Use of Multithreading for Exception Handling.	MICRO	1999	DBLP DOI BibTeX RDF
8	Jack L. Lo, Luiz André Barroso, Susan J. Eggers, Kourosh Gharachorloo, Henry M. Levy, Sujay S. Parekh	An Analysis of Database Workload Performance on Simultaneous Multithreaded Processors.	ISCA	1998	DBLP DOI BibTeX RDF
8	Fong Pong, Michel Dubois 0001	Formal Verification of Delayed Consistency Protocols.	IPPS	1996	DBLP DOI BibTeX RDF
8	Doug Burger, James R. Goodman, Alain Kägi	Memory Bandwidth Limitations of Future Microprocessors.	ISCA	1996	DBLP DOI BibTeX RDF
8	Anant Agarwal, Ricardo Bianchini, David Chaiken, Kirk L. Johnson, David A. Kranz, John Kubiatowicz, Beng-Hong Lim, Kenneth Mackenzie, Donald Yeung	The MIT Alewife Machine: Architecture and Performance.	ISCA	1995	DBLP DOI BibTeX RDF