Search results for "microrotations"

Found 6 publication records. Showing 6 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
99	Javier D. Bruguera, Nicolás Guil, Tomás Lang, Julio Villalba, Emilio L. Zapata	Cordic based parallel/pipelined architecture for the Hough transform.	J. VLSI Signal Process.	1996	DBLP DOI BibTeX RDF
99	Elisardo Antelo, Javier D. Bruguera, Julio Villalba, Emilio L. Zapata	Redundant CORDIC Rotator Based on Parallel Prediction.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF	High speed processor, Parallel prediction, Parallel architecture, CORDIC algorithm, Redundant arithmetic
71	Elena Pasternak, Hans-B. Mühlhaus, Arcady V. Dyskin	Apparent Strain Localization and Shear Wave Dispersion in Elastic Fault Gouge with Microrotations.	International Conference on Computational Science	2003	DBLP DOI BibTeX RDF
61	Julio Villalba, J. C. Arrabal, Emilio L. Zapata, Elisardo Antelo, Javier D. Bruguera	Radix-4 Vectoring Cordic Algorithm And Architectures.	ASAP	1996	DBLP DOI BibTeX RDF	radix-4 vectoring CORDIC algorithm, radix-4 vectoring CORDIC architectures, vectoring mode, microrotations, zero skipping technique, recursive architectures, matrix triangularization, rotation angle, computational complexity, complexity, parallel architectures, singular value decomposition, SVD, signal processing, digital arithmetic, digital arithmetic, matrix algebra, pipelined architectures
25	Kees-Jan van der Kolk, Ed F. Deprettere, Jeong-A Lee	A Floating Point Vectoring Algorithm Based on Fast Rotations.	EUROMICRO	1999	DBLP DOI BibTeX RDF
25	Roberto R. Osorio, Elisardo Antelo, Javier D. Bruguera, Julio Villalba, Emilio L. Zapata	Digit On-line Large Radix CORDIC Rotator.	ASAP	1995	DBLP DOI BibTeX RDF	Digit on-line processing, Pipelined array architecture, VLSI architecture, Application-specific processor, CORDIC algorithm

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