Search results for "nanocircuits"

Found 14 publication records. Showing 14 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
172	Nader Engheta	Circuits with light at the nanoscale: meta-nanocircuits and metactronics.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	nanocircuits, circuits, optics, nanophotonics
34	Lafifa Jamal, Md. Riaz Uddin	Towards Designing Optimized Low Power Reversible Demultiplexer for Emerging Nanocircuits.	SoCC	2018	DBLP DOI BibTeX RDF
34	Ismo Hänninen, Jarmo Takala	Irreversibility induced density limits and logical reversiblity in nanocircuits.	NANOARCH	2012	DBLP DOI BibTeX RDF
34	Himanshu Thapliyal, Nagarajan Ranganathan	Reversible Logic Based Concurrent Error Detection Methodology For Emerging Nanocircuits	CoRR	2011	DBLP BibTeX RDF
34	Svetlana V. Boriskina, Bjoern M. Reinhard	Spectrally and Spatially Configurable Superlenses for Optoplasmonic Nanocircuits	CoRR	2011	DBLP BibTeX RDF
34	Andrea Alù, Nader Engheta	Optical Metamaterials Based on Optical Nanocircuits.	Proc. IEEE	2011	DBLP DOI BibTeX RDF
34	Aritra Banerjee, Subho Chatterjee, Azad Naeemi, Abhijit Chatterjee	Power Aware Post-manufacture Tuning of Analog Nanocircuits.	ETS	2011	DBLP DOI BibTeX RDF
34	Minsu Choi, Fabrizio Lombardi, Nohpill Park	Introduction to the Special Section on Nanocircuits and Systems.	IEEE Trans. Very Large Scale Integr. Syst.	2009	DBLP DOI BibTeX RDF
34	Janet Meiling Wang, Bharat Sukhwani, Uday Padmanabhan, Dongsheng Ma, Kartik Sinha	Simulation and Design of Nanocircuits With Resonant Tunneling Devices.	IEEE Trans. Circuits Syst. I Regul. Pap.	2007	DBLP DOI BibTeX RDF
34	Shamik Das, Matthew F. Bauwens	Clocking nanocircuits for nanocomputers and other nanoelectronic systems.	NANOARCH	2007	DBLP DOI BibTeX RDF
25	Himanshu Thapliyal, Nagarajan Ranganathan	Conservative QCA Gate (CQCA) for Designing Concurrently Testable Molecular QCA Circuits.	VLSI Design	2009	DBLP DOI BibTeX RDF
25	Huifei Rao, Jie Chen 0002, Vicky H. Zhao, Woon Tiong Ang, I-Chyn Wey, An-Yeu Wu	An efficient methodology to evaluate nanoscale circuit fault-tolerance performance based on belief propagation.	ISCAS	2008	DBLP DOI BibTeX RDF
25	Smita Krishnaswamy, Igor L. Markov, John P. Hayes	Tracking Uncertainty with Probabilistic Logic Circuit Testing.	IEEE Des. Test Comput.	2007	DBLP DOI BibTeX RDF	probabilistic faults, logic circuit testing, fault-modeling framework, test-vector sensitivity, integer linear programming
25	Niraj K. Jha	Nanotechnology in the Service of Embedded and Ubiquitous Computing.	EUC	2005	DBLP DOI BibTeX RDF