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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 2 occurrences of 2 keywords
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Results
Found 4 publication records. Showing 4 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
58 | Takahiro Hanyu, Manabu Arakaki, Michitaka Kameyama |
One-Transistor-Cell 4-Valued Universal-Literal CAM for Cellular Logic Image Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 27th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1997, Antigonish, Nova Scotia, Canada, May 28-30, 1997, Proceedings, pp. 175-182, 1997, IEEE Computer Society, 0-8186-7910-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
cellular logic image processing, template-matching operations, universal literal, threshold operation, multi-layer interconnectio, parallel template-matching, one-transistor-cell, content-addressable memory, cellular logic |
28 | A. F. Tasch Jr., Laureen H. Parker |
Memory cell and technology issues for 64- and 256-Mbit one-transistor cell MOSD DRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Proc. IEEE ![In: Proc. IEEE 77(3), pp. 374-388, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
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23 | Takahiro Hanyu, N. Kanagawa, Michitaka Kameyama |
Design of a one-transistor-cell multiple-valued CAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 31(11), pp. 1669-1674, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
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23 | Takahiro Hanyu, Naoki Kanagawa, Michitaka Kameyama |
Design of a one-transistor-cell multiple-valued CAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 31(11), pp. 1669-1674, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
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