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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 7 occurrences of 7 keywords
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Results
Found 5 publication records. Showing 5 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
50 | Shyam Ramji, Nagu R. Dhanwada |
Design topology aware physical metrics for placement analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, Washington, DC, USA, April 28-29, 2003, pp. 186-191, 2003, ACM, 1-58113-677-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
path-monotonicity, placement, timing analysis, wirelength |
19 | Pedro Calleja, Francesc Llerena |
Path monotonicity, consistency and axiomatizations of some weighted solutions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Game Theory ![In: Int. J. Game Theory 48(1), pp. 287-310, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Gang Chen 0020, Jason Cong |
Simultaneous timing-driven placement and duplication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, FPGA 2005, Monterey, California, USA, February 20-22, 2005, pp. 51-59, 2005, ACM, 1-59593-029-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
logic duplication, FPGA, legalization, timing-driven placement, redundancy removal |
11 | Stephen Plaza, Igor L. Markov, Valeria Bertacco |
Optimizing Nonmonotonic Interconnect Using Functional Simulation and Logic Restructuring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(12), pp. 2107-2119, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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11 | Stephen Plaza, Igor L. Markov, Valeria Bertacco |
Optimizing non-monotonic interconnect using functional simulation and logic restructuring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2008 International Symposium on Physical Design, ISPD 2008, Portland, Oregon, USA, April 13-16, 2008, pp. 95-102, 2008, ACM, 978-1-60558-048-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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