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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 6 occurrences of 3 keywords
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Results
Found 33 publication records. Showing 33 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
51 | Jeff Siebert, Jamie Collier, Rajeevan Amirtharajah |
Self-timed circuits for energy harvesting AC power supplies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, San Diego, California, USA, August 8-10, 2005, pp. 315-318, 2005, ACM, 1-59593-137-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
AC power supplies, power-on-reset, energy harvesting, self-timed circuits, dynamic memory |
40 | Rajeevan Amirtharajah, Justin Wenck, Jamie Collier, Jeff Siebert, Bicky Zhou |
Circuits for energy harvesting sensor signal processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 639-644, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
AC power supplies, power-on-reset, energy harvesting, self-timed circuits, dynamic memory |
34 | Andrei A. Antonov, Maksim S. Karpovich, Vladislav Yu. Vasilyev |
Power-On Reset Circuit in 180-nm CMOS With Brownout Detection, Stable Switching Points, Long Reset Pulse Duration, and Resilience to Switching Noise. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 30(10), pp. 1373-1380, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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34 | Huy-Binh Le, Xuan-Dien Do, Sang-Gug Lee 0001, Seung-Tak Ryu |
A Long Reset-Time Power-On Reset Circuit With Brown-Out Detection Capability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 58-II(11), pp. 778-782, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
33 | Qadeer Ahmad Khan, G. K. Siddhartha |
A sequence independent power-on-reset circuit for multi-voltage systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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32 | Sanjay Kumar Wadhwa, G. K. Siddhartha, Anand Gaurav |
Zero Steady State Current Power on Reset Circuit with Brown-Out Detector. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 631-636, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
32 | Takeo Yasuda, Masaaki Yamamoto, Takafumi Nishi |
A power-on reset pulse generator for low voltage applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 599-601, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
30 | Toru Tanzawa |
A process- and temperature-tolerant power-on reset circuit with a flexible detection level higher than the bandgap voltage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 2302-2305, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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25 | Luis E. Rueda G., Nestor Cuevas, Elkim Roa |
An Ultra-Low Power Multi-Level Power-on Reset for Fine-Grained Power Management Strategies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LASCAS ![In: 10th IEEE Latin American Symposium on Circuits & Systems, LASCAS 2019, Armenia, Colombia, February 24-27, 2019, pp. 185-188, 2019, IEEE, 978-1-7281-0453-9. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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22 | Heng You, Jia Yuan, Zenghui Yu, Shushan Qiao |
An Accurate Low-Power Power-on-Reset Circuit in 55-nm CMOS Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 69(8), pp. 3361-3365, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
22 | Andres Amaya, Luis E. Rueda G., Elkim Roa |
A Multi-Level Power-on Reset for Fine-Grained Power Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: 28th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2018, Platja d'Aro, Spain, July 2-4, 2018, pp. 129-132, 2018, IEEE, 978-1-5386-6365-3. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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22 | Xiaodong Meng, Xing Li 0004, Yuan Yao, Chi-Ying Tsui, Wing-Hung Ki |
An Indoor Solar Energy Harvester with Ultra-Low-Power Reconfigurable Power-On-Reset-Styled Voltage Detector. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy, pp. 1-5, 2018, IEEE, 978-1-5386-4881-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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22 | Abhik Das, Yuan Gao 0011, Tony Tae-Hyoung Kim |
A 220-mV Power-on-Reset Based Self-Starter With 2-nW Quiescent Power for Thermoelectric Energy Harvesting Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(1), pp. 217-226, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
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22 | Suat U. Ay |
A Compact CMOS Power-on-Reset Pulse Generator Design with Low-Power and Wide Operation Range. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 19(6), pp. 1365-1380, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
22 | Jin Zhang, Lin Jiang, Zecang Zeng |
Design of a Novel Power-on-Reset Circuit Based on Power Supply Detector. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ScalCom-EmbeddedCom ![In: International Conference on Scalable Computing and Communications / Eighth International Conference on Embedded Computing, ScalCom-EmbeddedCom 2009, Dalian, China, September 25-27, 2009, pp. 355-359, 2009, IEEE Computer Society, 978-0-7695-3825-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
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18 | Yulian Wang, Xiaoyu Hu, Xinxin Ren, Dashan Shi, Heng You, Shushan Qiao, Yumei Zhou |
A 0.6V 1.76nW power on reset circuit with high accuracy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 19(10), pp. 20220119, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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18 | Jiashu Guo, Houpeng Chen, Yu Lei 0003, Xi Li 0012, Qian Wang, Chenchen Xie, Jie Miao, Yi Lv, Weili Liu, Zhitang Song |
An Ultra-Low Quiescent Current Resistor-Less Power on Reset Circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 68(1), pp. 146-150, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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18 | Heng You, Jia Yuan, Zenghui Yu, Shushan Qiao |
A 0.5V 36nW 10-Transistor Power-on-Reset Circuit with High Accuracy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021, pp. 1-5, 2021, IEEE, 978-1-7281-9201-7. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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18 | Ting Sun, Qi Yu 0002, Ning Ning 0002, Kejun Wu, Zhong Zhang 0002, Jing Li 0022 |
A nano-watt power-on reset circuit with Brown-Out detection capability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 105, pp. 104898, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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18 | Fabián Leonardo Cabrera, Fernando Rangel de Sousa, Héctor Pettenghi |
Introducing Asymmetry in a CMOS Latch to Obtain Inherent Power-On-Reset Behavior. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LASCAS ![In: 10th IEEE Latin American Symposium on Circuits & Systems, LASCAS 2019, Armenia, Colombia, February 24-27, 2019, pp. 61-64, 2019, IEEE, 978-1-7281-0453-9. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
18 | Chengying Chen, Liming Chen 0007, Jun Yang |
A Mixed-Signal Programmable Time-Division Power-On-Reset and Volume Control Circuit for High-Resolution Hearing-Aid SoC Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electr. Comput. Eng. ![In: J. Electr. Comput. Eng. 2018, pp. 1502749:1-1502749:7, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
18 | Vivek Nautiyal, Lalit Gupta, Gaurav Singla, Jitendra Dasani, Sagar Dwivedi, Martin Kinkade |
Self-timed Power-on Reset Circuit for Pseudo Dual/Two Port SRAM Used in Low-Voltage IoT Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things - 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23-25, 2017, Revised and Extended Selected Papers, pp. 92-111, 2017, Springer, 978-3-030-15662-6. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
18 | Vivek Nautiyal, Gaurav Singla, Lalit Gupta, Jitendra Dasani, Sagar Dwivedi, Martin Kinkade |
Robust, self-timed power-on reset circuit for low-voltage applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: 2017 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23-25, 2017, pp. 1-6, 2017, IEEE, 978-1-5386-2880-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
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18 | Amit Chhabra, Yagnesh Dineshbhai Vaderiya |
Low-Energy Power-ON-Reset Circuit for Dual Supply SRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 24(5), pp. 2003-2007, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
18 | Sanjay Kumar Wadhwa, Avinash Chandra Tripathi |
Measurement of de-assertion threshold of power-on-reset circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VDAT ![In: 19th International Symposium on VLSI Design and Test, VDAT 2015, Ahmedabad, India, June 26-29, 2015, pp. 1-4, 2015, IEEE Computer Society, 978-1-4799-1743-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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18 | Edward K. F. Lee |
A low voltage auto-reconfigured power-on-reset/bandgap reference circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014, pp. 918-921, 2014, IEEE, 978-1-4799-3431-7. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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18 | Gerald Hilber, Dominik Gruber, Michael Sams, Timm Ostermann |
Calibration of a flexible high precision Power-On Reset during production test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2012 IEEE International Test Conference, ITC 2012, Anaheim, CA, USA, November 5-8, 2012, pp. 1-7, 2012, IEEE Computer Society, 978-1-4673-1594-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
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18 | Gerhard Rappitsch, Oliver Eisenberger, Bernd Obermeier, Andreas Ripp, Michael Pronath |
Experimental Verification of Simulation Based Yield Optimization for Power-On Reset Cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, CICC 2006, DoubleTree Hotel, San Jose, California, USA, September 10-13, 2006, pp. 857-860, 2006, IEEE, 1-4244-0075-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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18 | Kuo-Hsing Cheng, Yu-Lung Lo |
A fast-lock DLL with power-on reset circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 357-360, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
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18 | Takeo Yasuda, Masaaki Yamamoto |
An On-Chip Power-on Reset Circuit for Low Voltage Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(2), pp. 366-372, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP BibTeX RDF |
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18 | Nima Maghari, Omid Shoaei |
A dynamic start-up circuit for low voltage CMOS current mirrors with power-down support. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 4265-4268, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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15 | Yunlei Li, Jin Liu |
A 13.56 MHz RFID transponder front-end with merged load modulation and voltage doubler-clamping rectifier circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 5095-5098, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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13 | Kun-Yo Liu, Tim Yao |
Design of a RFID Transponder for Application on Secutiry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Fourth International Conference on Information Technology: New Generations (ITNG 2007), 2-4 April 2007, Las Vegas, Nevada, USA, pp. 945-946, 2007, IEEE Computer Society, 978-0-7695-2776-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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