Search results for "power-wall"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
45	Ulya R. Karpuzcu, Brian Greskamp, Josep Torrellas	The BubbleWrap many-core: popping cores for sequential acceleration.	MICRO	2009	DBLP DOI BibTeX RDF	power wall, process scaling, processor aging, voltage scaling
43	Cor Meenderinck, Ben H. H. Juurlink	(When) Will CMPs Hit the Power Wall?.	Euro-Par Workshops	2008	DBLP DOI BibTeX RDF
39	Xiaochen Guo, Engin Ipek, Tolga Soyata	Resistive computation: avoiding the power wall with low-leakage, STT-MRAM based computing.	ISCA	2010	DBLP DOI BibTeX RDF	STT-MRAM, power-efficiency
36	Leonidas Deligiannidis, Larry Whitman	User Interaction in a Power-Wall Based Virtual Reality Environment.	VR	2003	DBLP DOI BibTeX RDF	power-wall, interaction
23	Seunghwa Kang, David A. Bader	An efficient transactional memory algorithm for computing minimum spanning forest of sparse graphs.	PPoPP	2009	DBLP DOI BibTeX RDF	minimum spanning forest, transactional memory, minimum spanning tree
23	O. Wohlmuth	Keynote: High performance computing based on FPGAS.	FPL	2008	DBLP DOI BibTeX RDF
18	Yongxin Zhu 0001, Weng-Fai Wong, Stefan Andrei	Co-optimization of Performance and Power in a Superscalar Processor Design.	EUC Workshops	2006	DBLP DOI BibTeX RDF
18	Xuejun Yang, Yong Dou, Qingfeng Hu	Progress and Challenges in High Performance Computer Technology.	J. Comput. Sci. Technol.	2006	DBLP DOI BibTeX RDF	high performance computer, supercomputer, massively parallel processing
17	Kshitij Sudan, Karthick Rajamani, Wei Huang 0004, John B. Carter	Tiered Memory: An Iso-Power Memory Architecture to Address the Memory Power Wall.	IEEE Trans. Computers	2012	DBLP DOI BibTeX RDF
15	Jean-Pierre Schoellkopf	ATRS: An Alternative Roadmap for Semiconductors, Technology Evolution and Impacts on System Architecture.	ASYNC	2006	DBLP DOI BibTeX RDF
15	Vasanth Venkatachalam, Michael Franz	Power reduction techniques for microprocessor systems.	ACM Comput. Surv.	2005	DBLP DOI BibTeX RDF	power reduction, Energy dissipation
14	Marc A. Taubenblatt	Optical Interconnects for large scale computing: How Do We Get Beyond the Cost & Power Wall?	OFC	2021	DBLP BibTeX RDF
14	Arthur Francisco Lorenzon, Antonio Carlos Schneider Beck Filho	Parallel Computing Hits the Power Wall - Principles, Challenges, and a Survey of Solutions		2019	DOI RDF
14	Mike Fagan, Jeremy Schlachter, Kazutomo Yoshii, Sven Leyffer, Krishna V. Palem, Marc Snir, Stefan M. Wild, Christian C. Enz	Overcoming the power wall by exploiting inexactness and emerging COTS architectural features: Trading precision for improving application quality.	SoCC	2016	DBLP DOI BibTeX RDF
14	Lieven Eeckhout	Heterogeneity in Response to the Power Wall.	IEEE Micro	2015	DBLP DOI BibTeX RDF
14	Raja Appuswamy, Matthaios Olma, Anastasia Ailamaki	Scaling the Memory Power Wall With DRAM-Aware Data Management.	DaMoN	2015	DBLP DOI BibTeX RDF
14	Oreste Villa, Daniel R. Johnson, Mike O'Connor, Evgeny Bolotin, David W. Nellans, Justin Luitjens, Nikolai Sakharnykh, Peng Wang, Paulius Micikevicius, Anthony Scudiero, Stephen W. Keckler, William J. Dally	Scaling the Power Wall: A Path to Exascale.	SC	2014	DBLP DOI BibTeX RDF
14	Liang Wang 0055, Kevin Skadron	Implications of the Power Wall: Dim Cores and Reconfigurable Logic.	IEEE Micro	2013	DBLP DOI BibTeX RDF
14	Pradip Bose	Power Wall.	Encyclopedia of Parallel Computing	2011	DBLP DOI BibTeX RDF
12	John L. Gustafson	Reevaluating Amdahl's Law.	Commun. ACM	1988	DBLP DOI BibTeX RDF
9	Mateo Valero	A european perspective on supercomputing.	ICS	2009	DBLP DOI BibTeX RDF	exaflop, exascale computing, supercomputing grids, supercomputing infrastructure, programming models, multicore architectures
9	Bertil Thomas, Mohsen Soleimani-Mohseni	Artificial neural network models for indoor temperature prediction: investigations in two buildings.	Neural Comput. Appl.	2007	DBLP DOI BibTeX RDF	Temperature prediction, Building automation systems, Neural networks, Identification, Model predictive control