Search results for "pre-execution"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
82	Dongkeun Kim, Donald Yeung	A study of source-level compiler algorithms for automatic construction of pre-execution code.	ACM Trans. Comput. Syst.	2004	DBLP DOI BibTeX RDF	pre-execution, prefetch conversion, speculative loop parallelization, multithreading, program slicing, Data prefetching, memory-level parallelism
54	Vlad Petric, Amir Roth	Energy-Effectiveness of Pre-Execution and Energy-Aware P-Thread Selection.	ISCA	2005	DBLP DOI BibTeX RDF
54	Dongkeun Kim, Donald Yeung	Design and evaluation of compiler algorithms for pre-execution.	ASPLOS	2002	DBLP DOI BibTeX RDF
46	Chi-Keung Luk	Tolerating memory latency through software-controlled pre-execution in simultaneous multithreading processors.	ISCA	2001	DBLP DOI BibTeX RDF
40	Amir Roth, Gurindar S. Sohi	A quantitative framework for automated pre-execution thread selection.	MICRO	2002	DBLP DOI BibTeX RDF
38	Won Woo Ro, Jean-Luc Gaudiot	SPEAR: A Hybrid Model for Speculative Pre-Execution.	IPDPS	2004	DBLP DOI BibTeX RDF
35	Yong Chen 0001, Surendra Byna, Xian-He Sun, Rajeev Thakur, William Gropp	Hiding I/O latency with pre-execution prefetching for parallel applications.	SC	2008	DBLP DOI BibTeX RDF
34	Juan Fang, Hongbo Zhang	Analysis and Improvement of Dynamic Multi-core Hardware Prefetch Technology Based on Pre-execution.	FCST	2010	DBLP DOI BibTeX RDF	multi-core prefetch, pre-execution based prefetching, coherency of cache, CMP, multicore architecture
30	Won Woo Ro, Jean-Luc Gaudiot	Compiler Support for Dynamic Speculative Pre-Execution.	Interaction between Compilers and Computer Architectures	2003	DBLP DOI BibTeX RDF
27	Won Woo Ro, Jean-Luc Gaudiot	A Low-Complexity Issue Queue Design with Speculative Pre-execution.	HiPC	2005	DBLP DOI BibTeX RDF
21	Won Woo Ro, Jean-Luc Gaudiot, Stephen P. Crago, Alvin M. Despain	HiDISC: A Decoupled Architecture for Data-Intensive Application.	IPDPS	2003	DBLP DOI BibTeX RDF	Memory access latency and Speculative pre-execution, Data prefetching, Data-intensive applications, Decoupled architecture
21	Akihiro Yamamoto, Yusuke Tanaka 0001, Hideki Ando, Toshio Shimada	Data prefetching and address pre-calculation through instruction pre-execution with two-step physical register deallocation.	MEDEA@PACT	2007	DBLP DOI BibTeX RDF
14	Sanyam Mehta, Gary Elsesser, Terry Greyzck	Software pre-execution for irregular memory accesses in the HBM era.	CC	2022	DBLP DOI BibTeX RDF
14	Mustafa Cavus, Mohammed Shatnawi, Resit Sendag, Augustus K. Uht	Exploring Prefetching, Pre-Execution and Branch Outcome Streaming for In-Memory Database Lookups.	IEEE Comput. Archit. Lett.	2020	DBLP DOI BibTeX RDF
14	Keunsoo Kim, Sangpil Lee, Myung Kuk Yoon, Gunjae Koo, Won Woo Ro, Murali Annavaram	Warped-preexecution: A GPU pre-execution approach for improving latency hiding.	HPCA	2016	DBLP DOI BibTeX RDF
14	Yue Zhao 0014, Kenji Yoshigoe, Mengjun Xie	Pre-execution data prefetching with I/O scheduling.	J. Supercomput.	2014	DBLP DOI BibTeX RDF
14	Hamid Fadishei, Hossein Deldari, Mahmoud Naghibzadeh	Pre-execution power consumption prediction of computational multithreaded workloads.	Clust. Comput.	2014	DBLP DOI BibTeX RDF
14	Yue Zhao 0014, Kenji Yoshigoe, Mengjun Xie	Pre-execution Data Prefetching with Inter-thread I/O Scheduling.	ISC	2013	DBLP DOI BibTeX RDF
14	Ákos Dudás, Sándor Juhász, Tamás Schrádi	Software Controlled Adaptive Pre-Execution for Data Prefetching.	Int. J. Parallel Program.	2012	DBLP DOI BibTeX RDF
14	Yusuke Tanaka 0001, Hideki Ando	Register File Size Reduction through Instruction Pre-Execution Incorporating Value Prediction.	IEICE Trans. Inf. Syst.	2010	DBLP DOI BibTeX RDF
14	Kazunaga Hyodo, Kengo Iwamoto, Hideki Ando	Energy-Efficient Pre-Execution Techniques in Two-Step Physical Register Deallocation.	IEICE Trans. Inf. Syst.	2009	DBLP DOI BibTeX RDF
14	Yusuke Tanaka 0001, Hideki Ando	Reducing register file size through instruction pre-execution enhanced by value prediction.	ICCD	2009	DBLP DOI BibTeX RDF
14	Won Woo Ro, Jean-Luc Gaudiot	A low-complexity microprocessor design with speculative pre-execution.	J. Syst. Archit.	2008	DBLP DOI BibTeX RDF
14	Klaus Peter Fischer, Udo Bleimann, Steven Furnell	Pre-execution Security Policy Assessment of Remotely Defined BPEL-Based Grid Processes.	TrustBus	2007	DBLP DOI BibTeX RDF	Business Process Execution Language (BPEL), Grid Processes, Security Policy Enforcement, Virtual Organizations, Grid Services, Information Flow Analysis
14	Won Woo Ro, Jean-Luc Gaudiot	Speculative pre-execution assisted by compiler (SPEAR).	J. Parallel Distributed Comput.	2006	DBLP DOI BibTeX RDF
14	Dongkeun Kim	Compiler-Based Pre-Execution.		2004	RDF
14	Jie-Bing Yu, David J. DeWitt	Query Pre-Execution and Batching in Paradise: A Two-Pronged Approach to the Efficient Processing of Queries on Tape-Resident Raster Images.	SSDBM	1997	DBLP DOI BibTeX RDF
13	Miquel Pericàs, Adrián Cristal, Rubén González 0001, Daniel A. Jiménez	Chained In-Order/Out-of-Order DoubleCore Architecture.	SBAC-PAD	2005	DBLP DOI BibTeX RDF
13	Dongkeun Kim, Shih-Wei Liao, Perry H. Wang, Juan del Cuvillo, Xinmin Tian, Xiang Zou, Hong Wang 0003, Donald Yeung, Milind Girkar, John Paul Shen	Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors.	CGO	2004	DBLP DOI BibTeX RDF
12	Onur Mutlu, Hyesoon Kim, Yale N. Patt	Address-Value Delta (AVD) Prediction: Increasing the Effectiveness of Runahead Execution by Exploiting Regular Memory Allocation Patterns.	MICRO	2005	DBLP DOI BibTeX RDF
12	Vineet Sahula, C. P. Ravikumar	The Hierarchical Concurrent Flow Graph Approach for Modeling and Analysis of Design Processes.	VLSI Design	2001	DBLP DOI BibTeX RDF
11	Tor M. Aamodt, Paul Chow, Per Hammarlund, Hong Wang 0003, John Paul Shen	Hardware Support for Prescient Instruction Prefetch.	HPCA	2004	DBLP DOI BibTeX RDF
9	Amir Roth, Gurindar S. Sohi	Speculative Data-Driven Multithreading.	HPCA	2001	DBLP DOI BibTeX RDF
7	Lican Huang	Production Rule Based Selection Decision for Dynamic Flexible Workflow.	eScience	2007	DBLP DOI BibTeX RDF
7	Takashi Nakada, Hiroshi Nakashima	Design and Implementation of a High Speed Microprocessor Simulator BurstScalar.	MASCOTS	2004	DBLP DOI BibTeX RDF
7	Gerti Kappel, Gerhard Kramler, Werner Retschitzegger	TriGS Debugger - A Tool for Debugging Active Database Behavior.	DEXA	2001	DBLP DOI BibTeX RDF
5	Y. C. Ngeow, David Chieng, Azhar Kassim Mustapha, Erin Goh, Huat Kin Low	Web-based Device Workflow Management Engine.	MUE	2007	DBLP DOI BibTeX RDF
5	B. Cirou, Marie Christine Counilh, Jean Roman	Programming Irregular Scientific Algorithms with Static Properties on Clusters of SMP Nodes.	ICPP Workshops	2005	DBLP DOI BibTeX RDF