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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 1 occurrences of 1 keywords
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Results
Found 12 publication records. Showing 10 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 20 | William Roshan Quadros, Ved Vyas, Michael L. Brewer, Steven J. Owen, Kenji Shimada |
A Computational Framework for Generating Sizing Function in Assembly Meshing.  |
IMR  |
2005 |
DBLP DOI BibTeX RDF |
Assembly meshing, finite element mesh sizing function, pre-mesh, skeleton |
| 1 | Koundinya Koorapati, Rubini Pandu, Prem Kumar Ramesh, Sairam Veeraswamy, Usha Narasappa |
Towards a unified ontology for IoT fabric with SDDC. |
J. King Saud Univ. Comput. Inf. Sci. |
2022 |
DBLP DOI BibTeX RDF |
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| 1 | Jingcheng Du, Qing Wang, Jingqi Wang, Prerana Ramesh, Yang Xiang 0003, Xiaoqian Jiang, Cui Tao |
COVID-19 trial graph: a linked graph for COVID-19 clinical trials. |
J. Am. Medical Informatics Assoc. |
2021 |
DBLP DOI BibTeX RDF |
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| 1 | Naga Durga Prasad Avirneni, Prem Kumar Ramesh, Arun K. Somani |
Managing contamination delay to improve Timing Speculation architectures. |
PeerJ Comput. Sci. |
2016 |
DBLP DOI BibTeX RDF |
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| 1 | Naga Durga Prasad Avirneni, Prem Kumar Ramesh, Arun K. Somani |
Utilization Aware Power Management in Reliable and Aggressive Chip Multi Processors. |
IEEE Trans. Computers |
2016 |
DBLP DOI BibTeX RDF |
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| 1 | Naga Durga Prasad Avirneni, Prem Kumar Ramesh, Arun K. Somani |
Managing contamination delay to improve Timing Speculation architectures. |
PeerJ Prepr. |
2016 |
DBLP DOI BibTeX RDF |
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| 1 | Naga Durga Prasad Avirneni, Prem Ramesh, Arun K. Somani |
Managing contamination delay to improve Timing Speculation architectures. |
PeerJ Prepr. |
2015 |
DBLP DOI BibTeX RDF |
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| 1 | Shubhalaxmi Kher, T. S. Ganesh, Prem Ramesh, Arun K. Somani |
Greedy Dynamic Crossover Management in Hardware Accelerated Genetic Algorithm Implementations Using FPGA. |
UKSim |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Nagarajan Venkateswaran, Deepak Srinivasan, Madhavan Manivannan, T. P. Ramnath Sai Sagar, Shyamsundar Gopalakrishnan, Vinoth Krishnan Elangovan, Arvind M, Prem Kumar Ramesh, Karthik Ganesan 0006, Viswanath Krishnamurthy, Sivaramakrishnan |
Future generation supercomputers II: a paradigm for cluster architecture. |
SIGARCH Comput. Archit. News |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Nagarajan Venkateswaran, Deepak Srinivasan, Madhavan Manivannan, T. P. Ramnath Sai Sagar, Shyamsundar Gopalakrishnan, Vinoth Krishnan Elangovan, Karthik Chandrasekar 0001, Prem Kumar Ramesh, Viswanath Venkatesan, Arvindakshan Babu, Sudharshan |
Future generation supercomputers I: a paradigm for node architecture. |
SIGARCH Comput. Archit. News |
2007 |
DBLP DOI BibTeX RDF |
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