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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 21 occurrences of 19 keywords
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Results
Found 2 publication records. Showing 2 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
77 | David J. Lilja, Pen-Chung Yew |
Improving Memory Utilization in Cache Coherence Directories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 4(10), pp. 1130-1146, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
memory utilization, cache coherence directories, large-scale shared memorymultiprocessors, software-directed schemes, compile-time memory disambiguation, dynamically tagged directory, high-level sharing information, configurationmanagement, discrete event simulation, compiler optimizations, program compilers, shared memory systems, trace-driven simulations, buffer storage, storage allocation, interprocedural analysis |
41 | Bob Janssens, W. Kent Fuchs |
The Performance of Cache-Based Error Recovery in Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(10), pp. 1033-1043, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
cache-based error recovery performance, cache-based checkpointing, rollback error recovery, shared-memorymultiprocessors, inherent redundancy, computation state, rollback propagation, EncoreMultimax, recovery schemes, cache-based schemes, low performance overhead, checkpoint interval, performance evaluation, performance evaluation, virtual machines, multiprocessors, redundancy, memory hierarchy, shared memory systems, system recovery, buffer storage, parallel applications, cache coherence protocol, transient errors, cache replacement policy, address traces |
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