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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 15 occurrences of 11 keywords
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Results
Found 25 publication records. Showing 25 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
112 | Jirí Jaros, Vaclav Dvorak |
Evolutionary-based conflict-free scheduling of collective communications on spidergon NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO ![In: Genetic and Evolutionary Computation Conference, GECCO 2010, Proceedings, Portland, Oregon, USA, July 7-11, 2010, pp. 1171-1178, 2010, ACM, 978-1-4503-0072-8. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
fat topologies, spidergon, collective communications, wormhole switching, evolutionary design, communication scheduling |
98 | Mahmoud Moadeli, Alireza Shahrabi, Wim Vanderbauwhede, Mohamed Ould-Khaoua |
An Analytical Performance Model for the Spidergon NoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA ![In: 21st International Conference on Advanced Information Networking and Applications (AINA 2007), May 21-23, 2007, Niagara Falls, Canada, pp. 1014-1021, 2007, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
75 | Mahmoud Moadeli, Alireza Shahrabi, Wim Vanderbauwhede, Mohamed Ould-Khaoua |
Communication Modelling of the Spidergon NoC with Virtual Channels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 2007 International Conference on Parallel Processing (ICPP 2007), September 10-14, 2007, Xi-An, China, pp. 76, 2007, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
75 | Luciano Bononi, Nicola Concer |
Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE Designers' Forum ![In: Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 154-159, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-0-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
53 | Suboh A. Suboh, Mohamed Bakhouya, Tarek A. El-Ghazawi |
Simulation and Evaluation of On-Chip Interconnect Architectures: 2D Mesh, Spidergon, and WK-Recursive Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Second International Symposium on Networks-on-Chips, NOCS 2008, 5-6 April 2008, Newcastle University, UK. Proceedings, pp. 205-206, 2008, IEEE Computer Society, 978-0-7695-3098-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
System on Chip, Network on Chip, Modeling and simulation, On Chip Interconnects |
45 | Suboh A. Suboh, Mohamed Bakhouya, Jaafar Gaber, Tarek A. El-Ghazawi |
An interconnection architecture for network-on-chip systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Telecommun. Syst. ![In: Telecommun. Syst. 37(1-3), pp. 137-144, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Switching and routing, Network on chip, Network analysis, Modeling and simulation, On-chip interconnects |
45 | Mahmoud Moadeli, Wim Vanderbauwhede, Ali Shahrabi |
Quarc: A Novel Network-On-Chip Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 14th International Conference on Parallel and Distributed Systems, ICPADS 2008, Melbourne, Victoria, Australia, December 8-10, 2008, pp. 705-712, 2008, IEEE Computer Society, 978-0-7695-3434-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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30 | Fadi N. Sibai, Abu Asaduzzaman, Ali El-Moursy |
3D layout of the Spidergon-Donut on-chip interconnection network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. High Perform. Syst. Archit. ![In: Int. J. High Perform. Syst. Archit. 11(3), pp. 137-147, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
30 | Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas |
Improving Reliability in Spidergon Network on Chip-Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: 63rd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2020, Springfield, MA, USA, August 9-12, 2020, pp. 474-477, 2020, IEEE, 978-1-7281-8058-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
30 | Hiroshi Nakahara, Ryota Yasudo, Hiroki Matsutani, Hideharu Amano, Michihiro Koibuchi |
3D Layout of Spidergon, Flattened Butterfly and Dragonfly on a Chip Stack with Inductive Coupling Through Chip Interface. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN-FCST-ISCC ![In: 14th International Symposium on Pervasive Systems, Algorithms and Networks & 11th International Conference on Frontier of Computer Science and Technology & Third International Symposium of Creative Computing, ISPAN-FCST-ISCC 2017, Exeter, United Kingdom, June 21-23, 2017, pp. 52-59, 2017, IEEE Computer Society, 978-1-5386-0840-1. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
30 | Marwah Albughdar, Ausif Mahmood |
Maximally Adaptive, Deadlock-Free Routing in Spidergon-Donut Network for Large Multicore NOCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPDC ![In: 14th International Symposium on Parallel and Distributed Computing, ISPDC 2015, Limassol, Cyprus, June 29 - July 2, 2015, pp. 210-214, 2015, IEEE Computer Society, 978-1-4673-7147-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
30 | Rimpy Bishnoi, Pankaj Kumar Srivastava, Vijay Laxmi, Manoj Singh Gaur, Apoorva Sikka |
Distributed adaptive routing for spidergon NoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VDAT ![In: 18th International Symposium on VLSI Design and Test, VDAT 2014, Coimbatore, India, July 16-18, 2014, pp. 1-6, 2014, IEEE, 978-1-4799-5088-1. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
30 | Florentine Dubois, José Cano 0001, Marcello Coppola, José Flich, Frédéric Pétrot |
Spidergon STNoC design flow. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: NOCS 2011, Fifth ACM/IEEE International Symposium on Networks-on-Chip, Pittsburgh, Pennsylvania, USA, May 1-4, 2011, pp. 267-268, 2011, ACM/IEEE Computer Society, 978-1-4503-0720-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
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30 | Mahmoud Moadeli, Alireza Shahrabi, Wim Vanderbauwhede, Partha P. Maji |
An analytical performance model for the Spidergon NoC with virtual channels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Syst. Archit. ![In: J. Syst. Archit. 56(1), pp. 16-26, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
30 | Marcello Coppola |
Spidergon STNoC: The technology that adds value to your System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Hot Chips Symposium ![In: 2010 IEEE Hot Chips 22 Symposium, Stanford, CA, USA, August 22-24, 2010, pp. 1-39, 2010, IEEE, 978-1-4673-8875-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
30 | Khaldon Hassan, Marcello Coppola |
Off-Chip SDRAM Access Through Spidergon STNoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI (Selected papers) ![In: VLSI 2010 Annual Symposium - Selected papers, pp. 245-261, 2010, Springer, 978-94-007-1487-8. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
30 | Vladimir Pasca, Lorena Anghel, Claudia Rusu, Riccardo Locatelli, Massimo Coppola |
Error resilience of intra-die and inter-die communication with 3D spidergon STNoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2010, Dresden, Germany, March 8-12, 2010, pp. 275-278, 2010, IEEE Computer Society, 978-1-4244-7054-9. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
30 | Mohamed Bakhouya, Suboh A. Suboh, Jaafar Gaber, Tarek A. El-Ghazawi |
Analytical performance comparison of 2D Mesh, WK-recursive, and Spidergon NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS Workshops ![In: 24th IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2010, Atlanta, Georgia, USA, 19-23 April 2010 - Workshop Proceedings, pp. 1-6, 2010, IEEE. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
30 | Marcello Coppola |
3D self testing with Spidergon STNoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 28th IEEE VLSI Test Symposium, VTS 2010, April 19-22, 2010, Santa Cruz, California, USA, pp. 327, 2010, IEEE Computer Society, 978-1-4244-6648-1. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
30 | Mahmoud Moadeli, Ali Shahrabi, Wim Vanderbauwhede, Mohamed Ould-Khaoua |
An Analytical Comparison of the Spidergon and Rectangular Mesh NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Interconnect. Networks ![In: J. Interconnect. Networks 10(1-2), pp. 167-188, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
30 | Nicola Concer, Salvatore Iamundo, Luciano Bononi |
aEqualized: A novel routing algorithm for the Spidergon Network On Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2009, Nice, France, April 20-24, 2009, pp. 749-754, 2009, IEEE, 978-1-4244-3781-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
30 | Marcello Coppola, Riccardo Locatelli, Giuseppe Maruccia, Lorenzo Pieralisi, Alberto Scandurra |
Spidergon: a novel on-chip communication network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: Proceedings of the 2004 International Symposium on System-on-Chip, Tampere, Finland, November 16-18, 2004, 2004, IEEE, 0-7803-8558-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
23 | Mahmoud Moadeli, Alireza Shahrabi, Wim Vanderbauwhede, Mohamed Ould-Khaoua |
Modeling Differentiated Services-Based QoS in Wormhole-Routed NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA ![In: 22nd International Conference on Advanced Information Networking and Applications, AINA 2008, GinoWan, Okinawa, Japan, March 25-28, 2008, pp. 942-949, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Perfromance modelling, QoS, Network on Chip, Wormhole |
23 | Gianluca Palermo, Cristina Silvano, Giovanni Mariani, Riccardo Locatelli, Marcello Coppola |
Application-Specific Topology Design Customization for STNoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Tenth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2007), 29-31 August 2007, Lübeck, Germany, pp. 547-550, 2007, IEEE Computer Society, 0-7695-2978-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Luciano Bononi, Nicola Concer, Miltos D. Grammatikakis, Marcello Coppola, Riccardo Locatelli |
NoC Topologies Exploration based on Mapping and Simulation Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Tenth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2007), 29-31 August 2007, Lübeck, Germany, pp. 543-546, 2007, IEEE Computer Society, 0-7695-2978-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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