Search results for "superscalars"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
42	Jawad Haj-Yihia, Yosi Ben-Asher, Efraim Rotem, Ahmad Yasin, Ran Ginosar	Compiler-Directed Power Management for Superscalars.	ACM Trans. Archit. Code Optim.	2014	DBLP DOI BibTeX RDF
42	Soner Önder, Rajiv Gupta 0001	Instruction Wake-Up in Wide Issue Superscalars.	Euro-Par	2001	DBLP DOI BibTeX RDF
42	Steven Swanson, Luke K. McDowell, Michael M. Swift, Susan J. Eggers, Henry M. Levy	An evaluation of speculative instruction execution on simultaneous multithreaded processors.	ACM Trans. Comput. Syst.	2003	DBLP DOI BibTeX RDF	multiprocessors, multithreading, Instruction-level parallelism, speculation, thread-level parallelism, simultaneous multithreading
42	Dezsö Sima	The Design Space of Register Renaming Techniques.	IEEE Micro	2000	DBLP DOI BibTeX RDF
42	Alex Ramírez, Josep Lluís Larriba-Pey, Carlos Navarro, Xavi Serrano, Mateo Valero, Josep Torrellas	Optimization of Instruction Fetch for Decision Support Workloads.	ICPP	1999	DBLP DOI BibTeX RDF	High performance fetch, databases, profiling, compiler optimization, trace cache
42	Pradeep K. Dubey, George B. Adams III, Michael J. Flynn	Evaluating Performance Tradeoffs Between Fine-Grained and Coarse-Grained Alternatives.	IEEE Trans. Parallel Distributed Syst.	1995	DBLP DOI BibTeX RDF
31	Manu Gulati, Nader Bagherzadeh	Performance Study of a Multithreaded Superscalar Microprocessor.	HPCA	1996	DBLP DOI BibTeX RDF	multithreading, instruction-level parallelism, Superscalars, out-of-order execution
31	Kemal Ebcioglu, Randy D. Groves, Ki-Chang Kim, Gabriel M. Silberman, Isaac Ziv	VLIW Compilation Techniques in a Superscalar Environment.	PLDI	1994	DBLP DOI BibTeX RDF	profiling directed feedback, compiler optimizations, software pipelining, VLIW, superscalars, global scheduling, IBM RS/6000
31	Hwa C. Torng, Martin Day	Interrupt Handling for Out-of-Order Execution Processors.	IEEE Trans. Computers	1993	DBLP DOI BibTeX RDF	out-of-order execution processors, low-level execution concurrency, vexing problem, hardware mechanism, concurrency control, latency, exception handling, exception handling, interrupts, superscalars, performance degradation, performance enhancement, instruction window, multiple instructions, interrupt handling
21	Edward Lee, Craig B. Zilles	Branch-on-random.	CGO	2008	DBLP DOI BibTeX RDF	lfsr, sampling, profiling, instrumentation, branch, pseudo-random
21	Michael D. Powell, T. N. Vijaykumar	Resource area dilation to reduce power density in throughput servers.	ISLPED	2007	DBLP DOI BibTeX RDF	throughput servers, SMT, power density
21	Ramadass Nagarajan, Sundeep K. Kushwaha, Doug Burger, Kathryn S. McKinley, Calvin Lin, Stephen W. Keckler	Static Placement, Dynamic Issue (SPDI) Scheduling for EDGE Architectures.	IEEE PACT	2004	DBLP DOI BibTeX RDF
21	Ravishankar Rao, Mark Oskin, Frederic T. Chong	HLSpower: Hybrid Statistical Modeling of the Superscalar Power-Performance Design Space.	HiPC	2002	DBLP DOI BibTeX RDF
21	Steven Wallace, Nader Bagherzadeh	Multiple Branch and Block Prediction.	HPCA	1997	DBLP DOI BibTeX RDF
21	Manoj Franklin, Mark Smotherman	A fill-unit approach to multiple instruction issue.	MICRO	1994	DBLP DOI BibTeX RDF	multiple operation issue, instruction-level parallelism, VLIW, superscalar
21	Gabriel M. Silberman, Kemal Ebcioglu	An architectural framework for migration from CISC to higher performance platforms.	ICS	1992	DBLP DOI BibTeX RDF
21	Pradeep K. Dubey, George B. Adams III, Michael J. Flynn	Spectrum of choices: superpipelined, superscalar, or multiprocessor?	SPDP	1991	DBLP DOI BibTeX RDF
21	Toshio Nakatani, Kemal Ebcioglu	Using a lookahead window in a compaction-based parallelizing compiler.	MICRO	1990	DBLP BibTeX RDF
21	Alexandru Nicolau, Roni Potasman	Realistic scheduling: compaction for pipelined architectures.	MICRO	1990	DBLP BibTeX RDF