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Found 6 publication records. Showing 6 according to the selection in the facets
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Authors |
Title |
Venue |
Year |
Link |
Author keywords |
91 | Ron Gabor, Shlomo Weiss, Avi Mendelson |
Fairness enforcement in switch on event multithreading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 4(3), pp. 15, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
SOE, Switch on Event multithreading, coarse-grained multithreading, weighted speedup, performance, fairness, throughput, multithreading |
72 | Ron Gabor, Shlomo Weiss, Avi Mendelson |
Fairness and Throughput in Switch on Event Multithreading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 9-13 December 2006, Orlando, Florida, USA, pp. 149-160, 2006, IEEE Computer Society, 0-7695-2732-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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30 | Perry H. Wang, Jamison D. Collins, Hong Wang 0003, Dongkeun Kim, Bill Greene, Kai-Ming Chan, Aamir B. Yunus, Terry Sych, Stephen F. Moore, John Paul Shen |
Helper threads via virtual multithreading on an experimental itanium® 2 processor-based platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2004, Boston, MA, USA, October 7-13, 2004, pp. 144-155, 2004, ACM, 1-58113-804-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
DB2 database, cache miss prefetching, itanium processor, switch-on-event, multithreading, helper thread, PAL |
8 | Ron Gabor, Avi Mendelson, Shlomo Weiss |
Service level agreement for multithreaded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 6(2), pp. 6:1-6:33, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
performance, fairness, throughput, power, Service level agreement |
8 | Perry H. Wang, Jamison D. Collins, Hong Wang 0003, Dongkeun Kim, Bill Greene, Kai-Ming Chan, Aamir B. Yunus, Terry Sych, Stephen F. Moore, John Paul Shen |
Helper Threads via Virtual Multithreading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 24(6), pp. 74-82, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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8 | Tomasz Madajczak |
An Optimal Abstraction Model for Hardware Multithreading in Modern Processor Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 71-76, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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