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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 5 occurrences of 4 keywords
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Results
Found 10 publication records. Showing 10 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
69 | Wojciech Maly |
Vertical slit transistor based integrated circuits (VeSTICs) paradigm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2009 International Symposium on Physical Design, ISPD 2009, San Diego, California, USA, March 29 - April 1, 2009, pp. 63-64, 2009, ACM, 978-1-60558-449-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
dual gate transistor, ic deign-manufacturing paradigm, vertical channel, vesfet, 3d integration, regular fabric, dfm |
34 | Mikolaj Palgan, Andrzej Pfitzner |
Optimization of the VeSFET Structure Dedicated to Basic Logic Cells in VeSTIC Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MIXDES ![In: 25th International Conference `Mixed Design of Integrated Circuits and System`, MIXDES 2018, Gdynia, Poland, June 21-23, 2018, pp. 299-304, 2018, IEEE, 978-83-63578-14-5. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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34 | Andrzej Pfitzner, Beata Kowalska |
Contribution to scaling of Vertical-Slit Field-Effect Transistor (VeSFET). ![Search on Bibsonomy](Pics/bibsonomy.png) |
MIXDES ![In: 2016 MIXDES - 23rd International Conference Mixed Design of Integrated Circuits and Systems, Lodz, Poland, June 23-25, 2016, pp. 321-325, 2016, IEEE, 978-83-63578-09-1. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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34 | Xiang Qiu, Malgorzata Marek-Sadowska, Wojciech P. Maly |
Three-Dimensional Chips Can Be Cool: Thermal Study of VeSFET-Based 3-D Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 23(5), pp. 869-878, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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34 | Xiang Qiu, Malgorzata Marek-Sadowska, Wojciech P. Maly |
Characterizing VeSFET-Based ICs With CMOS-Oriented EDA Infrastructure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(4), pp. 495-506, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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34 | Andrzej Pfitzner |
Improved simple DC model of Vertical-Slit Field-Effect Transistor (VeSFET). ![Search on Bibsonomy](Pics/bibsonomy.png) |
MIXDES ![In: Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, MIXDES 2014, Lviv, Ukraine, June 19-21, 2014, pp. 323-327, 2014, IEEE. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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34 | Dominik Kasprowicz, Bartosz Swacha |
VeSFET as an analog-circuit component. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2013, Karlovy Vary, Czech Republic, April 8-10, 2013, pp. 199-204, 2013, IEEE Computer Society, 978-1-4673-6135-4. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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34 | Xiang Qiu, Malgorzata Marek-Sadowska, Wojciech Maly |
Designing VeSFET-based ICs with CMOS-oriented EDA infrastructure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: International Symposium on Physical Design, ISPD'13, Stateline, NV, USA, March 24-27, 2013, pp. 130-136, 2013, ACM, 978-1-4503-1954-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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34 | Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly |
On Cell Layout-Performance Relationships in VeSFET-Based, High-Density Regular Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(2), pp. 229-241, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
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34 | Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly |
Performance study of VeSFET-based, high-density regular circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2010 International Symposium on Physical Design, ISPD 2010, San Francisco, California, USA, March 14-17, 2010, pp. 161-168, 2010, ACM, 978-1-60558-920-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
advanced technology., transistor layout, DFM, regular fabric |
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