Search results for "CODES"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Donatella Sciuto, Fabio Salice, Luigi Pomante, William Fornaciari	Metrics for design space exploration of heterogeneous multiprocessor embedded systems.	CODES	2002	DBLP DOI BibTeX RDF	heterogeneous multiprocessor Embedded Systems, metrics for Hw/Sw partitioning, system-level design
1	Traian Pop, Petru Eles, Zebo Peng	Holistic scheduling and analysis of mixed time/event-triggered distributed embedded systems.	CODES	2002	DBLP DOI BibTeX RDF
1	Daler N. Rakhmatov, Sarma B. K. Vrudhula	Hardware-software bipartitioning for dynamically reconfigurable systems.	CODES	2002	DBLP DOI BibTeX RDF	network flows, reconfigurable systems, hardware-software partitioning
1	Jeffry T. Russell	Program slicing for codesign.	CODES	2002	DBLP DOI BibTeX RDF
1	Axel Siebenborn, Oliver Bringmann 0001, Wolfgang Rosenstiel	Worst-case performance analysis of parallel, communicating software processes.	CODES	2002	DBLP DOI BibTeX RDF
1	T. Vinod Kumar Gupta, Roberto E. Ko, Rajeev Barua	Compiler-directed customization of ASIP cores.	CODES	2002	DBLP DOI BibTeX RDF	soft cores, embedded, customization, ASIP
1	Peter Petrov, Alex Orailoglu	Energy frugal tags in reprogrammable I-caches for application-specific embedded processors.	CODES	2002	DBLP DOI BibTeX RDF
1	Brian Grattan, Greg Stitt, Frank Vahid	Codesign-extended applications.	CODES	2002	DBLP DOI BibTeX RDF	hardware/software cospecification, system-on-a-chip, hardware/software partitioning, platform-based design, configurable logic
1	Maurizio Palesi, Tony Givargis	Multi-objective design space exploration using genetic algorithms.	CODES	2002	DBLP DOI BibTeX RDF	Pareto-optimal configurations, system-on-a-chip architectures, genetic algorithms, low power design, design space exploration
1	Rajeshwari Banakar, Stefan Steinke, Bo-Sik Lee, M. Balakrishnan, Peter Marwedel	Scratchpad memory: design alternative for cache on-chip memory in embedded systems.	CODES	2002	DBLP DOI BibTeX RDF	Cactis, SCRATCHPAD
1	Ismail Kadayif, Mahmut T. Kandemir, Ibrahim Kolcu, Guangyu Chen	Locality-conscious process scheduling in embedded systems.	CODES	2002	DBLP DOI BibTeX RDF
1	Per Bjuréus, Mikael Millberg, Axel Jantsch	FPGA resource and timing estimation from Matlab execution traces.	CODES	2002	DBLP DOI BibTeX RDF	FPGA, estimation, Matlab, MATLAB, design exploration
1	Abdenour Azzedine, Jean-Philippe Diguet, Jean Luc Philippe	Large exploration for HW/SW partitioning of multirate and aperiodic real-time systems.	CODES	2002	DBLP DOI BibTeX RDF	HW / SW Codesign, RT scheduling, system design exploration
1	Avishay Orpaz, Shlomo Weiss	A study of CodePack: optimizing embedded code space.	CODES	2002	DBLP DOI BibTeX RDF	codepack, optimization, embedded systems, embedded software, code compression
1	Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf	Energy savings through compression in embedded Java environments.	CODES	2002	DBLP DOI BibTeX RDF	embedded Java, Java, compression, leakage energy
1	Mohamed Shalan, Vincent John Mooney III	Hardware support for real-time embedded multiprocessor system-on-a-chip memory management.	CODES	2002	DBLP DOI BibTeX RDF	Atalanta, SoCDMMU, real-time operating systems., two-level memory management, real-time systems, embedded systems, System-on-a-Chip, dynamic memory management
1	JoAnn M. Paul, Christopher M. Eatedali, Donald E. Thomas	The design context of concurrent computation systems.	CODES	2002	DBLP DOI BibTeX RDF	simulation, modeling, hardware/software codesign, concurrent computation, digital system design
1	Todor P. Stefanov, Bart Kienhuis, Ed F. Deprettere	Algorithmic transformation techniques for efficient exploration of alternative application instances.	CODES	2002	DBLP DOI BibTeX RDF	application instances, design space exploration, system-level design, algorithmic transformations
1	Hyunok Oh, Soonhoi Ha	Hardware-software cosynthesis of multi-mode multi-task embedded systems with real-time constraints.	CODES	2002	DBLP DOI BibTeX RDF	hardware-software cosynthesis, multi-task, multi-mode
1	Marek Jersak, Kai Richter 0001, Rafik Henia, Rolf Ernst, Frank Slomka	Transformation of SDL specifications for system-level timing analysis.	CODES	2002	DBLP DOI BibTeX RDF	SDL
1	Jinfeng Liu 0006, Pai H. Chou, Nader Bagherzadeh	Communication speed selection for embedded systems with networked voltage-scalable processors.	CODES	2002	DBLP DOI BibTeX RDF
1	G. D. Nagendra, V. G. Prem Kumar, B. S. Sheshadri Chakravarthy	Simulation bridge: a framework for multi-processor simulation.	CODES	2002	DBLP DOI BibTeX RDF	simulation framework, instruction set simulator, multiprocessor simulation
1	Dag Björklund, Johan Lilius	A language for multiple models of computation.	CODES	2002	DBLP DOI BibTeX RDF
1	Ali Dasdan	A strongly polynomial-time algorithm for over-constraint resolution: efficient debugging of timing constraint violations.	CODES	2002	DBLP DOI BibTeX RDF	scheduling, high-level synthesis, constraint satisfaction, timing constraints, behavioral synthesis, rate analysis
1	Massimiliano Chiodo	Optimization and synthesis for complex reactive embedded systems by incremental collapsing.	CODES	2002	DBLP DOI BibTeX RDF	real-time systems, embedded systems, finite-state machines, software synthesis
1	Christian Kreiner, Christian Steger, Egon Teiniker, Reinhold Weiss	A novel codesign approach based on distributed virtual machines.	CODES	2002	DBLP DOI BibTeX RDF	Linux
1	Sunghyun Lee, Sungjoo Yoo, Kiyoung Choi	Reconfigurable SoC design with hierarchical FSM and synchronous dataflow model.	CODES	2002	DBLP DOI BibTeX RDF
1	Jörg Henkel, Xiaobo Sharon Hu, Rajesh Gupta 0001, Sri Parameswaran (eds.)	Proceedings of the Tenth International Symposium on Hardware/Software Codesign, CODES 2002, Estes Park, Colorado, USA, May 6-8, 2002	CODES	2002	DBLP DOI BibTeX RDF
1	Vishnu Swaminathan, Krishnendu Chakrabarty	Pruning-based energy-optimal device scheduling for hard real-time systems.	CODES	2002	DBLP DOI BibTeX RDF
1	Martijn J. Rutten, Jos T. J. van Eijndhoven, Evert-Jan D. Pol	Design of multi-tasking coprocessor control for Eclipse.	CODES	2002	DBLP DOI BibTeX RDF
1	Felice Balarin, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli, Yosinori Watanabe, Guang Yang 0004	Concurrent execution semantics and sequential simulation algorithms for the metropolis meta-model.	CODES	2002	DBLP DOI BibTeX RDF	Java, C++
1	Feng-Shi Su, Pao-Ann Hsiung	Extended quasi-static scheduling for formal synthesis and code generation of embedded software.	CODES	2002	DBLP DOI BibTeX RDF	C
1	Juha-Pekka Soininen, Jari Kreku, Yang Qu, Martti Forsell	Fast processor core selection for WLAN modem using mappability estimation.	CODES	2002	DBLP DOI BibTeX RDF	mappability estimation, processor architecture evaluation, codesign, cost function
1	Kanishka Lahiri, Anand Raghunathan, Sujit Dey	Fast system-level power profiling for battery-efficient system design.	CODES	2002	DBLP DOI BibTeX RDF
1	Massimo Baleani, Frank Gennari, Yunjian Jiang, Yatish Patel, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli	HW/SW partitioning and code generation of embedded control applications on a reconfigurable architecture platform.	CODES	2002	DBLP DOI BibTeX RDF	CSoC, code generation, hw/sw co-design
1	Juanjo Noguera, Rosa M. Badia	Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures.	CODES	2002	DBLP DOI BibTeX RDF	dynamic run-time scheduling, reconfigurable architectures
1	Mauricio Varea, Bashir M. Al-Hashimi, Luis Alejandro Cortés, Petru Eles, Zebo Peng	Symbolic model checking of Dual Transition Petri Nets.	CODES	2002	DBLP DOI BibTeX RDF
1	José María Álvarez 0002, Manuel Díaz, Luis Llopis, Ernesto Pimentel 0001, José M. Troya	Deriving hard real-time embedded systems implementations directly from SDL specifications.	CODES	2001	DBLP DOI BibTeX RDF	scheduler, embedded system, real-time, SDL
1	Royan H. L. Ong, Michael J. Pont	Empirical comparison of software-based error detection and correction techniques for embedded systems.	CODES	2001	DBLP DOI BibTeX RDF	NOP fill, electromagnetic interference, function token, instruction pointer corruption, software-based error detection techniques, embedded systems, EMI
1	Praveen K. Murthy, Etan G. Cohen, Steve Rowland	System canvas: a new design environment for embedded DSP and telecommunication systems.	CODES	2001	DBLP DOI BibTeX RDF
1	Kyoungseok Rha, Kiyoung Choi	Area-efficient buffer binding based on a novel two-port FIFO structure.	CODES	2001	DBLP DOI BibTeX RDF	buffer binding, buffer sharing, scheduling, SDF
1	Sungjoo Yoo, Gabriela Nicolescu, Damien Lyonnard, Amer Baghdadi, Ahmed Amine Jerraya	A generic wrapper architecture for multi-processor SoC cosimulation and design.	CODES	2001	DBLP DOI BibTeX RDF
1	William Fornaciari, Fabio Salice, Umberto Bondi, Edi Magini	Development cost and size estimation starting from high-level specifications.	CODES	2001	DBLP DOI BibTeX RDF	project size estimation, VHDL, concurrent engineering, process management, design reuse
1	Sid Ahmed Ali Touati	Optimal acyclic fine-grain scheduling with cache effects for embedded and real time systems.	CODES	2001	DBLP DOI BibTeX RDF	cache effects, optimal acyclic schedule, register constraints, integer programming, resources constraints
1	Paul Pop, Petru Eles, Traian Pop, Zebo Peng	Minimizing system modification in an incremental design approach.	CODES	2001	DBLP DOI BibTeX RDF
1	Basant Kumar Dwivedi, Jan Hoogerbrugge, Paul Stravers, M. Balakrishnan	Exploring design space of parallel realizations: MPEG-2 decoder case study.	CODES	2001	DBLP DOI BibTeX RDF	MPEG-2 decoder, YAPI, parallel realization, process, thread, FIFO
1	Denis Hommais, Frédéric Pétrot, Ivan Augé	A practical tool box for system level communication synthesis.	CODES	2001	DBLP DOI BibTeX RDF
1	Marnix Arnold, Henk Corporaal	Designing domain-specific processors.	CODES	2001	DBLP DOI BibTeX RDF	instruction set synthesis, design space exploration
1	Radoslaw Szymanek, Krzysztof Kuchcinski	A constructive algorithm for memory-aware task assignment and scheduling.	CODES	2001	DBLP DOI BibTeX RDF	task scheduling, constraint programming, task assignment, memory constraints
1	André Chátelain, Yves Mathys, Giovanni Placido, Alberto La Rosa, Luciano Lavagno	High-level architectural co-simulation using Esterel and C.	CODES	2001	DBLP DOI BibTeX RDF
1	Sungtaek Lim, Jihong Kim 0001, Kiyoung Choi	Scheduling-based code size reduction in processors with indirect addressing mode.	CODES	2001	DBLP DOI BibTeX RDF	indirect addressing mode, code generation, code size reduction, storage assignment
1	Frank Slomka, Matthias Dörfel, Ralf Münzenberger	Generating mixing hardware/software systems from SDL specifications.	CODES	2001	DBLP DOI BibTeX RDF
1	Chun Wong, Paul Marchal, Peng Yang	Task concurrency management methodology to schedule the MPEG4 IM1 player on a highly parallel processor platform.	CODES	2001	DBLP DOI BibTeX RDF	scheduling, embedded system, concurrency, MPEG-4, cost-efficiency
1	Felice Balarin	STARS of MPEG decoder: a case study in worst-case analysis of discrete-event systems.	CODES	2001	DBLP DOI BibTeX RDF	static analysis, worst-case analysis, system verification
1	Dimitris Lioupis, Apostolos Papagiannis, Dionysia Psihogiou	A systematic approach to software peripherals for embedded systems.	CODES	2001	DBLP DOI BibTeX RDF	software peripherals, reconfigurable architectures, embedded processors
1	Cagdas Akturan, Margarida F. Jacome	RS-FDRA: a register sensitive software pipelining algorithm for embedded VLIW processors.	CODES	2001	DBLP DOI BibTeX RDF	embedded systems, software pipelining, retiming, optimizing compilers, VLIW processors
1	Yunjian Jiang, Robert K. Brayton	Logic optimization and code generation for embedded control applications.	CODES	2001	DBLP DOI BibTeX RDF	code generation, MDD, Esterel, logic optimization, multiple-valued
1	William Fornaciari, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria	A design framework to efficiently explore energy-delay tradeoffs.	CODES	2001	DBLP DOI BibTeX RDF
1	Jan Madsen, Jörg Henkel, Xiaobo Sharon Hu (eds.)	Proceedings of the Ninth International Symposium on Hardware/Software Codesign, CODES 2001, Copenhagen, Denmark, 2001	CODES	2001	DBLP DOI BibTeX RDF
1	Shlomo Weiss, Shay Beren	HW/SW partitioning of an embedded instruction memory decompressor.	CODES	2001	DBLP DOI BibTeX RDF	compressed instruction memory, embedded systems
1	Grant Martin, Luciano Lavagno, Jean Louis-Guerin	Embedded UML: a merger of real-time UML and co-design.	CODES	2001	DBLP DOI BibTeX RDF	HW-SW co-design, function-architecture co-design, real-time systems, UML, embedded systems, platforms
1	Mahmut T. Kandemir, Ismail Kadayif	Compiler-directed selection of dynamic memory layouts.	CODES	2001	DBLP DOI BibTeX RDF	array reuse, memory layout optimization, software compilation, data dependence, data locality
1	Neal K. Bambha, Shuvra S. Bhattacharyya, Jürgen Teich, Eckart Zitzler	Hybrid global/local search strategies for dynamic voltage scaling in embedded multiprocessors.	CODES	2001	DBLP DOI BibTeX RDF	simulated heating, dynamic voltage scaling
1	Peter Petrov, Alex Orailoglu	Towards effective embedded processors in codesigns: customizable partitioned caches.	CODES	2001	DBLP DOI BibTeX RDF	reprogrammable customizations, embedded processors, data cache
1	Neal K. Tibrewala, JoAnn M. Paul, Donald E. Thomas	Modeling and evaluation of hardware/software designs.	CODES	2001	DBLP DOI BibTeX RDF	computer system modeling and simulation, hardware/software codesign, digital system design
1	Axel Jantsch, Ingo Sander, Wenbiao Wu	The usage of stochastic processes in embedded system specifications.	CODES	2001	DBLP DOI BibTeX RDF
1	Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde, Marc Engels, Ivo Bolsens	Hardware/software partitioning of embedded system in OCAPI-xl.	CODES	2001	DBLP DOI BibTeX RDF
1	Seppo Virtanen, Johan Lilius	The TACO protocol processor simulation environment.	CODES	2001	DBLP DOI BibTeX RDF	simulation, protocol, microprocessor, codesign
1	Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi	Parameterised system design based on genetic algorithms.	CODES	2001	DBLP DOI BibTeX RDF	exploration of system configurations, parameterised systems, genetic algorithms
1	Pao-Ann Hsiung	Formal synthesis and code generation of embedded real-time software.	CODES	2001	DBLP DOI BibTeX RDF	embedded real-time software, scheduling, Petri Nets, code generation
1	Wayne H. Wolf	CODES and co-design: a look back and a look forward.	CODES	2001	DBLP DOI BibTeX RDF
1	Vishnu Swaminathan, Krishnendu Chakrabarty, S. Sitharama Iyengar	Dynamic I/O power management for hard real-time systems.	CODES	2001	DBLP DOI BibTeX RDF
1	Johan Cockx	Whole program compilation for embedded software: the ADSL experiment.	CODES	2001	DBLP DOI BibTeX RDF	interprocedural optimization, whole program compilation, C++, embedded software
1	Andrea Acquaviva, Luca Benini, Bruno Riccò	Processor frequency setting for energy minimization of streaming multimedia application.	CODES	2001	DBLP DOI BibTeX RDF
1	Manoj Kumar Jain, Lars Wehmeyer, Stefan Steinke, Peter Marwedel, M. Balakrishnan	Evaluating register file size in ASIP design.	CODES	2001	DBLP DOI BibTeX RDF	instruction power model, synthesis, application specific instruction set processor, instruction set, register file, register spill
1	Paul Lieverse, Pieter van der Wolf, Ed F. Deprettere	A trace transformation technique for communication refinement.	CODES	2001	DBLP DOI BibTeX RDF
1	Jinfeng Liu 0006, Pai H. Chou, Nader Bagherzadeh, Fadi J. Kurdahi	A constraint-based application model and scheduling techniques for power-aware systems.	CODES	2001	DBLP DOI BibTeX RDF	embedded systems software, power-aware real-time scheduling, system-level design, constraint modeling
1	Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto	Source-level execution time estimation of C programs.	CODES	2001	DBLP DOI BibTeX RDF
1	Karam S. Chatha, Ranga Vemuri	MAGELLAN: multiway hardware-software partitioning and scheduling for latency minimization of hierarchical control-dataflow task graphs.	CODES	2001	DBLP DOI BibTeX RDF
1	Alessandro Fin, Franco Fummi, Maurizio Martignano, Mirko Signoretto	SystemC: a homogenous environment to test embedded systems.	CODES	2001	DBLP DOI BibTeX RDF	C++ models, embedded systems verification, functional testing
1	Wen-Tsong Shiue	Retargetable compilation for low power.	CODES	2001	DBLP DOI BibTeX RDF	architecture-aware compiler design, high performance and low power design, register allocation, instruction scheduling
1	Pun H. Shiu, Yudong Tan, Vincent John Mooney III	A novel parallel deadlock detection algorithm and architecture.	CODES	2001	DBLP DOI BibTeX RDF	parallel algorithm, hardware/software codesign, real-time operating system, deadlock detection
1	R. Anand, Margarida F. Jacome, Gustavo de Veciana	Heuristic tradeoffs between latency and energy consumption in register assignment.	CODES	2000	DBLP DOI BibTeX RDF
1	Randall S. Janka, Linda M. Wills	A novel codesign methodology for real-time embedded COTS multiprocessor-based signal processing systems.	CODES	2000	DBLP DOI BibTeX RDF	MPI/RT, VSIPL, specification and design methodology, middleware, MPI, embedded, COTS, multiprocessing, MAGIC
1	João M. Fernandes, Ricardo Jorge Machado 0001, Henrique M. Dinis Santos	Modeling industrial embedded systems with UML.	CODES	2000	DBLP DOI BibTeX RDF
1	Bart Kienhuis, Edwin Rijpkema, Ed F. Deprettere	Compaan: deriving process networks from Matlab for embedded signal processing architectures.	CODES	2000	DBLP DOI BibTeX RDF	mapping, Matlab, process networks, embedded architectures
1	Paul Pop, Petru Eles, Zebo Peng	Performance estimation for embedded systems with data and control dependencies.	CODES	2000	DBLP DOI BibTeX RDF
1	Julio Leao da Silva Jr., Marco Sgroi, Fernando De Bernardinis, Suet-Fei Li, Alberto L. Sangiovanni-Vincentelli, Jan M. Rabaey	Wireless protocols design: challenges and opportunities.	CODES	2000	DBLP DOI BibTeX RDF	communication refinement, function/architecture co-design, wireless protocol design, case study
1	Joseph Buck, Radha Vaidyanathan	Heterogeneous modeling and simulation of embedded systems in El Greco.	CODES	2000	DBLP DOI BibTeX RDF
1	Tony Givargis, Frank Vahid	Parameterized system design.	CODES	2000	DBLP DOI BibTeX RDF	low power, cache, estimation, system-on-a-chip, intellectual property, on-chip bus, system parameters
1	Jwahar R. Bammi, Wido Kruijtzer, Luciano Lavagno, Edwin A. Harcourt, Mihai T. Lazarescu	Software performance estimation strategies in a system-level design tool.	CODES	2000	DBLP DOI BibTeX RDF
1	Xiaobo Sharon Hu, Gang Quan	Fast performance prediction for periodic task systems.	CODES	2000	DBLP DOI BibTeX RDF
1	Sungjoo Yoo, Kyoungseok Rha, Youngchul Cho, Jinyong Jung, Kiyoung Choi	Performance estimation of multiple-cache IP-based systems: case study of an interdependency problem and application of an extended shared memory model.	CODES	2000	DBLP DOI BibTeX RDF
1	Stan Y. Liao	Towards a new standard for system-level design.	CODES	2000	DBLP DOI BibTeX RDF
1	Mariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria	Instruction-level power estimation for embedded VLIW cores.	CODES	2000	DBLP DOI BibTeX RDF
1	Olivier Hébert, Ivan C. Kraljic, Yvon Savaria	A method to derive application-specific embedded processing cores.	CODES	2000	DBLP DOI BibTeX RDF	custom core, soft core, system-on-a-chip, embedded core, configurable processor
1	Deborah Wilson, Daniel Dayton, R. Todd Hansell	ASDEN: a comprehensive design framework vision for automotive electronic control systems.	CODES	2000	DBLP DOI BibTeX RDF
1	JoAnn M. Paul, Simon N. Peffers, Donald E. Thomas	Frequency interleaving as a codesign scheduling paradigm.	CODES	2000	DBLP DOI BibTeX RDF	clock domains, frequency interleaved scheduling, hardware/software codesign, computer system modeling
1	Yung-Hsiang Lu, Luca Benini, Giovanni De Micheli	Low-power task scheduling for multiple devices.	CODES	2000	DBLP DOI BibTeX RDF
1	Frank Vahid, Jan Madsen (eds.)	Proceedings of the Eighth International Workshop on Hardware/Software Codesign, CODES 2000, San Diego, California, USA, 2000	CODES	2000	DBLP DOI BibTeX RDF

Publications at "CODES"( http://dblp.L3S.de/Venues/CODES )