| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Timo D. Hämäläinen, Erno Salminen |
Gamification of System-on-Chip design.  |
ISSoC  |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Feriel Ben Abdallah, Chiraz Trabelsi, Rabie Ben Atitallah, Mourad Abed |
Early power-aware Design Space Exploration for embedded systems: MPEG-2 case study. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniel Gregorek, Alberto García Ortiz |
A transaction-level framework for design-space exploration of hardware-enhanced operating systems. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Pei Liu 0003, Ahmed Hemani, Kolin Paul |
A many-core hardware acceleration platform for short read mapping problem using distributed memory interface with 3D-stacked architecture. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex Schönberger, Klaus Hofmann |
Fast Memory Region: 3D DRAM memory concept evaluated for JPEG2000 algorithm. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniel Günther 0003, Andreas Bytyn, Rainer Leupers, Gerd Ascheid |
Energy-efficiency of floating-point and fixed-point SIMD cores for MIMO processing systems. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Mikko Honkonen, Lauri Matilainen, Erno Salminen, Timo D. Hämäläinen |
WOKE: A novel workflow model editor. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Philipp Wehner, Diana Göhringer |
Parallel and distributed simulation of networked multi-core systems. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Christoforos Kachris, Georgios Ch. Sirakoulis, Dimitrios Soudris |
A Reconfigurable MapReduce accelerator for multi-core all-programmable SoCs. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Wayne Kelly, Martin Flasskamp, Gregor Sievers, Johannes Ax, Jianing Chen, Christian Klarhorst, Christoph Ragg, Thorsten Jungeblut, Andrew Sorensen |
A communication model and partitioning algorithm for streaming applications for an embedded MPSoC. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Jirí Bucek, Pavel Kubalík, Róbert Lórencz, Tomás Zahradnický |
System on chip design of a linear system solver. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Janne Virtanen, Lauri Matilainen, Erno Salminen, Timo D. Hämäläinen |
Implementation of Multicore communications API. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Cuppini, Eleonora Franchi Scarselli, Claudio Mucci, Roberto Canegallo |
Soft-core eFPGA for Smart Power applications. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Waqar Hussain 0001, Henry Hoffmann, Tapani Ahonen, Jari Nurmi |
Constraint-driven frequency scaling in a Coarse Grain Reconfigurable Array. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Oliver Arnold, Gerhard P. Fettweis |
Adaptive runtime management of heterogenous MPSoCs: Analysis, acceleration and silicon prototype. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael Meixner, Tobias G. Noll |
Limits of gate-level power estimation considering real delay effects and glitches. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | George Kornaros, Konstantinos Harteros, Ioannis Christoforakis, Maria Astrinaki |
I/O virtualization utilizing an efficient hardware system-level Memory Management Unit. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuuki Shibata, Takanori Tsumura, Tomoaki Tsumura, Yasuhiko Nakashima |
An implementation of Auto-Memoization mechanism on ARM-based superscalar processor. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Anam Zaman, Osman Hasan |
Formal verification of circuit-switched Network on chip (NoC) architectures using SPIN. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Jari Nurmi, Peeter Ellervee, Dragomir Milojevic, Ondrej Daniel, Tommi Paakki (eds.) |
2014 International Symposium on System-on-Chip, SoC 2014, Tampere, Finland, October 28-29, 2014 |
ISSoC |
2014 |
DBLP BibTeX RDF |
|
| 1 | Kimiyoshi Usami, Makoto Miyauchi, Masaru Kudo, Kazumitsu Takagi, Hideharu Amano, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura |
Unbalanced buffer tree synthesis to suppress ground bounce for fine-grain power gating. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Elena Dubrova, Mats Näslund, Gunnar Carlsson, Ben J. M. Smeets |
Keyed logic BIST for Trojan detection in SoC. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Oliver Arnold, Felix Neumaerker, Gerhard P. Fettweis |
L2_ISA++: Instruction set architecture extensions for 4G and LTE-advanced MPSoCs. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Jan Moritz Joseph, Thilo Pionteck |
A cycle-accurate Network-on-Chip simulator with support for abstract task graph modeling. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Broich, Tobias G. Noll |
Optimal data path widths for energy- and area-efficient Max-Log-MAP based LTE Turbo decoders. |
ISSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Syed M. A. H. Jafri, Stanislaw J. Piestrak, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen |
Implementation and evaluation of configuration scrubbing on CGRAs: A case study. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Antti Kamppi, Lauri Matilainen, Joni-Matti Määttä, Erno Salminen, Timo D. Hämäläinen |
Extending IP-XACT to embedded system HW/SW integration. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Marcelo Ruaro, Everton Alceu Carara, Fernando Gehm Moraes |
Adaptive QoS techniques for NoC-based MPSoCs. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Marco Balboni, Francisco Triviño, José Flich, Davide Bertozzi |
Optimizing the overhead for network-on-chip routing reconfiguration in parallel multi-core platforms. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Jamie Garside, Neil C. Audsley |
Prefetching across a shared memory tree within a Network-on-Chip architecture. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Essi Suikkanen, Janne Janhunen, Shahriar Shahabuddin, Markku J. Juntti |
Study of adaptive detection for MIMO-OFDM systems. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexander W. Rath, Volkan Esen, Wolfgang Ecker |
Comparison of analog transactions using statistics. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Guilherme Montez Guindani, Fernando Gehm Moraes |
Achieving QoS in NoC-based MPSoCs through Dynamic Frequency Scaling. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Zahra Shirmohammadi, Seyed Ghassem Miremadi |
Crosstalk avoidance coding for reliable data transmission of network on chips. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Arttu Leppakoski, Erno Salminen, Timo D. Hämäläinen |
Framework for industrial embedded system product development and management. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Che-Chuan Kuo, Kun-Chih Chen, En-Jui Chang, An-Yeu Wu |
Proactive Thermal-Budget-Based Beltway Routing algorithm for thermal-aware 3D NoC systems. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexandre M. Amory, Matheus T. Moreira, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Cristiano Lazzari, Marcelo Soares Lubaszewski |
Evaluating the scalability of test buses. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Joni-Matti Määttä, Mikko Honkonen, Tommi Korhonen, Erno Salminen, Timo D. Hämäläinen |
Dependency analysis and visualization tool for Kactus2 IP-XACT design framework. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Jiajie Zhang, Zheng Yu 0001, Zhiyi Yu, Kexin Zhang, Zhonghai Lu, Axel Jantsch |
Efficient distributed memory management in a multi-core H.264 decoder on FPGA. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Jari Nurmi, Peeter Ellervee, Leandro Soares Indrusiak, Olli Vainio, Sarang Thombre, Jussi Raasakka (eds.) |
2013 International Symposium on System on Chip, ISSoC 2013, Tampere, Finland, October 23-24, 2013 |
ISSoC |
2013 |
DBLP BibTeX RDF |
|
| 1 | Spiridon F. Beldianu, Sotirios G. Ziavras |
Efficient on-chip vector processing for multicore processors. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Figuli, Carsten Tradowsky, Nadine Gaertner, Jürgen Becker 0001 |
ViSA: A highly efficient slot architecture enabling multi-objective ASIP cores. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Purnachand Nalluri, Luis Nero Alves, Antonio Navarro 0002 |
A novel SAD architecture for variable block size motion estimation in HEVC video coding. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Goran Panic, Oliver Schrape, Thomas Basmer, Frank Vater, Klaus Tittelbach-Helmrich |
TNODE: A low power sensor node processor for secure wireless networks. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Federico Terraneo, Davide Zoni, William Fornaciari |
A cycle accurate simulation framework for asynchronous NoC design. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Upasna Vishnoi, Tobias G. Noll |
A family of modular area- and energy-efficient QRD-accelerator architectures. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Artur Mariano, Paulo Garcia, Tiago Gomes |
SW and HW speculative Nelder-Mead execution for high performance unconstrained optimization. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Florian Stock, Andreas Koch 0001, Dietmar Hildenbrand |
FPGA-accelerated color edge detection using a Geometric-Algebra-to-Verilog compiler. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Zheng Zhou 0002, Karol Desnos, Maxime Pelcat, Jean-François Nezan, William Plishker, Shuvra S. Bhattacharyya |
Scheduling of parallelized synchronous dataflow actors. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Benedikt Noethen, Oliver Arnold, Gerhard P. Fettweis |
On the impact of dynamic data management for distributed local memories in heterogeneous MPSoCs. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Maximilian Odendahl, Jerónimo Castrillón, Vitaliy Volevach, Rainer Leupers, Gerd Ascheid |
Split-cost communication model for improved MPSoC application mapping. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Lorenzo Zuolo, Gabriele Miorandi, Cristian Zambelli, Piero Olivo, Davide Bertozzi |
System interconnect extensions for fully transparent demand paging in low-cost MMU-less embedded systems. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Mariem Turki, Habib Mehrez, Zied Marrakchi, Mohamed Abid |
Partitioning constraints and signal routing approach for multi-FPGA prototyping platform. |
ISSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Rachid Al-Khayat, Amer Baghdadi, Michel Jézéquel |
Architecture efficiency of application-specific processors: A 170Mbit/s 0.644mm2 multi-standard turbo decoder. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Abdul Naeem, Axel Jantsch, Zhonghai Lu |
Scalability analysis of release and sequential consistency models in NoC based multicore systems. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Roberto Airoldi, Piia Saastamoinen, Jari Nurmi |
Improving logic-to-memory ratio in an embedded Multi-Processor system via code compression. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Anthony Van Herrewege, Ingrid Verbauwhede |
Tiny application-specific programmable processor for BCH decoding. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Roman Plyaskin, Thomas Wild, Andreas Herkersdorf |
System-level software performance simulation considering out-of-order processor execution. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Waqar Hussain 0001, Tapani Ahonen, Jari Nurmi |
Effects of scaling a coarse-grain reconfigurable array on power and energy consumption. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Christoph Roth, Simon Reder, Gokhan Erdogan, Oliver Sander, Gabriel Marchesan Almeida, Harald Bucher, Jürgen Becker 0001 |
Asynchronous parallel MPSoC simulation on the Single-Chip Cloud Computer. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Davide Zoni, Simone Corbetta, William Fornaciari |
Thermal/performance trade-off in network-on-chip architectures. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Shiao-Li Tsao, Chih-Chen Kao, Ilter Suat, Yuchen Kuo, Yi-Hsin Chang, Cheng-Kun Yu |
PowerMemo: A power profiling tool for mobile devices in an emulated wireless environment. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Broich, Tobias G. Noll |
Efficient VLSI architectures of QPP interleavers for LTE turbo decoders. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Liang Guang, Ethiopia Nigussie, Juha Plosila, Jouni Isoaho, Hannu Tenhunen |
Coarse and fine-grained monitoring and reconfiguration for energy-efficient NoCs. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Saleh Abdel-Hafeez, Mohammad Shatnawi, Ann Gordon-Ross |
A double data rate 8T-cell SRAM architecture for systems-on-chip. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Anja Niedermeier, Jan Kuper, Gerard J. M. Smit |
Dataflow-based reconfigurable architecture for streaming applications. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Finn Haedicke, Hoang Minh Le 0001, Daniel Große, Rolf Drechsler |
CRAVE: An advanced constrained random verification environment for SystemC. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammad Reza Kakoee, Vladimir Petrovic, Luca Benini |
A multi-banked shared-l1 cache architecture for tightly coupled processor clusters. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Ling Wang 0004, Zhen Wang, Yingtao Jiang |
A hybrid chip interconnection architecture with a global wireless network overlaid on top of a wired network-on-chip. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Jussara Marandola, Stéphane Louise, Loïc Cudennec, Jean-Thomas Acquaviva, David A. Bader |
Enhancing Cache Coherent Architectures with access patterns for embedded manycore systems. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Kun Lu 0005, Daniel Müller-Gritschneder, Ulf Schlichtmann |
Hierarchical control flow matching for source-level simulation of embedded software. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Diandian Zhang, Li Lu 0005, Jerónimo Castrillón, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Bart Vanthournout |
Application-aware spinlock control using a hardware scheduler in MPSoC platforms. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Di Wu, Junwhan Ahn, Imyong Lee, Kiyoung Choi |
Resource-shared custom instruction generation under performance/area constraints. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Leandro Möller, Leandro Soares Indrusiak, Luciano Ost, Fernando Gehm Moraes, Manfred Glesner |
Comparative analysis of dynamic task mapping heuristics in heterogeneous NoC-based MPSoCs. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Hervé Tatenguem, Alessandro Strano, Vineeth Govind, Jaan Raik, Davide Bertozzi |
Ultra-low latency NoC testing via pseudo-random test pattern compaction. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Antonio Miele, Christian Pilato, Donatella Sciuto |
An automated framework for the simulation of mapping solutions on heterogeneous MPSoCs. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeroen Declerck, Prabhat Avasare, Miguel Glassee, Amir Amin, Erik Umans, Andy Dewilde, Praveen Raghavan, Martin Palkovic |
A flexible platform architecture for Gbps wireless communication. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Ilya Chukhman, William Plishker, Shuvra S. Bhattacharyya |
Instrumentation-driven model detection for dataflow graphs. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | |
2012 International Symposium on System on Chip, ISSoC 2012, Tampere, Finland, October 10-12, 2012 |
ISSoC |
2012 |
DBLP BibTeX RDF |
|
| 1 | Zeqin Wu, Philippe Maurine, Nadine Azémard, Gilles R. Ducharme |
Statistical timing characterization. |
ISSoC |
2012 |
DBLP DOI BibTeX RDF |
|
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