Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Philip M. Lewis II, Richard Edwin Stearns, Juris Hartmanis |
Memory bounds for recognition of context-free and context-sensitive languages ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 191-202, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | B. R. S. Buckingham, William C. Carter, W. R. Crawford, G. A. Nowell |
The controls automation system ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 279-288, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Zvi Kohavi, Edward J. Smith |
Decomposition of sequential machines ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 52-61, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Janusz A. Brzozowski |
On single-loop realizations of automata ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 84-93, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Yehoshafat Give'on |
Transparent categories and categories of transition systems ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 235-241, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Richard Edwin Stearns, Juris Hartmanis, Philip M. Lewis II |
Hierarchies of memory limited computations ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 179-190, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | F. J. Hackl, R. W. Shirk |
An integrated approach to automated computer maintenance ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 289-302, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | F. C. Hennie |
Crossing sequences and off-line Turing machine computations ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 168-172, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | James F. Gimpel |
The synthesis of TANT networks ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 105-125, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Seymour Ginsburg, Sheila A. Greibach |
Deterministic context free languages ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 203-220, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | |
6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965 ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![IEEE Computer Society The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP BibTeX RDF |
|
1 | I. Terris, Michel A. Melkanoff |
Investigation and simulation of a self-repairing digital computer ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 264-278, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | S. S. Ruby, Patrick C. Fischer |
Translational methods and computational complexity ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 173-178, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | C. V. Ramamoorthy |
Procedures for minimization of "exclusive-OR" and "logical-equivalence" switching circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 143-149, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Marion Dunning, Bernard Kolman |
Reliability and fault-masking in n-variable NOR trees ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 126-142, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Edward W. Veitch |
A proof concerning infinite nets of logic elements without feedback ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 162-167, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | R. Gonzalez, Eugene L. Lawler |
Two-level threshold minimization ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 41-44, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Arnold L. Rosenberg |
On multi-head finite automata ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 221-228, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Arthur D. Friedman |
Feedback in asynchronous sequential circuits ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 94-104, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Parker W. Snapp |
Holiac-A family of student-constructed logic teaching aids ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 310-326, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | C. L. Coates, Vatana Supornpaibul |
On maximum stability realizations of linearly separable Boolean functions ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 12-24, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Herschel H. Loomis Jr., Michael R. McCoy |
A theory of high-speed clocked logic ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 150-161, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Wayne A. Davis |
On shift register realizations for sequential machines ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 71-83, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | H. Paul Zeiger |
Cascade synthesis of finite-state machines ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 45-51, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | A. J. Nichols III |
Modular synthesis of sequential machines ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 62-70, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Zamir Bavel, David E. Muller |
Reversibility in monadic algebras and automata ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 242-247, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | John N. Warfield |
Synthesis of switching circuits to yield prescribed probability relations ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 303-309, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Jack W. Carlyle |
State-calculable stochastic sequential machines, equivalences, and events ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 258-263, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Jürg Nievergelt |
Partially ordered classes of finite automata ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 229-234, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Eric G. Wagner |
On connecting modules together uniformly to form a modular computer ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 248-257, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Sze-Tsen Hu |
Minimal linear decompositions of switching functions ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 36-40, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Edward P. Stabler |
Threshold gate network synthesis ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 5-11, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Charles H. Gustafson, Donald R. Haring, Alfred K. Susskind, Thomas G. Wills-Sanford |
Synthesis of counters with threshold elements ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965, pp. 25-35, 1965, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Seymour Ginsburg, Edwin H. Spanier |
Mappings of languages by two-tape devices ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 57-67, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Thomas V. Griffiths |
Turing machine recognizers for general rewriting systems ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 47-56, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | J. F. Poage, Edward J. McCluskey |
Derivation of optimum test sequences for sequential machines ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 121-132, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | C. L. Liu 0001 |
Sequential-machine realization using feedback shift registers ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 209-227, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Juris Hartmanis, Richard Edwin Stearns |
Computational complexity of recursive sequences ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 82-90, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Richard Edwin Stearns, Juris Hartmanis |
On the application of pair algebra to automata theory ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 192-196, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | G. L. Hicks, Arthur J. Bernstein |
On the minimum stage realization of switching functions using logic gates with limited fan-in ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 149-155, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Wayne A. Davis, Janusz A. Brzozowski |
On the linearity of sequential machines ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 197-208, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Patrick C. Fischer |
On formalisms for Turing machines ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 68-75, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Jack Goldberg, Robert A. Short |
Antiparallel control logic ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 30-43, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | R. Stockton Gaines |
Implication techniques for Boolean functions ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 174-182, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | James F. Gimpel |
A reduction technique for prime implicant tables ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 183-191, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Zamir Bavel |
On the total length of an experiment, I ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 234-248, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Michael A. Harrison |
A census of finite automata (extended summary) ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 44-46, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Robert E. Swartwout |
New techniques for designing speed independent control logic ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 12-29, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Arthur J. Bernstein |
Reducing variable dependency in combinational circuits ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 156-164, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Sheldon B. Akers Jr. |
A diagrammatic approach to multi-level logic synthesis ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 165-173, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Donald L. Epley, P. T. Wang |
On state assignments and sequential machine decompositions from S. P. partitions ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 228-233, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Edward B. Eichelberger |
Hazard detection in combinational and sequential switching circuits ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 111-120, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Bernard Elspas |
Topological constraints on interconnection-limited logic ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 133-137, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Rocco H. Urbano |
Some new results on the analysis and reliability of large polyfunctional nets ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 138-148, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Milton W. Green |
A lower bound on Rado's sigma function for binary Turing machines ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 91-94, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | |
5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964 ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![IEEE Computer Society The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP BibTeX RDF |
|
1 | F. C. Hennie |
Fault detecting experiments for sequential circuits ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 95-110, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | David G. Hammel |
Ideas on asynchronous feedback networks ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 4-11, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Arnold L. Rosenberg |
On n-tape finite state acceptors ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964, pp. 76-81, 1964, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1964 |
DBLP DOI BibTeX RDF |
|
1 | W. D. Frazer |
Bilateral threshold nets (extended summary) ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 4th Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 28-30, 1963, pp. 33-39, 1963, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Theodore M. Booth |
Demonstrating hazards in sequential relay circuits ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 4th Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 28-30, 1963, pp. 131-136, 1963, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Raymond E. Miller |
A survey of asynchronous logic: Comparing various definitions and models for asynchronous switching circuits ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 4th Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 28-30, 1963, pp. 149-152, 1963, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Richard F. Arnold, Eugene L. Lawler |
On the analysis of functional symmetry ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 4th Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 28-30, 1963, pp. 53-62, 1963, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Roger E. Levien |
Determining the best ordering of variables in cascade switching circuits ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 4th Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 28-30, 1963, pp. 83-104, 1963, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1963 |
DBLP DOI BibTeX RDF |
|
1 | C. L. Coates, Philip M. Lewis II |
Threshold gate realizations of logical functions with don't cares ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 4th Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 28-30, 1963, pp. 41-52, 1963, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Edward J. McCluskey |
Logical design theory of NOR gate networks with no complemented inputs ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 4th Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 28-30, 1963, pp. 137-148, 1963, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Calvin C. Elgot, Jorge E. Mezei |
Two-sided finite-state transductions (abbreviated version) ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 4th Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 28-30, 1963, pp. 17-22, 1963, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Eugene L. Lawler |
The minimal synthesis of tree structures ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 4th Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 28-30, 1963, pp. 63-82, 1963, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Robert McNaughton |
Finite automata and badly timed elements ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 4th Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 28-30, 1963, pp. 117-130, 1963, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Patrick C. Fischer |
On computability by certain classes of restricted Turing machines ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 4th Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 28-30, 1963, pp. 23-32, 1963, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1963 |
DBLP DOI BibTeX RDF |
|
1 | |
4th Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 28-30, 1963 ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![IEEE Computer Society The full citation details ...](Pics/full.jpeg) |
1963 |
DBLP BibTeX RDF |
|
1 | David E. Muller |
Infinite sequences and finite machines ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 4th Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 28-30, 1963, pp. 3-16, 1963, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Edward B. Eichelberger |
Sequential circuit synthesis using input delays ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 4th Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 28-30, 1963, pp. 105-116, 1963, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Calvin C. Elgot, Joseph D. Rutledge |
Machine properties preserved under state minimization ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962, pp. 61-70, 1962, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Shmuel Winograd |
Bounded-transient automata ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962, pp. 137-141, 1962, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Edward J. McCluskey |
Reduction of feedback loops in sequential circuits and carry leads in iterative networks ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962, pp. 91-102, 1962, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Lorenzo Calabi, J. A. Riley |
The algebra of Boolean formulas: Some criteria for minimality ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962, pp. 33-47, 1962, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Franz E. Hohn |
States of sequential machines whose logical elements involve delay ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962, pp. 81-89, 1962, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Angelo Raffaele Meo |
On the minimal third order expression of a Boolean function ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962, pp. 5-24, 1962, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1962 |
DBLP DOI BibTeX RDF |
|
1 | J. C. Beatty, Raymond E. Miller |
Some theorems for incompletely specified sequential machines with applications to state minimization ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962, pp. 123-136, 1962, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Sheldon B. Akers Jr. |
Synthesis of combinational logic using three-input majority gates ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962, pp. 149-157, 1962, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1962 |
DBLP DOI BibTeX RDF |
|
1 | |
3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962 ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![IEEE Computer Society The full citation details ...](Pics/full.jpeg) |
1962 |
DBLP BibTeX RDF |
|
1 | Barrett Hazeltine |
A procedure for obtaining an economical asynchronous sequential circuit directly from a set of regular expressions ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962, pp. 71-79, 1962, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1962 |
DBLP DOI BibTeX RDF |
|
1 | E. W. Samson, Lorenzo Calabi |
Research and algorithms in the theory of Boolean formulas ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962, pp. 25-32, 1962, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Chuen K. Tung |
On some transformation theorems in many-valued logical systems ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962, pp. 185-199, 1962, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Eugene L. Lawler |
Minimal Boolean expressions with more than two levels of sums and products ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962, pp. 49-59, 1962, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Saburo Muroga |
Generation of self-dual threshold functions and lower bounds of the number of threshold functions and a maximum weight ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962, pp. 169-184, 1962, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Philip M. Lewis II, C. L. Coates |
A realization procedure for threshold gate networks ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962, pp. 159-168, 1962, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Shimon Even |
Generalized automata and their information losslessness ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962, pp. 143-147, 1962, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Roger E. Levien |
The synthesis of cascade switching circuits ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962, pp. 103-121, 1962, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Robert E. Swartwout |
One method for designing speed independent logic for a control ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 2nd Annual Symposium on Switching Circuit Theory and Logical Design, Detroit, Michigan, USA, October 17-20, 1961, pp. 94-105, 1961, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1961 |
DBLP DOI BibTeX RDF |
|
1 | Richard M. Karp, F. E. McFarlin, J. Paul Roth, J. R. Wilts |
A computer program for the synthesis of combinational switching circuits ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 2nd Annual Symposium on Switching Circuit Theory and Logical Design, Detroit, Michigan, USA, October 17-20, 1961, pp. 182-194, 1961, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1961 |
DBLP DOI BibTeX RDF |
|
1 | Donald Kennedy |
The integrative properties of neurons ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 2nd Annual Symposium on Switching Circuit Theory and Logical Design, Detroit, Michigan, USA, October 17-20, 1961, pp. 67-69, 1961, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1961 |
DBLP DOI BibTeX RDF |
|
1 | D. R. Boyle, Robert S. Ledley |
Multivalued logic devices for simulating threshold neurons ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 2nd Annual Symposium on Switching Circuit Theory and Logical Design, Detroit, Michigan, USA, October 17-20, 1961, pp. 77-82, 1961, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1961 |
DBLP DOI BibTeX RDF |
|
1 | Calvin C. Elgot, Joseph D. Rutledge |
Operations of finite automata ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 2nd Annual Symposium on Switching Circuit Theory and Logical Design, Detroit, Michigan, USA, October 17-20, 1961, pp. 129-132, 1961, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1961 |
DBLP DOI BibTeX RDF |
|
1 | S. Okada, K. P. Rajappan, K. P. Young |
Boolean two-terminal analysis and synthesis ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 2nd Annual Symposium on Switching Circuit Theory and Logical Design, Detroit, Michigan, USA, October 17-20, 1961, pp. 178-181, 1961, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1961 |
DBLP DOI BibTeX RDF |
|
1 | Raymond E. Miller |
An introduction to speed independent circuit theory ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 2nd Annual Symposium on Switching Circuit Theory and Logical Design, Detroit, Michigan, USA, October 17-20, 1961, pp. 87-93, 1961, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1961 |
DBLP DOI BibTeX RDF |
|
1 | William H. Kautz |
Automatic fault detection in combinational switching networks ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 2nd Annual Symposium on Switching Circuit Theory and Logical Design, Detroit, Michigan, USA, October 17-20, 1961, pp. 195-214, 1961, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1961 |
DBLP DOI BibTeX RDF |
|
1 | Dean N. Arden |
Delayed-logic and finite-state machines ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![In: 2nd Annual Symposium on Switching Circuit Theory and Logical Design, Detroit, Michigan, USA, October 17-20, 1961, pp. 133-151, 1961, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1961 |
DBLP DOI BibTeX RDF |
|
1 | |
2nd Annual Symposium on Switching Circuit Theory and Logical Design, Detroit, Michigan, USA, October 17-20, 1961 ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWCT ![IEEE Computer Society The full citation details ...](Pics/full.jpeg) |
1961 |
DBLP BibTeX RDF |
|