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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 559 occurrences of 375 keywords
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Results
Found 7557 publication records. Showing 7557 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Jai-Ming Lin, Chien-Yu Huang |
General floorplanning methodology for 3D ICs with an arbitrary bonding style. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1199-1202, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Katayoun Neshatpour, Farnaz Behnia, Houman Homayoun, Avesta Sasan |
ICNN: An iterative implementation of convolutional neural networks to enable energy and computational complexity aware dynamic approximation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 551-556, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Xiangwei Li, Abhishek Kumar Jain, Douglas L. Maskell, Suhaib A. Fahmy |
A time-multiplexed FPGA overlay with linear interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1075-1080, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Chun-Xun Lin, Martin D. F. Wong |
Accelerate analytical placement with GPU: A generic approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1345-1350, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Kira Kraft, Chirag Sudarshan, Deepak M. Mathew, Christian Weis, Norbert Wehn, Matthias Jung 0001 |
Improving the error behavior of DRAM by exploiting its Z-channel property. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1492-1495, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Satwik Patnaik, Nikhil Rangarajan, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja |
Advancing hardware security using polymorphic and stochastic spin-hall effect devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 97-102, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Eugene Goldberg, Matthias Güdemann, Daniel Kroening, Rajdeep Mukherjee |
Efficient verification of multi-property designs (The benefit of wrong assumptions). ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 43-48, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Alma Pröbstl, Sangyoung Park, Swaminathan Narayanaswamy, Sebastian Steinhorst, Samarjit Chakraborty |
SOH-aware active cell balancing strategy for high power battery packs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 431-436, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Sanu Mathew, Sudhir Satpathy, Vikram B. Suresh, Ram Krishnamurthy 0001 |
Ultra-low energy circuit building blocks for security technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 391-394, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Jakob Stangl, Thomas Lorünser, Sai Manoj Pudukotai Dinakarrao |
A fast and resource efficient FPGA implementation of secret sharing for storage applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 654-659, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Sara Royuela, Luís Miguel Pinho, Eduardo Quiñones |
Converging safety and high-performance domains: Integrating OpenMP into Ada. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1021-1026, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Xiaoming Chen 0003, Danny Z. Chen, Xiaobo Sharon Hu |
moDNN: Memory optimal DNN training on GPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 13-18, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Rui Xu, Xi Jin 0002, Linfeng Tao, Shuaizhi Guo, Zikun Xiang, Teng Tian |
An efficient resource-optimized learning prefetcher for solid state drives. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 273-276, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Jiankang Ren, Ran Bi 0001, Xiaoyan Su, Qian Liu 0001, Guowei Wu, Guozhen Tan |
Workload-aware harmonic partitioned scheduling for probabilistic real-time systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 213-218, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Jingyang Zhu, Jingbo Jiang, Xizi Chen, Chi-Ying Tsui |
SparseNN: An energy-efficient neural network accelerator exploiting input and output sparsity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 241-244, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Christos Kyrkou, George Plastiras, Theocharis Theocharides, Stylianos I. Venieris, Christos-Savvas Bouganis |
DroNet: Efficient convolutional neural network detector for real-time UAV applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 967-972, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Lihao Liang, Paul E. McKenney, Daniel Kroening, Tom Melham |
Verification of tree-based hierarchical read-copy update in the Linux kernel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 61-66, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Johannes Bund, Christoph Lenzen 0001, Moti Medina |
Optimal metastability-containing sorting networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 521-526, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Jan Madsen, Ayse K. Coskun (eds.) |
2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018 ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![IEEE, 978-3-9819263-0-9 The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
|
1 | Yuyang Wang 0003, M. Ashkan Seyedi, Rui Wu 0008, Jared Hulme, Marco Fiorentino, Raymond G. Beausoleil, Kwang-Ting Cheng |
Energy-efficient channel alignment of DWDM silicon photonic transceivers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 601-604, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Florian Bache, Christina Plump, Tim Güneysu |
Confident leakage assessment - A side-channel evaluation framework based on confidence intervals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1117-1122, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Jörg Fickenscher, Jens Schlumberger, Frank Hannig, Jürgen Teich, Mohamed Essayed Bouzouraa |
Cell-based update algorithm for occupancy grid maps and hybrid map for ADAS on embedded GPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 443-448, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Anteneh Gebregiorgis, Rajendra Bishnoi, Mehdi Baradaran Tahoori |
Spintronic normally-off heterogeneous system-on-chip design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 113-118, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Nikolaos Sketopoulos, Christos P. Sotiriou, Stavros Simoglou |
Abax: 2D/3D legaliser supporting look-ahead legalisation and blockage strategies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1469-1472, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Nour Sayed, Rajendra Bishnoi, Fabian Oboril, Mehdi Baradaran Tahoori |
A cross-layer adaptive approach for performance and power optimization in STT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 791-796, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Jeroen P. G. van Dijk, Andrei Vladimirescu, Masoud Babaie, Edoardo Charbon, Fabio Sebastiano |
A co-design methodology for scalable quantum processors and their classical electronic interface. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 573-576, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Onur Tunali, Mustafa Altun |
Logic synthesis and defect tolerance for memristive crossbar arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 425-430, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori |
Parametric failure modeling and yield analysis for STT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 265-268, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Vijeta Rathore, Vivek Chaturvedi, Amit Kumar Singh 0002, Thambipillai Srikanthan, R. Rohith, Siew-Kei Lam, Muhammad Shafique 0001 |
HiMap: A hierarchical mapping approach for enhancing lifetime reliability of dark silicon manycore systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 991-996, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Tobias Seufert, Christoph Scholl 0001 |
Combining PDR and reverse PDR for hardware model checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 49-54, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Shail Dave, Mahesh Balasubramanian 0001, Aviral Shrivastava |
URECA: Unified register file for CGRAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1081-1086, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Charalambos Konstantinou, Eduardo Chielle, Michail Maniatakos |
PHYLAX: Snapshot-based profiling of real-time embedded devices via JTAG interface. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 869-872, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Seyedhamidreza Motaman, Mohammad Nasim Imtiaz Khan, Swaroop Ghosh |
Novel application of spintronics in computing, sensing, storage and cybersecurity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 125-130, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Hwisoo So, Moslem Didehban, Yohan Ko, Aviral Shrivastava, Kyoungwoo Lee |
EXPERT: Effective and flexible error protection by redundant multithreading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 533-538, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Sudipta Mondal, Krishnendu Chakrabarty |
Pre-assembly testing of interconnects in embedded multi-die interconnect bridge (EMIB) dies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 373-378, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Bing Li 0017, Linghao Song, Fan Chen 0001, Xuehai Qian, Yiran Chen 0001, Hai Helen Li |
ReRAM-based accelerator for deep learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 815-820, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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1 | Hyukjoong Kim, Kyuhwa Han, Dongkun Shin |
StreamFTL: Stream-level address translation scheme for memory constrained flash storage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 617-620, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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1 | Aydin Aysu, Michael Orshansky, Mohit Tiwari |
Binary Ring-LWE hardware with power side-channel countermeasures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1253-1258, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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1 | Gabriele Miorandi, Francesco Stefanni, Federico Fraccaroli, Davide Quaglia |
A SystemC-based Simulator for design space exploration of smart wireless systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 666-671, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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1 | Seyedeh Golsana Ghaemi, Iman Ahmadpour, Mehdi Ardebili, Hamed Farbeh |
SMARTag: Error Correction in Cache Tag Array by Exploiting Address Locality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1658-1663, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Björn Forsberg, Luca Benini, Andrea Marongiu |
HePREM: Enabling predictable GPU execution on heterogeneous SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 539-544, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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1 | Monir Zaman, Abhrajit Sengupta, Danqing Liu, Ozgur Sinanoglu, Yiorgos Makris, Jeyavijayan (JV) Rajendran |
Towards provably-secure performance locking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1592-1597, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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1 | Amaury Graillat, Matthieu Moy, Pascal Raymond, Benoît Dupont de Dinechin |
Parallel code generation of synchronous programs for a many-core architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1139-1142, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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1 | Jie Xu 0013, Dan Feng 0001, Yu Hua 0001, Wei Tong 0001, Jingning Liu, Chunyan Li, Zheng Li 0005 |
An efficient PCM-based main memory system via exploiting fine-grained dirtiness of cachelines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1616-1621, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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1 | Jintao Yu, Hoang Anh Du Nguyen, Lei Xie 0005, Mottaqiallah Taouil, Said Hamdioui |
Memristive devices for computation-in-memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1646-1651, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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1 | Zhaoying Li, Lei Ju 0001, Hongjun Dai, Xin Li, Mengying Zhao, Zhiping Jia |
Set variation-aware shared LLC management for CPU-GPU heterogeneous architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 79-84, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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1 | Ajith Sivadasan, Riddhi Jitendrakumar Shah, Vincent Huard, Florian Cacho, Lorena Anghel |
NBTI aged cell rejuvenation with back biasing and resulting critical path reordering for digital circuits in 28nm FDSOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 997-998, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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1 | Yuanhui Ni, Weiwen Chen, Wenjuan Cui, Yuanchun Zhou, Keni Qiu |
Power optimization through peripheral circuit reusing integrated with loop tiling for RRAM crossbar-based CNN. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1183-1186, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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1 | Luca Gaetano Amarù, Mathias Soeken, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Janet Olson, Robert K. Brayton, Giovanni De Micheli |
Improvements to boolean resynthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 755-760, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Omid Akbari, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram, Muhammad Shafique 0001 |
PX-CGRA: Polymorphic approximate coarse-grained reconfigurable architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 413-418, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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1 | Sheng Lin 0001, Ning Liu 0007, Mahdi Nazemi, Hongjia Li, Caiwen Ding, Yanzhi Wang, Massoud Pedram |
FFT-based deep learning deployment in embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1045-1050, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Isaar Ahmad, Sanjog Patil, Smruti R. Sarangi |
HPXA: A highly parallel XML parser. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 249-252, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Jinhua Cui 0001, Youtao Zhang, Jianhang Huang, Weiguo Wu, Jun Yang 0002 |
ShadowGC: Cooperative garbage collection with multi-level buffer for performance improvement in NAND flash-based SSDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1247-1252, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Alvaro Velasquez, Sumit Kumar Jha 0001 |
In-memory computing using paths-based logic and heterogeneous components. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1512-1515, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Jan Burchard, Dominik Erb, Bernd Becker 0001 |
Characterization of possibly detected faults by accurately computing their detection probability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 385-390, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Seongmin Hong, Inho Lee, Yongjun Park 0001 |
NN compactor: Minimizing memory and logic resources for small neural networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 581-584, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Marcel Walter, Robert Wille, Daniel Große, Frank Sill Torres, Rolf Drechsler |
An exact method for design exploration of quantum-dot cellular automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 503-508, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Muhammad Hassan 0002, Daniel Große, Hoang M. Le, Thilo Vörtler, Karsten Einwich, Rolf Drechsler |
Testbench qualification for SystemC-AMS timed data flow models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 857-860, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Orlando Arias, Fahim Rahman, Mark M. Tehranipoor, Yier Jin |
Device attestation: Past, present, and future. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 473-478, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Alexander Lamprecht, Swaminathan Narayanaswamy, Sebastian Steinhorst |
Improving fast charging efficiency of reconfigurable battery packs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 585-588, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Kai-Chiang Wu, Tien-Hung Tseng, Shou-Chun Li |
MAUI: Making aging useful, intentionally. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 527-532, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Marco Trevisi, H. C. Bandala, Jorge Fernández-Berni, Ricardo Carmona-Galán, Ángel Rodríguez-Vázquez |
Concurrent focal-plane generation of compressed samples from time-encoded pixel values. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1316-1320, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Matthias Traub, Hans-Jörg Vögel, Eric Sax, Thilo Streichert, Jérôme Härri |
Digitalization in automotive and industrial systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1203-1204, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Jingweijia Tan, Kaige Yan |
HVSM: Hardware-variability aware streaming processors' management policy in GPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 67-72, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Kyle Kuan, Tosiron Adegbija |
LARS: Logically adaptable retention time STT-RAM cache for embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 461-466, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Muhammad Abdullah Hanif, Rehan Hafiz, Muhammad Shafique 0001 |
Error resilience analysis for systematically employing approximate computing in convolutional neural networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 913-916, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Fritz G. Previlon, Charu Kalra, David R. Kaeli, Paolo Rech |
Evaluating the impact of execution parameters on program vulnerability in GPU applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 809-814, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Paulo C. Santos 0001, Geraldo F. Oliveira, João Paulo C. de Lima, Marco A. Z. Alves, Luigi Carro, Antonio C. S. Beck |
Processing in 3D memories to speed up operations on complex data structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 897-900, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Michele Lora, Stefano Centomo, Davide Quaglia, Franco Fummi |
Automatic integration of cycle-accurate descriptions with continuous-time models for cyber-physical virtual platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 676-681, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Filippos Filippou, Georgios Keramidas, Michail Mavropoulos, Dimitris Nikolos |
A novel fault tolerant cache architecture based on orthogonal latin squares theory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1429-1434, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Jakub Breier, Dirmanto Jap, Shivam Bhasin |
SCADPA: Side-channel assisted differential-plaintext attack on bit permutation based ciphers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1129-1134, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | D. Celia, Vinita Vasudevan, Nitin Chandrachoodan |
Optimizing power-accuracy trade-off in approximate adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1488-1491, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Bharath Srinivas Prabakaran, Semeen Rehman, Muhammad Abdullah Hanif, Salim Ullah, Ghazal Mazaheri, Akash Kumar 0001, Muhammad Shafique 0001 |
DeMAS: An efficient design methodology for building approximate adders for FPGA-based systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 917-920, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Edoardo Fusella, Alessandro Cilardo |
Understanding turn models for adaptive routing: The modular approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1477-1480, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Yung-An Lai, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang |
Efficient synthesis of approximate threshold logic circuits with an error rate guarantee. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 773-778, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Mohammad Rahmani Fadiheh, Joakim Urdahl, Srinivasa Shashank Nuthakki, Subhasish Mitra, Clark W. Barrett, Dominik Stoffel, Wolfgang Kunz |
Symbolic quick error detection using symbolic initial state for pre-silicon verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 55-60, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler |
Towards fully automated TLM-to-RTL property refinement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1508-1511, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Jinghan Zhang, Hamed Tabkhi, Gunar Schirner |
DS-DSE: Domain-specific design space exploration for streaming applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 165-170, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Alessandro Danese, Valeria Bertacco, Graziano Pravadelli |
Symbolic assertion mining for security validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1550-1555, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Benjamin J. Fletcher, Shidhartha Das, Terrence S. T. Mak |
A high-speed design methodology for inductive coupling links in 3D-ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 497-502, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Armin Sadighi, Bryan Donyanavard, Thawra Kadeed, Kasra Moazzemi, Tiago Mück, Ahmed Nassar 0001, Amir M. Rahmani, Thomas Wild, Nikil D. Dutt, Rolf Ernst, Andreas Herkersdorf, Fadi J. Kurdahi |
Design methodologies for enabling self-awareness in autonomous systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1532-1537, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Dimitrios Stamoulis, Ermao Cai, Da-Cheng Juan, Diana Marculescu |
HyperPower: Power- and memory-constrained hyper-parameter optimization for neural networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 19-24, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Xun Jiao, Vahideh Akhlaghi, Yu Jiang 0001, Rajesh K. Gupta 0001 |
Energy-efficient neural networks using approximate computation reuse. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1223-1228, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Alexandre Carbon, Jean-Marc Philippe, Olivier Bichler, Renaud Schmit, Benoît Tain, David Briand, Nicolas Ventroux, Michel Paindavoine, Olivier Brousse |
PNeuro: A scalable energy-efficient programmable hardware accelerator for neural networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1039-1044, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Junchul Choi, Donghyun Kang, Soonhoi Ha |
End-to-end latency analysis of cause-effect chains in an engine management system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1195-1198, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Anuj Pathania, Jörg Henkel |
Task scheduling for many-cores with S-NUCA caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 557-562, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Saru Vig, Guiyuan Jiang, Siew-Kei Lam |
Dynamic skewed tree for fast memory integrity verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 642-647, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Evangelos Vasilakis, Vassilis Papaefstathiou, Pedro Trancoso, Ioannis Sourdis |
FusionCache: Using LLC tags for DRAM cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 593-596, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Basireddy Karunakar Reddy, Geoff V. Merrett, Bashir M. Al-Hashimi, Amit Kumar Singh 0002 |
Online concurrent workload classification for multi-core energy management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 621-624, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Houxiang Ji, Linghao Song, Li Jiang 0002, Hai Helen Li, Yiran Chen 0001 |
ReCom: An efficient resistive accelerator for compressed deep neural networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 237-240, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Bryan Donyanavard, Amir M. Rahmani, Tiago Mück, Kasra Moazemmi, Nikil D. Dutt |
Gain scheduled control for nonlinear power management in CMPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 921-924, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Romain Jacob, Licong Zhang, Marco Zimmerling, Jan Beutel, Samarjit Chakraborty, Lothar Thiele |
TTW: A Time-Triggered Wireless design for CPS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 865-868, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Neil Veira, Zissis Poulos, Andreas G. Veneris |
Suspect set prediction in RTL bug hunting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1544-1549, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Tim Schmidt, Zhongqi Cheng, Rainer Dömer |
Port call path sensitive conflict analysis for instance-aware parallel SystemC simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 349-354, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Sina Boroumand, Hadi Parandeh-Afshar, Philip Brisk |
Approximate quaternary addition with the fast carry chains of FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 577-580, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Jianmin Qian, Jian Li 0021, Ruhui Ma |
Topology-aware virtual resource management for heterogeneous multicore systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 177-182, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Daniela Ritirc, Armin Biere, Manuel Kauers |
Improving and extending the algebraic approach for verifying gate-level multipliers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1556-1561, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Hsin-I Wu, Chi-Kang Chen, Tsung-Ying Lu, Ren-Song Tsay |
A highly efficient full-system virtual prototype based on virtualization-assisted approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 285-288, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Liying Li, Peijin Cong, Kun Cao 0001, Junlong Zhou, Tongquan Wei, Mingsong Chen, Xiaobo Sharon Hu |
Feedback control of real-time EtherCAT networks for reliability enhancement in CPS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 688-693, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Marco Elver, Christopher J. Banks, Paul B. Jackson, Vijay Nagarajan |
VerC3: A library for explicit state synthesis of concurrent systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1381-1386, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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