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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 5686 publication records. Showing 5677 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
11 | Marcio Gonçalves, Ivan Peter Lamb, Raphael Martins Brum, José Rodrigo Azambuja |
Evaluating the Impact of Accuracy Relaxation in the Reliability of GPU Register Files. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019, Genoa, Italy, November 27-29, 2019, pp. 205-208, 2019, IEEE, 978-1-7281-0996-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Ya-Chu Chang, Tung-Wei Lin, Iris Hui-Ru Jiang, Gi-Joon Nam |
Graceful Register Clustering by Effective Mean Shift Algorithm for Power and Timing Balancing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2019 International Symposium on Physical Design, ISPD 2019, San Francisco, CA, USA, April 14-17, 2019, pp. 11-18, 2019, ACM, 978-1-4503-6253-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Giovanni Rinaldi, Marco Manca 0002 |
The International Register of Ideas and Innovations. A Visionary Social Network to Develop Innovation and Protect IP Using Blockchain and Proof-of-Originality Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
INSCI ![In: Internet Science - 6th International Conference, INSCI 2019, Perpignan, France, December 2-5, 2019, Proceedings, pp. 275-282, 2019, Springer, 978-3-030-34769-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Cinzia Daraio, Renato Bruni, Giuseppe Catalano, Giorgio Matteucci, Alessandro Daraio, Monica Scannapieco, Daniel Wagner-Schuster, Benedetto Lepori |
European Tertiary Education Register (ETER): Evolution of the Data Quality Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSI ![In: Proceedings of the 17th International Conference on Scientometrics and Informetrics, ISSI 2019, Rome, Italy, September 2-5, 2019., pp. 2766-2767, 2019, ISSI Society, 978-88-3381-118-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
11 | Elea Giménez-Toledo, Gunnar Sivertsen, Jorge Mañana-Rodríguez |
International Register of Academic Book Publishers (IRAP): overview, current state and future challenges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSI ![In: Proceedings of the 17th International Conference on Scientometrics and Informetrics, ISSI 2019, Rome, Italy, September 2-5, 2019., pp. 1752-1758, 2019, ISSI Society, 978-88-3381-118-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
11 | Artiom Alhazov, Rudolf Freund, Sergiu Ivanov 0001 |
Register machines over groups. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NCMA ![In: Eleventh Workshop on Non-Classical Models of Automata and Applications, NCMA 2019, Valencia, Spain, July 2-3, 2019., pp. 31-46, 2019, Österreichische Computer Gesellschaft, 978-3-903035-25-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
11 | Jason Portillo, Travis Meade, John Hacker, Shaojie Zhang, Yier Jin |
RERTL: Finite State Transducer Logic Recovery at Register Transfer Level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AsianHOST ![In: Asian Hardware Oriented Security and Trust Symposium, AsianHOST 2019, Xi'an, China, December 16-17, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-3544-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Fang Li, Chao Yan, Ziyuan Zhu, Dan Meng |
A Deep Malware Detection Method Based on General-Purpose Register Features. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCS (3) ![In: Computational Science - ICCS 2019 - 19th International Conference, Faro, Portugal, June 12-14, 2019, Proceedings, Part III, pp. 221-235, 2019, Springer, 978-3-030-22743-2. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Soma Chaudhuri, Reginald Frank, Jennifer L. Welch |
How Fast Reads Affect Multi-Valued Register Simulations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PODC ![In: Proceedings of the 2019 ACM Symposium on Principles of Distributed Computing, PODC 2019, Toronto, ON, Canada, July 29 - August 2, 2019., pp. 215-217, 2019, ACM, 978-1-4503-6217-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Antoine Mottet, Karin Quaas |
The Containment Problem for Unambiguous Register Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
STACS ![In: 36th International Symposium on Theoretical Aspects of Computer Science, STACS 2019, March 13-16, 2019, Berlin, Germany, pp. 53:1-53:15, 2019, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-100-9. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Sudhir Satpathy, Vikram B. Suresh, Raghavan Kumar, Vinodh Gopal, James Guilford, Mark A. Anders 0001, Himanshu Kaul, Amit Agarwal 0001, Steven Hsu, Ram Krishnamurthy 0001, Vivek De, Sanu Mathew |
A 1.4GHz 20.5Gbps GZIP decompression accelerator in 14nm CMOS featuring dual-path out-of-order speculative Huffman decoder and multi-write enabled register file array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, pp. 238-, 2019, IEEE, 978-4-86348-720-8. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Xinmiao Zhang, Yok Jye Tang |
Reducing Parallel Linear Feedback Shift Register Complexity Through Input Tap Modification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019, pp. 1-5, 2019, IEEE, 978-1-7281-0397-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Tao Han, Yuze Wang, Peng Liu 0016 |
Hardware Trojans Detection at Register Transfer Level Based on Machine Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019, pp. 1-5, 2019, IEEE, 978-1-7281-0397-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Yuxuan Tang, Qingjun Fan, Yulang Feng, Hao Deng 0003, Runxi Zhang, Jinghong Chen |
A Low-Power SiPM Readout Front-End with Fast Pulse Generation and Successive-Approximation Register ADC in 0.18 μm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-0397-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Vassos Hadzilacos, Xing Hu 0009, Sam Toueg |
Optimal Register Construction in M&M Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
OPODIS ![In: 23rd International Conference on Principles of Distributed Systems, OPODIS 2019, December 17-19, 2019, Neuchâtel, Switzerland., pp. 28:1-28:16, 2019, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-133-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Thomas Goldbrunner, Nguyen Anh Vu Doan, Diogo Poças, Thomas Wild, Andreas Herkersdorf |
Register Requirement Minimization of Fixed-Depth Pipelines for Streaming Data Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: 32nd IEEE International System-on-Chip Conference, SOCC 2019, Singapore, September 3-6, 2019, pp. 406-411, 2019, IEEE, 978-1-7281-3483-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Zhi-Yin Lu, Jia-Feng Liu, Yunbing Pang, Zhengjie Li, Yufan Zhang, Jin-Mei Lai, Jian Wang 0036 |
A Low-delay Configurable Register for FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, October 29 - November 1, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-0735-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Li-Yi Xiao, Yuan-Gang Wang, Zu-Qiang Zhang, Jia-Qiang Li, Jie Li |
Radiation Hardened Design of Pipeline and Register File in Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, October 29 - November 1, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-0735-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Xiangnan Song, Shiying Zhang, Ju Zhou, Xuexiang Wang |
A Variation Aware Register Clustering Methodology in Near-Threshold Region. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, October 29 - November 1, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-0735-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Michaela Brunner, Johanna Baehr, Georg Sigl |
Improving on State Register Identification in Sequential Hardware Reverse Engineering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HOST ![In: IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2019, McLean, VA, USA, May 5-10, 2019, pp. 151-160, 2019, IEEE, 978-1-5386-8064-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Werner Haselmayr, Daniel Wiesinger, Michael Lunglmayr |
Counter-Based vs. Shift-Register-Based Signal Processing in Stochastic Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCAST (2) ![In: Computer Aided Systems Theory - EUROCAST 2019 - 17th International Conference, Las Palmas de Gran Canaria, Spain, February 17-22, 2019, Revised Selected Papers, Part II, pp. 67-75, 2019, Springer, 978-3-030-45095-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Ayrat Khalimov 0001, Orna Kupferman |
Register-Bounded Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CONCUR ![In: 30th International Conference on Concurrency Theory, CONCUR 2019, August 27-30, 2019, Amsterdam, the Netherlands., pp. 25:1-25:16, 2019, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-121-4. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Ana Paula Chaves 0001, Eck Doerry, Jesse Egbert, Marco Aurélio Gerosa |
It's How You Say It: Identifying Appropriate Register for Chatbot Language Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HAI ![In: Proceedings of the 7th International Conference on Human-Agent Interaction, HAI 2019, Kyoto, Japan, October 06-10, 2019, pp. 102-109, 2019, ACM, 978-1-4503-6922-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Pengfei Yue, Ru Li 0004, Bin Pang |
Register before Publishing with Smart Forwarding, Mitigate Content Poisoning Attack in ICN. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA/BDCloud/SocialCom/SustainCom ![In: 2019 IEEE Intl Conf on Parallel & Distributed Processing with Applications, Big Data & Cloud Computing, Sustainable Computing & Communications, Social Computing & Networking, ISPA/BDCloud/SocialCom/SustainCom 2019, Xiamen, China, December 16-18, 2019, pp. 210-217, 2019, IEEE, 978-1-7281-4328-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Manolis Chatzimpyrros, Konstantinos Solomos, Sotiris Ioannidis |
You Shall Not Register! Detecting Privacy Leaks Across Registration Forms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOSec/MSTEC/FINSEC@ESORICS ![In: Computer Security - ESORICS 2019 International Workshops, IOSec, MSTEC, and FINSEC, Luxembourg City, Luxembourg, September 26-27, 2019, Revised Selected Papers, pp. 91-104, 2019, Springer, 978-3-030-42050-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Miao Tony He, Jungmin Park, Adib Nahiyan, Apostol Vassilev 0001, Yier Jin, Mark M. Tehranipoor |
RTL-PSC: Automated Power Side-Channel Leakage Assessment at Register-Transfer Level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 37th IEEE VLSI Test Symposium, VTS 2019, Monterey, CA, USA, April 23-25, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-1170-4. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Putt Sakdhnagool, Amit Sabne, Rudolf Eigenmann |
Optimizing GPU programs by register demotion: poster. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the 24th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP 2019, Washington, DC, USA, February 16-20, 2019, pp. 405-406, 2019, ACM, 978-1-4503-6225-2. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Yunho Oh, Gunjae Koo, Murali Annavaram, Won Woo Ro |
Linebacker: preserving victim cache lines in idle register files of GPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 46th International Symposium on Computer Architecture, ISCA 2019, Phoenix, AZ, USA, June 22-26, 2019, pp. 183-196, 2019, ACM, 978-1-4503-6669-4. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Priyanka Panigrahi, Rajesh Kumar Jha, Chandan Karfa |
User Guided Register Manipulation in Digital Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VDAT ![In: VLSI Design and Test - 23rd International Symposium, VDAT 2019, Indore, India, July 4-6, 2019, Revised Selected Papers, pp. 468-481, 2019, Springer, 978-981-32-9766-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | M. Mahendra Reddy, Sounak Roy |
Clock Pulse Based Foreground Calibration of a Sub-Radix-2 Successive Approximation Register ADC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VDAT ![In: VLSI Design and Test - 23rd International Symposium, VDAT 2019, Indore, India, July 4-6, 2019, Revised Selected Papers, pp. 141-149, 2019, Springer, 978-981-32-9766-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Hodjat Asghari Esfeden, Farzad Khorasani, Hyeran Jeon, Daniel Wong 0001, Nael B. Abu-Ghazaleh |
CORF: Coalescing Operand Register File for GPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2019, Providence, RI, USA, April 13-17, 2019, pp. 701-714, 2019, ACM, 978-1-4503-6240-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Solène Tarride, Aurélie Lemaitre, Bertrand Coüasnon, Sophie Tardivel |
Signature detection as a way to recognise historical parish register structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HIP@ICDAR ![In: Proceedings of the 5th International Workshop on Historical Document Imaging and Processing, HIP@ICDAR 2019, Sydney, NSW, Australia, September 20-21, 2019, pp. 54-59, 2019, ACM, 978-1-4503-7668-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Suhaib Ahmed, Vipan Kakkar |
Modeling and simulation of an eight-bit auto-configurable successive approximation register analog-to-digital converter for cardiac and neural implants. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Simul. ![In: Simul. 94(1), pp. 11-29, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Jiafeng Xie, Pramod Kumar Meher, Xiaojun Zhou, Chiou-Yng Lee |
Low Register-Complexity Systolic Digit-Serial Multiplier Over GF(2m) Based on Trinomials. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Multi Scale Comput. Syst. ![In: IEEE Trans. Multi Scale Comput. Syst. 4(4), pp. 773-783, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Junji Yamada, Ushio Jimbo, Ryota Shioya, Masahiro Goshima, Shuichi Sakai |
Bank-Aware Instruction Scheduler for a Multibanked Register File. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Inf. Process. ![In: J. Inf. Process. 26, pp. 696-705, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | M. Kiruba, V. Sumathy |
Register Pre-Allocation based Folded Discrete Tchebichef Transformation Technique for Image Compression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 60, pp. 13-24, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Shahrzad Kananizadeh, Kirill Kononenko |
Improving on Linear Scan Register Allocation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Autom. Comput. ![In: Int. J. Autom. Comput. 15(2), pp. 228-238, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Teng Yang, Doyun Kim, Jiangyi Li, Peter R. Kinget, Mingoo Seok |
In~Situ and In-Field Technique for Monitoring and Decelerating NBTI in 6T-SRAM Register Files. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 26(11), pp. 2241-2253, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Wenjun Wang, Wei-Ming Lin |
Real-time physical register file allocation with neural networks for simultaneous multi-threading processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. High Perform. Syst. Archit. ![In: Int. J. High Perform. Syst. Archit. 8(3), pp. 146-158, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Lin Wang 0024, Ying Gao 0006, Yu Zhou, Xiaoni Du |
On Searching Linear Transformations for the Register R of MICKEY-Family Ciphers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 101-A(9), pp. 1546-1547, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Jagadish Dasarahalli Narasimaiah, Laxminidhi Tonse, Mujoor Sankaranarayana Bhat |
11.39 fJ/conversion-step 780 kS/s 8 bit switched capacitor-based area and energy-efficient successive approximation register ADC in 90 nm complementary metal-oxide-semiconductor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Circuits Devices Syst. ![In: IET Circuits Devices Syst. 12(3), pp. 249-255, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Nehal N. Shah, Upena D. Dalal |
Register array-based sum of absolute difference processor with parallel memory system for fast motion estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Comput. Digit. Tech. ![In: IET Comput. Digit. Tech. 12(3), pp. 95-104, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Mitsuhiko Ota, Nicola Davies-Jenkins, Barbora Skarabela |
Why Choo-Choo Is Better Than Train: The Role of Register-Specific Words in Early Vocabulary Growth. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Cogn. Sci. ![In: Cogn. Sci. 42(6), pp. 1974-1999, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Ethan Douglas Quaid |
Output Register Parallelism in an Identical Direct and Semi-Direct Speaking Test: A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Comput. Assist. Lang. Learn. Teach. ![In: Int. J. Comput. Assist. Lang. Learn. Teach. 8(2), pp. 75-91, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Xiaolong Xie, Yun Liang 0001, Xiuhong Li, Yudong Wu, Guangyu Sun 0003, Tao Wang 0004, Dongrui Fan |
CRAT: Enabling Coordinated Register Allocation and Thread-Level Parallelism Optimization for GPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 67(6), pp. 890-897, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Alexis Ramos, Anees Ullah, Pedro Reviriego, Juan Antonio Maestro |
Efficient Protection of the Register File in Soft-Processors Implemented on Xilinx FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 67(2), pp. 299-304, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Parvaneh Babari, Manfred Droste, Vitaly Perevoshchikov |
Weighted register automata and weighted logic on data words. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Theor. Comput. Sci. ![In: Theor. Comput. Sci. 744, pp. 3-21, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Benjamin Hackl, Clemens Heuberger, Helmut Prodinger |
Reductions of binary trees and lattice paths induced by the register function. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Theor. Comput. Sci. ![In: Theor. Comput. Sci. 705, pp. 31-57, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Silvia Bonomi, Antonella Del Pozzo, Maria Potop-Butucaru |
Optimal self-stabilizing synchronous mobile Byzantine-tolerant atomic register. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Theor. Comput. Sci. ![In: Theor. Comput. Sci. 709, pp. 64-79, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Dipankar Dey, Debasis Giri, Biswapati Jana, Tanmoy Maitra, Ram N. Mohapatra |
Linear-feedback shift register-based multi-ant cellular automation and chaotic map-based image encryption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Secur. Priv. ![In: Secur. Priv. 1(6), 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Jonathan Bailey, John Kloosterman, Scott A. Mahlke |
Scratch That (But Cache This): A Hybrid Register Cache/Scratchpad for GPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(11), pp. 2779-2789, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Julia Wrobel |
register: Registration for Exponential Family Functional Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Open Source Softw. ![In: J. Open Source Softw. 3(22), pp. 557, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Dani Voitsechov, Arslan Zulfiqar, Mark Stephenson, Mark Gebhart, Stephen W. Keckler |
Software-Directed Techniques for Improved GPU Register File Utilization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 15(3), pp. 38:1-38:23, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Shao-Chung Wang, Li-Chen Kan, Chao-Lin Lee, Yuan-Shin Hwang, Jenq-Kuen Lee |
Architecture and Compiler Support for GPUs Using Energy-Efficient Affine Register Files. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 23(2), pp. 18:1-18:25, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Shaull Almagor, Michaël Cadilhac, Filip Mazowiecki, Guillermo A. Pérez 0001 |
Weak Cost Register Automata are Still Powerful. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1804.06336, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
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11 | Julian Stecklina, Thomas Prescher 0002 |
LazyFP: Leaking FPU Register State using Microarchitectural Side-Channels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1806.07480, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
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11 | Loris D'Antoni, Tiago Ferreira 0001, Matteo Sammartino, Alexandra Silva 0001 |
Symbolic Register Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1811.06968, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
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11 | Ayrat Khalimov 0001, Benedikt Maderbacher, Roderick Bloem |
Bounded Synthesis of Register Transducers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1809.05017, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
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11 | Antoine Mottet, Karin Quaas |
The Containment Problem for Unambiguous Register Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1809.08985, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
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11 | Karthik Airani, Rohit Guttal |
A Machine Learning Framework for Register Placement Optimization in Digital Circuit Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1801.02620, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
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11 | Roberto Castañeda Lozano, Mats Carlsson, Gabriel Hjort Blindell, Christian Schulte 0001 |
Combinatorial Register Allocation and Instruction Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1804.02452, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
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11 | Bao-Rong Chang, Hsiu Fen Tsai, Hsia-Chung Huang |
Implementation of Smart Mobile Point-of-Sale Cash Register System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Netw. Intell. ![In: J. Netw. Intell. 3(3), pp. 170-188, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
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11 | Myrto-Panagiota Zacharof, Anna Charalambidou |
An Exploration of the Sub-Register of Chemical Engineering Research Papers Published in English. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Publ. ![In: Publ. 6(3), pp. 30, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Bjørn Kjos-Hanssen |
Automatic complexity of shift register sequences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Discret. Math. ![In: Discret. Math. 341(9), pp. 2409-2417, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Yuanhui Ni, Weiwen Chen, Lei Wang, Keni Qiu |
面向MLC STT-RAM的寄存器分配策略优化研究 (Optimization of Register Allocation Strategy for MLC STT-RAM). ![Search on Bibsonomy](Pics/bibsonomy.png) |
计算机科学 ![In: 计算机科学 45(6A), pp. 562-567, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
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11 | Himchan Park, Qiwei Huang, Changzhi Yu, Seulki Kim, Gil-Cho Ahn, Jinwook Burm |
Two CMOS time to digital converters using successive approximation register logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 15(22), pp. 20180840, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Josef Eisl, David Leopoldseder, Hanspeter Mössenböck |
Parallel trace register allocation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ManLang ![In: Proceedings of the 15th International Conference on Managed Languages & Runtimes, ManLang 2018, Linz, Austria, September 12-14, 2018, pp. 7:1-7:7, 2018, ACM, 978-1-4503-6424-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Stéphane Clinchant, Hervé Déjean, Jean-Luc Meunier, Eva Maria Lang, Florian Kleber |
Comparing Machine Learning Approaches for Table Recognition in Historical Register Books. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAS ![In: 13th IAPR International Workshop on Document Analysis Systems, DAS 2018, Vienna, Austria, April 24-27, 2018, pp. 133-138, 2018, IEEE Computer Society, 978-1-5386-3346-5. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Silvia Bonomi, Antonella Del Pozzo, Maria Potop-Butucaru, Sébastien Tixeuil |
Brief Announcement: Optimal Self-stabilizing Mobile Byzantine-Tolerant Regular Register with Bounded Timestamps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SSS ![In: Stabilization, Safety, and Security of Distributed Systems - 20th International Symposium, SSS 2018, Tokyo, Japan, November 4-7, 2018, Proceedings, pp. 398-403, 2018, Springer, 978-3-030-03231-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Neeta Pandey, Kirti Gupta, Bharat Choudhary |
MCML Dynamic Register Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: IEEE 61st International Midwest Symposium on Circuits and Systems, MWSCAS 2018, Windsor, ON, Canada, August 5-8, 2018, pp. 582-586, 2018, IEEE, 978-1-5386-7392-8. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Maryam Hemattil, Arash Ahmadi, Seyed Vahab Makkil, Majid Ahmadi |
Hardware Design of Chaotic Pseudo-Random Number Generator Based on Nonlinear Feedback Shift Register. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: IEEE 61st International Midwest Symposium on Circuits and Systems, MWSCAS 2018, Windsor, ON, Canada, August 5-8, 2018, pp. 980-983, 2018, IEEE, 978-1-5386-7392-8. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Matej Bartík, Sven Ubik, Pavel Kubalík, Tomás Benes |
Performance Comparison of Multiple Approaches of Status Register for Medium Density Memory Suitable for Implementation of a Lossless Compression Dictionary: (Abstract Only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2018, Monterey, CA, USA, February 25-27, 2018, pp. 290, 2018, ACM. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Davit Hayrapetyan, Aleksandr Manukvan, Grigor Tshagharyan |
Implementation of Memory Static, Coupling and Dynamic Fault Models at the Register Transfer Level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EWDTS ![In: 2018 IEEE East-West Design & Test Symposium, EWDTS 2018, Kazan, Russia, September 14-17, 2018, pp. 1-4, 2018, IEEE, 978-1-5386-5710-2. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Shail Dave, Mahesh Balasubramanian 0001, Aviral Shrivastava |
URECA: Unified register file for CGRAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1081-1086, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Yunho Oh, Myung Kuk Yoon, William J. Song, Won Woo Ro |
FineReg: Fine-Grained Register File Management for Augmenting GPU Throughput. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 51st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018, Fukuoka, Japan, October 20-24, 2018, pp. 364-376, 2018, IEEE Computer Society, 978-1-5386-6240-3. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Farzad Khorasani, Hodjat Asghari Esfeden, Nael B. Abu-Ghazaleh, Vivek Sarkar |
In-Register Parameter Caching for Dynamic Neural Nets with Virtual Persistent Processor Specialization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 51st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018, Fukuoka, Japan, October 20-24, 2018, pp. 377-389, 2018, IEEE Computer Society, 978-1-5386-6240-3. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Hidetsugu Irie, Toru Koizumi 0001, Akifumi Fukuda, Seiya Akaki, Satoshi Nakae, Yutaro Bessho, Ryota Shioya, Takahiro Notsu, Katsuhiro Yoda, Teruo Ishihara, Shuichi Sakai |
STRAIGHT: Hazardless Processor Architecture Without Register Renaming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 51st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018, Fukuoka, Japan, October 20-24, 2018, pp. 121-133, 2018, IEEE Computer Society, 978-1-5386-6240-3. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Wei-Yu Chen, Guei-Yuan Lueh, Pratik Ashar, Kaiyu Chen, Buqi Cheng |
Register allocation for Intel processor graphics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: Proceedings of the 2018 International Symposium on Code Generation and Optimization, CGO 2018, Vösendorf / Vienna, Austria, February 24-28, 2018, pp. 352-364, 2018, ACM. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Hamid Tabani, José-María Arnau, Jordi Tubella, Antonio González 0001 |
A Novel Register Renaming Technique for Out-of-Order Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High Performance Computer Architecture, HPCA 2018, Vienna, Austria, February 24-28, 2018, pp. 259-270, 2018, IEEE Computer Society, 978-1-5386-3659-6. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Thomas Ferrère, Thomas A. Henzinger, N. Ege Saraç |
A Theory of Register Monitors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LICS ![In: Proceedings of the 33rd Annual ACM/IEEE Symposium on Logic in Computer Science, LICS 2018, Oxford, UK, July 09-12, 2018, pp. 394-403, 2018, ACM. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Ayrat Khalimov 0001, Benedikt Maderbacher, Roderick Bloem |
Bounded Synthesis of Register Transducers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ATVA ![In: Automated Technology for Verification and Analysis - 16th International Symposium, ATVA 2018, Los Angeles, CA, USA, October 7-10, 2018, Proceedings, pp. 494-510, 2018, Springer, 978-3-030-01089-8. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Joonas Multanen, Heikki Kultala, Pekka Jääskeläinen |
Energy-Delay Trade-Offs in Instruction Register File Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NORCAS ![In: 2018 IEEE Nordic Circuits and Systems Conference, NORCAS 2018: NORCHIP and International Symposium of System-on-Chip (SoC), Tallinn, Estonia, October 30-31, 2018, pp. 1-7, 2018, IEEE, 978-1-5386-7656-1. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Patrick Sittel, Martin Kumm, Julian Oppermann, Konrad Möller, Peter Zipf, Andreas Koch 0001 |
ILP-Based Modulo Scheduling and Binding for Register Minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 28th International Conference on Field Programmable Logic and Applications, FPL 2018, Dublin, Ireland, August 27-31, 2018, pp. 265-271, 2018, IEEE Computer Society, 978-1-5386-8517-4. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Vishwesh Jatala, Jayvant Anantpur, Amey Karkare |
Reducing GPU Register File Energy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2018: Parallel Processing - 24th International Conference on Parallel and Distributed Computing, Turin, Italy, August 27-31, 2018, Proceedings, pp. 77-91, 2018, Springer, 978-3-319-96982-4. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Florian Kleber, Markus Diem, Hervé Déjean, Jean-Luc Meunier, Eva Maria Lang |
Matching Table Structures of Historical Register Books using Association Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICFHR ![In: 16th International Conference on Frontiers in Handwriting Recognition, ICFHR 2018, Niagara Falls, NY, USA, August 5-8, 2018, pp. 217-222, 2018, IEEE Computer Society, 978-1-5386-5875-8. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Andrzej S. Murawski, Steven J. Ramsay, Nikos Tzevelekos |
Polynomial-Time Equivalence Testing for Deterministic Fresh-Register Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MFCS ![In: 43rd International Symposium on Mathematical Foundations of Computer Science, MFCS 2018, August 27-31, 2018, Liverpool, UK, pp. 72:1-72:14, 2018, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-086-6. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Inês Dias, Pedro Fonseca, Duarte Furtado, Inês Figueira, Paulo Franco, Vanda Cláudio, Helena Antunes, José Fragata, Cláudia Quaresma, Carla Quintão |
Development of a Parameter Calculator in Cardiovascular Perfusion - BioMEP as a Tool for the Register of Physiological Parameters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BIODEVICES ![In: Proceedings of the 11th International Joint Conference on Biomedical Engineering Systems and Technologies (BIOSTEC 2018) - Volume 1: BIODEVICES, Funchal, Madeira, Portugal, January 19-21, 2018., pp. 254-257, 2018, SciTePress, 978-989-758-277-6. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Dirk Habich, Patrick Damme, Annett Ungethüm, Wolfgang Lehner |
Make Larger Vector Register Sizes New Challenges?: Lessons Learned from the Area of Vectorized Lightweight Compression Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DBTest@SIGMOD ![In: Proceedings of the 7th International Workshop on Testing Database Systems, DBTest@SIGMOD 2018, Houston, TX, USA, June 15, 2018, pp. 8:1-8:6, 2018, ACM. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Jhohn Paulo E. de Chavez, Michaella M. Maala, Ellen Mhae M. Valencia, Adonis S. Santos, Francis A. Malabanan, Jay Nickson T. Tabing, Sherryl M. Gevana |
Development of Resolution Scalable Successive Approximation Register ADC in 90nm CMOS Process Technology for Wireless Sensor Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TENCON ![In: TENCON 2018 - 2018 IEEE Region 10 Conference, Jeju, South Korea, October 28-31, 2018, pp. 2346-2351, 2018, IEEE, 978-1-5386-5457-6. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Shaull Almagor, Michaël Cadilhac, Filip Mazowiecki, Guillermo A. Pérez 0001 |
Weak Cost Register Automata Are Still Powerful. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DLT ![In: Developments in Language Theory - 22nd International Conference, DLT 2018, Tokyo, Japan, September 10-14, 2018, Proceedings, pp. 83-95, 2018, Springer, 978-3-319-98653-1. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Stefan Bramburger, Pavol Pitonak, Dirk Killat |
A unary coded current steering DAC with sequential stepping of the thermometer coded register in 1 and 2 LSB steps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MIPRO ![In: 41st International Convention on Information and Communication Technology, Electronics and Microelectronics, MIPRO 2018, Opatija, Croatia, May 21-25, 2018, pp. 89-92, 2018, IEEE, 978-953-233-095-3. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Hua Fan 0001, Chen Wang, Hailiang Xiong, Quanyuan Feng, Dagang Li, Kelin Zhang, Xiaopeng Diao, Lishuang Lin, Hadi Heidari |
A Bit Cycling Method for Improving the DNL/INL in Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC). ![Search on Bibsonomy](Pics/bibsonomy.png) |
NGCAS ![In: 2018 New Generation of CAS, NGCAS 2018, Valletta, Malta, November 20-23, 2018, pp. 1-4, 2018, IEEE, 978-1-5386-7681-3. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Hasancan Güngörer, Gürhan Küçük |
Dynamic Capping of Physical Register Files in Simultaneous Multi-threading Processors for Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCIS ![In: Computer and Information Sciences - 32nd International Symposium, ISCIS 2018, Held at the 24th IFIP World Computer Congress, WCC 2018, Poznan, Poland, September 20-21, 2018, Proceedings, pp. 41-48, 2018, Springer, 978-3-030-00839-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Nicola Ferro 0001, Luca Sinico |
Graph Databases Benchmarking on the Italian Business Register. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SEBD ![In: Proceedings of the 26th Italian Symposium on Advanced Database Systems, Castellaneta Marina (Taranto), Italy, June 24-27, 2018., 2018, CEUR-WS.org. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
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11 | Jade Mekki, Delphine Battistelli, Gwénolé Lecorvé, Nicolas Béchet |
Identification de descripteurs pour la caractérisation de registres (Feature identification for register characterization). ![Search on Bibsonomy](Pics/bibsonomy.png) |
CORIA-TALN-RJC (DeFT) ![In: Actes de la Conférence CORIA-TALN-RJC - Volume 2 - Démonstrations, articles des Rencontres Jeunes Chercheurs, ateliers DeFT, Rennes, France, May 14-18, 2018, pp. 73-84, 2018, ATALA. The full citation details ...](Pics/full.jpeg) |
2018 |
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11 | Junichiro Kadomoto, Toru Koizumi 0001, Akifumi Fukuda, Reoma Matsuo, Susumu Mashimo, Akifumi Fujita, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai |
An Area-Efficient Out-of-Order Soft-Core Processor Without Register Renaming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPT ![In: International Conference on Field-Programmable Technology, FPT 2018, Naha, Okinawa, Japan, December 10-14, 2018, pp. 374-377, 2018, IEEE, 978-1-7281-0214-6. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Georgy Lebedev, Marina Shakhova, Alexey Kholin, Oleg Malyarenko, Vladimir Bondarenko, Sergey V. Zykov |
Application of a prospective assisted reproductive technologies register for calculating the probability of pregnancy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
KES ![In: Knowledge-Based and Intelligent Information & Engineering Systems: Proceedings of the 22nd International Conference KES-2018, Belgrade, Serbia, 3-5 September 2018., pp. 1237-1242, 2018, Elsevier. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Hoan Nguyen, Jihoon Jeong, Francois Atallah, Marc Jansen, Anthony Polomik, Daniel Yingling, Harsha Akkaraju, Brad Appel, Rahul Nadkarni, Keith A. Bowman |
A 7NM Double-Pumped 6R6W Register File for Machine Learning Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: 2018 IEEE Symposium on VLSI Circuits, Honolulu, HI, USA, June 18-22, 2018, pp. 1-2, 2018, IEEE, 978-1-5386-4214-6. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Sying-Jyan Wang, Chin-Hung Lien, Katherine Shu-Min Li |
Register PUF with No Power-Up Restrictions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy, pp. 1-5, 2018, IEEE, 978-1-5386-4881-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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11 | Gaurav Sharma 0008, Lava Bhargava, Vinod Kumar 0016 |
Automated Coverage Register Access Technology on UVM Framework for Advanced Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy, pp. 1-4, 2018, IEEE, 978-1-5386-4881-0. The full citation details ...](Pics/full.jpeg) |
2018 |
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