Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Matthias Meerwein, C. Baumgartner, W. Glauert |
Linking codesign and reuse in embedded systems design. |
CODES |
2000 |
DBLP DOI BibTeX RDF |
|
1 | Axel Jantsch, Ingo Sander |
On the roles of functions and objects in system specification. |
CODES |
2000 |
DBLP DOI BibTeX RDF |
|
1 | Thomas Gleerup, Hans Holten-Lund, Jan Madsen, Steen Pedersen |
Memory architecture for efficient utilization of SDRAM: a case study of the computation/memory access trade-off. |
CODES |
2000 |
DBLP DOI BibTeX RDF |
case study, memory architecture, 3D graphics |
1 | Frederik Vermeulen, Francky Catthoor, Diederik Verkest, Hugo De Man |
Extended design reuse trade-offs in hardware-software architecture mapping. |
CODES |
2000 |
DBLP DOI BibTeX RDF |
|
1 | Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto |
Energy estimation for 32-bit microprocessors. |
CODES |
2000 |
DBLP DOI BibTeX RDF |
|
1 | Bassam Tabbara, Abdallah Tabbara, Alberto L. Sangiovanni-Vincentelli |
Task response time optimization using cost-based operation motion. |
CODES |
2000 |
DBLP DOI BibTeX RDF |
(cost-based) code motion, optimization, response time |
1 | Hua Lin, Wayne H. Wolf |
Co-design of interleaved memory systems. |
CODES |
2000 |
DBLP DOI BibTeX RDF |
data access locality, extracted data stream, in-dimension-stride vector, interleaved memory systems, memory access conflict, optimally reordered access |
1 | William Fornaciari, M. Polentarutti, Donatella Sciuto, Cristina Silvano |
Power optimization of system-level address buses based on software profiling. |
CODES |
2000 |
DBLP DOI BibTeX RDF |
|
1 | Hiroyuki Tomiyama, Nikil D. Dutt |
Program path analysis to bound cache-related preemption delay in preemptive real-time systems. |
CODES |
2000 |
DBLP DOI BibTeX RDF |
|
1 | Per Gunnar Kjeldsberg, Francky Catthoor, Einar J. Aas |
Storage requirement estimation for data intensive applications with partially fixed execution ordering. |
CODES |
2000 |
DBLP DOI BibTeX RDF |
|
1 | Haris Lekatsas, Jörg Henkel, Wayne H. Wolf |
Code compression as a variable in hardware/software co-design. |
CODES |
2000 |
DBLP DOI BibTeX RDF |
|
1 | Marcello Lajolo, Luciano Lavagno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
Automatic test bench generation for simulation-based validation. |
CODES |
2000 |
DBLP DOI BibTeX RDF |
simulation-based validation, genetic algorithm |
1 | Frank Engel, Johannes Nührenberg, Gerhard P. Fettweis |
A generic tool set for application specific processor architectures. |
CODES |
2000 |
DBLP DOI BibTeX RDF |
|
1 | Sreeranga P. Rajan, Masahiro Fujita, Ashok Sudarsanam, Sharad Malik |
Development of an optimizing compiler for a Fujitsu fixed-point digital signal processor. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Yung-Hsiang Lu, Tajana Simunic, Giovanni De Micheli |
Software controlled power management. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Ingo Sander, Axel Jantsch |
System synthesis utilizing a layered functional model. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Jan Madsen, Peter Bjørn-Jørgensen |
Embedded system synthesis under memory constraints. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Dinesh Ramanathan, Ali Dasdan, Rajesh K. Gupta 0001 |
Timing-driven HW/SW codesign based on task structuring and process timing simulation. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Francis G. Wolff, Michael J. Knieser, Daniel J. Weyer, Christos A. Papachristou |
Using codesign techniques to support analog functionality. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
design methodologies, analog, hardware/software codesign |
1 | Pieter van der Wolf, Paul Lieverse, Mudit Goel, David La Hei, Kees A. Vissers |
An MPEG-2 decoder case study as a driver for a system level design methodology. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Marcello Lajolo, Mihai T. Lazarescu, Alberto L. Sangiovanni-Vincentelli |
A compilation-based software estimation scheme for hardware/software co-simulation. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
compilation, delay modeling, software estimation |
1 | Sungjoo Yoo, Kiyoung Choi |
Optimizing geographically distributed timed cosimulation by hierarchically grouped messages. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Frank Vahid, Tony Givargis |
The case for a configure-and-execute paradigm. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
methodology, IP, system-on-a-chip, cores |
1 | Tomás Bautista, Antonio Núñez |
Flexible design of SPARC cores: a quantitative study. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Marnix Arnold, Henk Corporaal |
Automatic detection of recurring operation patterns. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
instruction set synthesis, pattern matching, design space exploration, co-design |
1 | H. J. H. N. Kenter, Claudio Passerone, W. J. M. Smits, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli |
Designing digital video systems: modeling and scheduling. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Margarida F. Jacome, Gustavo de Veciana, Cagdas Akturan |
Resource constrained dataflow retiming heuristics for VLIW ASIPs. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Mark Genoe, Christopher K. Lennard, Joachim Kunkel, Brian Bailey, Gjalt G. de Jong, Grant Martin, M. M. Kamal Hashmi, Shay Ben-Chorin, Anssi Haverinen |
How standards will enable hardware/software co-design. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | François Clouté, Jean-Noël Contensou, Daniel Esteve, Pascal Pampagnin, Philippe Pons, Yves Favard |
Hardware/software co-design of an avionics communication protocol interface system: an industrial case study. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
ARINC, POLIS, co-design, Esterel, avionics |
1 | François Charot, Vincent Messé |
A flexible code generation framework for the design of application specific programmable processors. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Stephen A. Edwards |
Compiling Esterel into sequential code. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Jones Albuquerque, Claudionor José Nunes Coelho Jr., Carlos Frederico Cavalcanti, Diógenes Cecilio da Silva Jr., Antônio Otávio Fernandes |
System-level partitioning with uncertainty. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Peter Voigt Knudsen, Jan Madsen |
Graph based communication analysis for hardware/software codesign. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Jean-Yves Brunel, Erwin A. de Kock, W. M. Kruijtzer, H. J. H. N. Kenter, W. J. M. Smits |
Communication refinement in video systems on chip. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
system design, IP, video processing, communication interface |
1 | Donald E. Thomas, JoAnn M. Paul, Simon N. Peffers, Sandra J. Weber |
Peer-based multithreaded executable co-specification. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
hardware/software co-specification, mixed-system modeling, multithreading, co-simulation |
1 | Felice Balarin |
Worst-case analysis of discrete systems based on conditional abstractions. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Hyunok Oh, Soonhoi Ha |
A hardware-software cosynthesis technique based on heterogeneous multiprocessor scheduling. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
distributed heterogeneous embedded system, hardware-software cosynthesis, system-on-chip |
1 | Kayhan Küçükçakar |
An ASIP design methodology for embedded systems. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Pao-Ann Hsiung |
Timing coverification of concurrent embedded real-time systems. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Paul Pop, Petru Eles, Zebo Peng |
Scheduling with optimized communication for time-triggered embedded systems. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | François Pogodalla, Richard Hersemeule, Pierre Coulomb |
Fast prototyping: a system design flow for fast design, prototyping and efficient IP reuse. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
HW/SW co-verification, RTC, virtual components, emulation, system modeling, HW/SW co-design |
1 | Zhao Wu, Wayne H. Wolf |
Iterative cache simulation of embedded CPUs with trace stripping. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Karsten Strehl, Lothar Thiele, Dirk Ziegenbein, Rolf Ernst, Jürgen Teich |
Scheduling hardware/software systems using symbolic techniques. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | William Fornaciari, Donatella Sciuto, Cristina Silvano |
Power estimation for architectural exploration of HW/SW communication on system-level buses. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Jürgen Teich, Eckart Zitzler, Shuvra S. Bhattacharyya |
3D exploration of software schedules for DSP algorithms. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | David L. Rhodes, Wayne H. Wolf |
Overhead effects in real-time preemptive schedules. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Thierry Grandpierre, Christophe Lavarenne, Yves Sorel |
Optimized rapid prototyping for real-time embedded heterogeneous multiprocessors. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Philippe Coste, Fabiano Hessel, P. LeMarrec, Zoltan Sugar, Mohamed Romdhani, Rodolph Suescun, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya |
Multilanguage design of heterogeneous systems. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
hetergeneous systems, multilanguage, codesign, cosimulation |
1 | Jianwen Zhu, Daniel Gajski |
A unified formal model of ISA and FSMD. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | I. D. Bates, E. Graeme Chester, David J. Kinniment |
A statechart based HW/SW codesign system. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
CFSMs, POLIS, statecharts |
1 | Dirk Desmet, Michiel Esvelt, Prabhat Avasare, Diederik Verkest, Hugo De Man |
Timed executable system specification of an ADSL modem using a C++ based design environment: a case study. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Jonas Plantin, Erik Stoy |
Aspects of system-level design. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Tao Zhou, Xiaobo Sharon Hu, Edwin Hsing-Mean Sha |
A probabilistic performance metric for real-time system design. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Ahmed Amine Jerraya, Luciano Lavagno, Frank Vahid (eds.) |
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, CODES 1999, Rome, Italy, 1999 |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Michael Gschwind |
Instruction set selection for ASIP design. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Ansgar Bredenfeld |
Co-design tool construction using APICES. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
1 | Frank Slomka, Jürgen Zant, Lennard Lambert |
Schedulability analysis of heterogeneous systems for performance message sequence chart. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
SDL |
1 | Sungjoo Yoo, Kiyoung Choi |
Optimistic distributed timed cosimulation based on thread simulation model. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
|
1 | Karam S. Chatha, Ranga Vemuri |
RECOD: a retiming heuristic to optimize resource and memory utilization in HW/SW codesigns. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
|
1 | Gaetano Borriello, Ahmed Amine Jerraya, Luciano Lavagno (eds.) |
Proceedings of the Sixth International Workshop on Hardware/Software Codesign, CODES 1998, Seattle, Washington, USA, March 15-18, 1998 |
CODES |
1998 |
DBLP DOI BibTeX RDF |
|
1 | Bart Kienhuis, Ed F. Deprettere, Kees A. Vissers, Pieter van der Wolf |
The construction of a retargetable simulator for an architecture template. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
|
1 | Thomas Hollstein, Jürgen Becker 0001, Andreas Kirschbaum, Manfred Glesner |
HiPART: a new hierarchical semi-interactive HW-/SW partitioning approach with fast debugging for real-time embedded systems. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
|
1 | Robert P. Dick, David L. Rhodes, Wayne H. Wolf |
TGFF: task graphs for free. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
|
1 | Dirk Ziegenbein, Rolf Ernst, Kai Richter 0001, Jürgen Teich, Lothar Thiele |
Combining multiple models of computation for scheduling and allocation. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
Systems Application Architecture |
1 | Michael Eisenring, Jürgen Teich |
Domain-specific interface generation from dataflow specifications. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
|
1 | Guy Gogniat, Michel Auguin, Luc Bianco, Alain Pegatoquet |
Communication synthesis and HW/SW integration for embedded system design. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
|
1 | Luc Bianco, Michel Auguin, Guy Gogniat, Alain Pegatoquet |
A path analysis based partitioning for time constrained embedded systems. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
|
1 | Peter Voigt Knudsen, Jan Madsen |
Communication estimation for hardware/software codesign. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
|
1 | Giuseppe Del Castillo, Wolfram Hardt |
Fast dynamic analysis of complex HW/SW-systems based on abstract state machine models. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
|
1 | Peter Grun, Florin Balasa, Nikil D. Dutt |
Memory size estimation for multimedia applications. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
|
1 | Jean-Marc Daveau, Gilberto Fernandes Marchioro, Ahmed Amine Jerraya |
Hardware/software co-design of an ATM network interface card: a case study. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
SDL |
1 | Jian Li 0061, Rajesh K. Gupta 0001 |
HDL code restructuring using timed decision tables. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
|
1 | Jie Liu 0001, Marcello Lajolo, Alberto L. Sangiovanni-Vincentelli |
Software timing analysis using HW/SW cosimulation and instruction set simulator. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
|
1 | Franz Fischer, Annette Muth, Georg Färber |
Towards interprocess communication and interface synthesis for a heterogeneous real-time rapid prototyping environment. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
task classification model, rapid prototyping, SDL, hard real-time, communication synthesis |
1 | Pai H. Chou, Gaetano Borriello |
An analysis-based approach to composition of distributed embedded systems. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
|
1 | Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli |
A case study on modeling shared memory access effects during performance analysis of HW/SW systems. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
TCP/IP |
1 | Josef Fleischmann, Klaus Buchenrieder, Rainer Kress 0002 |
A hardware/software prototyping environment for dynamically reconfigurable embedded systems. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
Java |
1 | Claudio Passerone, Roberto Passerone, Claudio Sansoè, Jonathan Martin, Alberto L. Sangiovanni-Vincentelli, Rick McGeer |
Modeling reactive systems in Java. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
Java |
1 | Jörg Henkel, Yanbing Li |
Energy-conscious HW/SW-partitioning of embedded systems: a case study on an MPEG-2 encoder. |
CODES |
1998 |
DBLP DOI BibTeX RDF |
C |
1 | Jean Paul Calvez, Olivier Pasquier, James K. Peckol |
Software Implementation Techniques for Hw/Sw Embedded Systems. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
Real-time software implementation, Multi-rate reactive systems, Multi-task software optimization, Embedded software, Dynamic scheduling, Software synthesis |
1 | D. C. R. Jensen, Jan Madsen, Steen Pedersen |
The importance of interfaces: a HW/SW codesign case study. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
hardware software interface, case study, image sequences, optical flow, image analysis, hardware software codesign, prototype system, optimal solutions, functional modules, system level |
1 | Harald P. E. Vranken, M. P. J. Stevens, M. T. M. Segers |
Design-For-Debug in Hardware/Software Co-Design. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
system integration and test, hardware/software co-design, design validation, design-for-debug |
1 | Ross B. Ortega, Gaetano Borriello |
Communication Synthesis for Embedded Systems with Global Considerations. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
communication protocols, distributed embedded systems, communication synthesis |
1 | Jakob Axelsson |
Architecture Synthesis and Partitioning of Real-Time Systems: A Comparison of Three Heuristic Search Strategies. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
Real-Time Systems, Heuristic Search, Architecture Synthesis |
1 | Martyn Edwards |
Software acceleration using programmable logic: is it worth the effort? |
CODES |
1997 |
DBLP DOI BibTeX RDF |
software acceleration, performance evaluation, hardware architecture |
1 | Felice Balarin, Massimiliano Chiodo, Attila Jurecska, Luciano Lavagno, Bassam Tabbara, Alberto L. Sangiovanni-Vincentelli |
Automatic Generation of a Real-Time Operating System for Embedded Systems. |
CODES |
1997 |
DBLP BibTeX RDF |
scheduling, Real-Time Operating Systems, co-synthesis |
1 | Shinji Kimura, Yasufumi Itou, Makoto Hirao, Katsumasa Watanabe, Mitsuteru Yukishita, Akira Nagoya |
A Hardware/Software Codesign Method for a General Purpose Reconfigurable Co-Processor. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
hardware/software co-operation, a computer architecture using FPGA, bus-based reconfigurable co-processor architecture, high-level synthesis and optimization, C compiler to hardware modules |
1 | Thomas Benner, Rolf Ernst |
An Approach to Mixed Systems Co-Synthesis. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
|
1 | Vincenza Carchiolo, Michele Malgeri, Giuseppe Mangioni |
Approach to the Synthesis of HW and SW in Codesign. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
formal methods, synthesis, codesign |
1 | Frank Vahid, Linus Tauro |
An Object-Oriented Communication Library for Hardware-Software CoDesign. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
Communication, Object-Oriented, C, VHDL, Libraries, Codesign |
1 | Sanjaya Kumar, Fred Rose |
A Codesign Environment Supporting Hardware/Software Modeling at Different Levels of Detail. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
performance evaluation, hybrid modeling, multi-level modeling |
1 | Harry Hsieh, Alberto L. Sangiovanni-Vincentelli |
Modeling micro-controller peripherals for high-level co-simulation and synthesis. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
micro-controllers, FSM synthesis, co-simulation, peripherals, co-synthesis |
1 | Koen Danckaert, Francky Catthoor, Hugo De Man |
System level memory optimization for hardware-software co-design. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
image coding, memory management, HW/SW partitioning |
1 | Reinhard Gerndt, Rolf Ernst |
An Event-Driven Multi-Threading Architecture for Embedded Systems. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
multi-threading architecture, embedded system, hardware/software-codesign, event-flow |
1 | Alberto Allara, S. Filipponi, Fabio Salice, William Fornaciari, Donatella Sciuto |
A Flexible Model for Evaluating the Behavior of Hardware/Software Systems. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
hardware-software co-simulation, embedded system design |
1 | Youngsoo Shin, Kiyoung Choi |
Enforcing Schedulability of Multi-Task Systems by Hardware-Software Codesign. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
schedulability, real-time, deadline, Codesign, rate-monotonic scheduling |
1 | Frank Vahid |
Modifying Min-Cut for Hardware and Software Functional Partitioning. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
Kernighan/Lin, min-cut, Functional partitioning |
1 | |
Proceedings of the Fifth International Workshop on Hardware/Software Codesign, CODES/CASHE 1997, March 24-26, 1997, Braunschweig, Germany |
CODES |
1997 |
DBLP BibTeX RDF |
|
1 | Reiner W. Hartenstein, Jürgen Becker 0001 |
Performance Analysis in CoDe-X Partitioning for Structural Programmable Accelerators. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
structural programmable co-processors, design space exploration, performance estimation |
1 | Laurent Freund, Denis Dupont, Michel Israël, Frédéric Rousseau 0001 |
Interface Optimization During Hardware-Software Partitioning. |
CODES |
1997 |
DBLP DOI BibTeX RDF |
Interface Optimization, Hardware-Software Partitioning |