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Publications at "FMCAD"( http://dblp.L3S.de/Venues/FMCAD )

URL (DBLP): http://dblp.uni-trier.de/db/conf/fmcad

Publication years (Num. hits)
1996 (33) 1998 (35) 2000 (33) 2002 (24) 2004 (31) 2006 (27) 2007 (32) 2008 (30) 2009 (31) 2010 (40) 2011 (35) 2012 (32) 2013 (38) 2014 (36) 2015 (30) 2016 (35) 2017 (37) 2018 (30) 2019 (34) 2020 (35) 2021 (39) 2022 (46) 2023 (40)
Publication types (Num. hits)
inproceedings(760) proceedings(23)
Venues (Conferences, Journals, ...)
FMCAD(783)
GrowBag graphs for keyword ? (Num. hits/coverage)

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The graphs summarize 19 occurrences of 19 keywords

Results
Found 783 publication records. Showing 783 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Frits W. Vaandrager Active Automata Learning: from L* to L#. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Ning Dong, Roberto Guanciale, Mads Dam Refinement-Based Verification of Device-to-Device Information Flow. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Nestan Tsiskaridze, Maxwell Strange, Makai Mann, Kavya Sreedhar, Qiaoyi Liu, Mark Horowitz, Clark W. Barrett Automating System Configuration. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Rohit Dureja, Arie Gurfinkel, Alexander Ivrii, Yakir Vizel IC3 with Internal Signals. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Neta Bar Kama, Roope Kaivola Hardware Security Leak Detection by Symbolic Simulation. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Viktor Kuncak, Jad Hamza Stainless Verification System Tutorial. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Aman Goel, Karem A. Sakallah Towards an Automatic Proof of Lamport's Paxos. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Guy Amir, Michael Schapira, Guy Katz Towards Scalable Verification of Deep Reinforcement Learning. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1 Formal Methods in Computer Aided Design, FMCAD 2021, New Haven, CT, USA, October 19-22, 2021 Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  BibTeX  RDF
1Márton Hajdú, Petra Hozzová, Laura Kovács, Andrei Voronkov Induction with Recursive Definitions in Superposition. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Ori Lahav 0002, Guy Katz Pruning and Slicing Neural Networks using Formal Verification. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Ankit Kumar, Panagiotis Manolios Mathematical Programming Modulo Strings. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Peter Sewell Engineering with Full-scale Formal Architecture: Morello, CHERI, Armv8-A, and RISC-V. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Dapeng Gao, Tom Melham End-to-End Formal Verification of a RISC-V Processor Extended with Capability Pointers. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Bernhard Kragl, Shaz Qadeer The Civl Verifier. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Hari Govind V. K., Sharon Shoham, Arie Gurfinkel Logical Characterization of Coherent Uninterpreted Programs. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Samvid Dharanikota, Suvam Mukherjee, Chandrika Bhardwaj, Aseem Rastogi, Akash Lal Celestial: A Smart Contracts Verification Framework. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Saranyu Chattopadhyay, Florian Lonsing, Luca Piccolboni, Deepraj Soni, Peng Wei 0004, Xiaofan Zhang 0001, Yuan Zhou, Luca P. Carloni, Deming Chen, Jason Cong, Ramesh Karri, Zhiru Zhang, Caroline Trippel, Clark W. Barrett, Subhasish Mitra Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Petar Vukmirovic, Jasmin Blanchette, Marijn J. H. Heule SAT-Inspired Eliminations for Superposition. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Mark Santolucito The FMCAD 2021 Student Forum. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Alexander Ivrii, Ofer Strichman Exploiting Isomorphic Subgraphs in SAT. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Jaroslav Bendík On Decomposition of Maximal Satisfiable Subsets. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Antti E. J. Hyvärinen, Matteo Marescotti, Natasha Sharygina Lookahead in Partitioning SMT. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Michael Rawson 0001, Giles Reger A Multithreaded Vampire with Shared Persistent Grounding. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Vedad Hadzic, Roderick Bloem COCOALMA: A Versatile Masking Verifier. Search on Bibsonomy FMCAD The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
1Shuvendu K. Lahiri, Akash Lal, Sridhar Gopinath, Alexander Nutz, Vladimir Levin, Rahul Kumar 0002, Nate Deisinger, Jakob Lichtenberg, Chetan Bansal Angelic Checking within Static Driver Verifier: Towards high-precision defects without (modeling) cost. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Vincent Liew, Paul Beame, Jo Devriendt, Jan Elffers, Jakob Nordström Verifying Properties of Bit-vector Multiplication Using Cutting Planes Reasoning. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Byron Cook, Björn Döbel, Daniel Kroening, Norbert Manthey, Martin Pohlack, Elizabeth Polgreen, Michael Tautschnig, Pawel Wieczorkiewicz Using model checking tools to triage the severity of security bugs in the Xen hypervisor. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Haoze Wu 0001, Alex Ozdemir, Aleksandar Zeljic, Kyle Julian, Ahmed Irfan, Divya Gopinath, Sadjad Fouladi, Guy Katz, Corina S. Pasareanu, Clark W. Barrett Parallelization Techniques for Verifying Neural Networks. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Florian Lonsing, Subhasish Mitra, Clark W. Barrett A Theoretical Framework for Symbolic Quick Error Detection. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Thomas Pani, Georg Weissenbacher, Florian Zuleger Thread-modular Counter Abstraction for Parameterized Program Safety. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Vasileios Klimis, George Parisis, Bernhard Reus Model Checking Software-Defined Networks with Flow Entries that Time Out. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Alexander Fedotov, Jeroen J. A. Keiren, Julien Schmaltz Effective System Level Liveness Verification. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Franz Brauße, Zurab Khasidashvili, Konstantin Korovin Selecting Stable Safe Configurations for Systems Modelled by Neural Networks with ReLU Activation. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Peter Schrammel How testable is business software? Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Parand Alizadeh Alamdari, Guy Avni, Thomas A. Henzinger, Anna Lukina Formal Methods with a Touch of Magic. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Armin Biere Tutorial on World-Level Model Checking. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Rohit Dureja, Jason Baumgartner, Robert Kanzelman, Mark Williams, Kristin Y. Rozier Accelerating Parallel Verification via Complementary Property Partitioning and Strategy Exploration. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Yutaka Nagashima Smart Induction for Isabelle/HOL (Tool Paper). Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Alexander Nadel On Optimizing a Generic Function in SAT. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Rüdiger Ehlers, Ivan Gavran, Daniel Neider Learning Properties in LTL ∩ ACTL from Positive Examples Only. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Zichao Zhang, Arthur Azevedo de Amorim, Limin Jia 0001, Corina S. Pasareanu Automating Compositional Analysis of Authentication Protocols. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Pamina Georgiou, Bernhard Gleiss, Laura Kovács Trace Logic for Inductive Loop Reasoning. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Peter Schrammel The FMCAD 2020 Student Forum. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Daniela Kaufmann, Mathias Fleury, Armin Biere The Proof Checkers Pacheck and Pastèque for the Practical Algebraic Calculus. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Lauren Pick, Grigory Fedyukovich, Aarti Gupta Automating Modular Verification of Secure Information Flow. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1 2020 Formal Methods in Computer Aided Design, FMCAD 2020, Haifa, Israel, September 21-24, 2020 Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  BibTeX  RDF
1Hillel Kugler Formal Verification for Natural and Engineered Biological Systems. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Andrew Reynolds 0001, Andres Nötzli, Clark W. Barrett, Cesare Tinelli Reductions for Strings and Regular Expressions Revisited. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Denis Bueno, Arlen Cox, Karem A. Sakallah EUFicient Reachability in Software with Arrays. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Simon Jantsch, Hans Harder, Florian Funke 0002, Christel Baier Switss: Computing Small Witnessing Subsystems. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1M. Fareed Arif, Daniel Larraz, Mitziu Echeverria, Andrew Reynolds 0001, Omar Chowdhury, Cesare Tinelli SYSLITE: Syntax-Guided Synthesis of PLTL Formulas from Finite Traces. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Alexander Nadel Anytime Algorithms for MaxSAT and Beyond. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Xuankang Lin, He Zhu 0001, Roopsha Samanta, Suresh Jagannathan Art: Abstraction Refinement-Guided Training for Provably Correct Neural Networks. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Orna Kupferman From Correctness to High Quality. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Sepideh Asadi, Martin Blicha, Antti E. J. Hyvärinen, Grigory Fedyukovich, Natasha Sharygina Incremental Verification by SMT-based Summary Repair. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Aina Niemetz, Mathias Preiner Ternary Propagation-Based Local Search for more Bit-Precise Reasoning. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Prantik Chatterjee, Subhajit Roy 0001, Bui Phi Diep, Akash Lal Distributed Bounded Model Checking. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Tommy Tracy II, Lucas M. Tabajara, Moshe Y. Vardi, Kevin Skadron Runtime Verification on FPGAs with LTLf Specifications. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Alessandro Cimatti, Luca Geatti, Nicola Gigante, Angelo Montanari, Stefano Tonetta Reactive Synthesis from Extended Bounded Response LTL Specifications. Search on Bibsonomy FMCAD The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Oliver Kullmann, Ankit Shukla Autarkies for DQCNF. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1S. Akshay 0001, Jatin Arora 0002, Supratik Chakraborty, Shankara Narayanan Krishna, Divya Raghunathan, Shetal Shah Knowledge Compilation for Boolean Functional Synthesis. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Roderick Bloem, Hana Chockler, Masoud Ebrahimi 0002, Ofer Strichman Synthesizing Reactive Systems Using Robustness and Recovery Specifications. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Clark W. Barrett, Jin Yang (eds.) 2019 Formal Methods in Computer Aided Design, FMCAD 2019, San Jose, CA, USA, October 22-25, 2019 Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  BibTeX  RDF
1Luca Piccolboni, Giuseppe Di Guglielmo, Luca P. Carloni KAIROS: Incremental Verification in High-Level Synthesis through Latency-Insensitive Design. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Sujit Kumar Muduli, Pramod Subramanyan, Sayak Ray Verification of Authenticated Firmware Loaders. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Nadia Polikarpova SuSLik: Synthesis of Safe Pointer-Manipulating Programs (Invited Tutorial). Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Rohit Dureja, Jason Baumgartner, Alexander Ivrii, Robert Kanzelman, Kristin Y. Rozier Boosting Verification Scalability via Structural Grouping and Semantic Partitioning of Properties. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Martin Dixon An Increasing Need for Formality (Keynote). Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Benjamin Ogles, Peter Aldous, Eric Mercer Proving Data Race Freedom in Task Parallel Programs Using a Weaker Partial Order. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Meng Wu, Jingbo Wang 0006, Jyotirmoy Deshmukh, Chao Wang 0001 Shield Synthesis for Real: Enforcing Safety in Cyber-Physical Systems. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Gilles Barthe, Renate Eilers, Pamina Georgiou, Bernhard Gleiss, Laura Kovács, Matteo Maffei Verifying Relational Properties using Trace Logic. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Rafael Dutra, Jonathan Bachrach, Koushik Sen GUIDEDSAMPLER: Coverage-guided Sampling of SMT Solutions. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Daniela Kaufmann, Armin Biere, Manuel Kauers Verifying Large Multipliers by Combining SAT and Computer Algebra. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Freark I. van der Berg, Jaco van de Pol Concurrent Chaining Hash Maps for Software Model Checking. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Dorsa Sadigh Safe and Interactive Autonomy: A Journey Starting from Formal Methods (Keynote). Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Alexander Nadel Anytime Weighted MaxSAT with Improved Polarity Selection and Bit-Vector Optimization. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Ryan Berryhill, Andreas G. Veneris Chasing Minimal Inductive Validity Cores in Hardware Model Checking. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Dmitry Mordvinov, Grigory Fedyukovich Property Directed Inference of Relational Invariants. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Gideon Geier, Philippe Heim, Felix Klein 0001, Bernd Finkbeiner Syntroids: Synthesizing a Game for FPGAs using Temporal Logic Specifications. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Haniel Barbosa, Andrew Reynolds 0001, Daniel Larraz, Cesare Tinelli Extending enumerative function synthesis via SMT-driven classification. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Amer Tahat, Sarang Joshi, Pronnoy Goswami, Binoy Ravindran Scalable Translation Validation of Unverified Legacy OS Code. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Raj Kumar Gajavelly, Jason Baumgartner, Alexander Ivrii, Robert L. Kanzelman, Shiladitya Ghosh Input Elimination Transformations for Scalable Verification and Trace Reconstruction. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Daniel Neider, Oliver Markgraf Learning-Based Synthesis of Safety Controllers. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Aile Ge-Ernst, Christoph Scholl 0001, Ralf Wimmer 0001 Localizing Quantifiers for DQBF. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Nina Narodytska, Leonid Ryzhyk, Igor Ganichev, Soner Sevinc BDD-Based Algorithms for Packet Classification. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Avi Ziv Challenges and Solutions in Post-Silicon Validation of High-end Processors (Invited Tutorial). Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Florian Frohn, Jürgen Giesl Proving Non-Termination via Loop Acceleration. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Faria Kalim, Karl Palmskog, Jayasi Mehar, Adithya Murali, Indranil Gupta, P. Madhusudan Kaizen: Building a Performant Blockchain System Verified for Consensus and Integrity. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Mark R. Greenstreet Integrating SMT with Theorem Proving for Verification of Analog and Mixed-Signal Circuits (Invited Tutorial). Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Ali Ebnenasir Verification and Synthesis of Symmetric Uni-Rings for Leads-To Properties. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Grigory Fedyukovich The FMCAD 2019 Student Forum. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Aellison Cassimiro T. dos Santos, Ben Schneider, Vivek Nigam TSNSCHED: Automated Schedule Generation for Time Sensitive Networking. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Jakub Kuderski, Jorge A. Navas, Arie Gurfinkel Unification-based Pointer Analysis without Oversharing. Search on Bibsonomy FMCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Parosh Aziz Abdulla, Mohamed Faouzi Atig, Yu-Fang Chen 0001, Bui Phi Diep, Lukás Holík, Ahmed Rezine, Philipp Rümmer Trau: SMT solver for string constraints. Search on Bibsonomy FMCAD The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Cristian Mattarei, Makai Mann, Clark W. Barrett, Ross G. Daly, Dillon Huff, Pat Hanrahan CoSA: Integrated Verification for Agile Hardware Design. Search on Bibsonomy FMCAD The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Eugene Goldberg Complete Test Sets And Their Approximations. Search on Bibsonomy FMCAD The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Sourav Anand, Nadia Polikarpova Automatic Synchronization for GPU Kernels. Search on Bibsonomy FMCAD The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Bjørnar Luteberget, Koen Claessen, Christian Johansen Design-Time Railway Capacity Verification using SAT modulo Discrete Event Simulation. Search on Bibsonomy FMCAD The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Nina Narodytska Formal Verification of Deep Neural Networks. Search on Bibsonomy FMCAD The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
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