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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 3186 publication records. Showing 3186 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Najdet Charaf, Diana Göhringer |
A Framework for Intrinsic Evolvable Systems.  |
FPL  |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Clemens Fritzsch, Jörn Hoffmann 0001, Martin Bogdan |
Reduction of Bitstream Size for Low-Cost iCE40 FPGAs. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Su Zheng, Jiadong Qian, Hao Zhou 0008, Lingli Wang |
GRAEBO: FPGA General Routing Architecture Exploration via Bayesian Optimization. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Akinobu Tomori, Yasunori Osana |
FPL Demo: Kyokko - An Aurora 64b66b compatible 100 Gbps Communication Controller. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Ayatallah Elakhras, Andrea Guerrieri, Lana Josipovic, Paolo Ienne |
Unleashing Parallelism in Elastic Circuits with Faster Token Delivery. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Chengming Zhang 0006, Tong Geng, Anqi Guo, Jiannan Tian, Martin C. Herbordt, Ang Li 0006, Dingwen Tao |
H-GCN: A Graph Convolutional Network Accelerator on Versal ACAP Architecture. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhaoteng Meng, Lin Shu, Jie Hao |
A Flexible Real-Time Stereo Vision Architecture for Multiple Data Streams with Runtime Configurable Parameters. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Patrick Plagwitz, Frank Hannig, Jürgen Teich |
TRAC: Compilation-Based Design of Transformer Accelerators for FPGAs. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Kaspar Mätas, Kristiyan Manev, Joseph Powell, Dirk Koch |
FPL Demo: Runtime Stream Processing with Resource-Elastic Pipelines on FPGAs. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Donal Campbell, Ciara Rafferty, Ayesha Khalid, Máire O'Neill |
Acceleration of Post Quantum Digital Signature Scheme CRYSTALS-Dilithium on Reconfigurable Hardware. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Babar Khan, Carsten Heinz, Andreas Koch 0001 |
DeLiBA: An Open-Source Hardware/Software Framework for the Development of Linux Block I/O Accelerators. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Jianyi Cheng, Lana Josipovic, George A. Constantinides, John Wickerson |
Dynamic Inter-Block Scheduling for HLS. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Omar Ragheb, Tianyi Yu, David Ma, Jason Helge Anderson |
Modeling and Exploration of Elastic CGRAs. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Narasinga Rao Miniskar, Aaron R. Young, Frank Liu 0001, Willem Blokland, Anthony M. Cabrera, Jeffrey S. Vetter |
Ultra Low Latency Machine Learning for Scientific Edge Applications. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Fanny Spagnolo, Salim Ullah, Pasquale Corsonello, Akash Kumar 0001 |
ERMES: Efficient Racetrack Memory Emulation System based on FPGA. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Jonas Dann, Daniel Ritter 0001, Holger Fröning |
GraphScale: Scalable Bandwidth-Efficient Graph Processing on FPGAs. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Takefumi Miyoshi, Keisuke Koike, Shinich Morisaka, Hidehisa Shiomi, Kazuhisa Ogawa, Yutaka Tabuchi, Makoto Negoro |
FPL Demo: A Flexible and Scalable Quantum-Classical Interface based on FPGAs. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Laurens Le Jeune, Toon Goedemé, Nele Mentens |
Feature dimensionality in CNN acceleration for high-throughput network intrusion detection. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Tianyu Zhang, Dong Li 0025, Hong Wang, Yunzhi Li, Xiang Ma, Wei Luo, Yu Wang, Yang Huang, Yi Li, Yu Zhang, Xinlin Yang, Xijie Jia, Qiang Lin, Lu Tian, Fan Jiang, Dongliang Xie, Hong Luo, Yi Shan |
A-U3D: A Unified 2D/3D CNN Accelerator on the Versal Platform for Disparity Estimation. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Bahar Asgari, Dheeraj Ramchandani, Amaan Marfatia, Hyesoon Kim |
Maia: Matrix Inversion Acceleration Near Memory. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Shashwat Khandelwal, Shanker Shreejith |
A Lightweight Multi-Attack CAN Intrusion Detection System on Hybrid FPGAs. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Frans Skarman, Oscar Gustafsson |
Spade: An HDL Inspired by Modern Software Languages. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Yunhui Qiu, Yuhang Cao, Yuan Dai, Wenbo Yin, Lingli Wang |
TRAM: An Open-Source Template-based Reconfigurable Architecture Modeling Framework. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Chunshu Wu, Sahan Bandara, Tong Geng, Anqi Guo, Pouya Haghi, Vipin Sachdeva, Woody Sherman, Martin C. Herbordt |
Optimized Mappings for Symmetric Range-Limited Molecular Force Calculations on FPGAs. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Torben Kalkhof, Andreas Koch 0001 |
Direct Device-to-Device Physical Page Migrations in Multi-FPGA Shared Virtual Memory Systems. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Cornelia Wulf, Diana Göhringer |
Virtualization of Embedded Reconfigurable Systems. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Christos Diktopoulos, Konstantinos Georgopoulos, Andreas Brokalakis, Georgios Christou, Grigorios Chrysos 0001, Ioannis Morianos, Sotiris Ioannidis |
Assessing the Effectiveness of Active Fences Against SCAs for Multi-Tenant FPGAs. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede |
Reducing FPGA Memory Footprint of Stencil Codes through Automatic Extraction of Memory Patterns. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | |
32nd International Conference on Field-Programmable Logic and Applications, FPL 2022, Belfast, United Kingdom, August 29 - Sept. 2, 2022 |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuan Meng, Rajgopal Kannan, Viktor K. Prasanna |
Accelerating Monte-Carlo Tree Search on CPU-FPGA Heterogeneous Platform. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Tobias Hahn, Stefan Wildermann, Jürgen Teich |
Auto-Tuning of Raw Filters for FPGAs. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Yehua Ling, Yuanxing Yan, Kai Huang 0001, Gang Chen 0023 |
Ultra-Flow: An Ultra-fast and High-quality Optical Flow Accelerator with Deep Feature Matching on FPGA. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Bingyi Zhang, Rajgopal Kannan, Viktor K. Prasanna, Carl E. Busart |
Accurate, Low-latency, Efficient SAR Automatic Target Recognition on FPGA. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Jakub Cabal, Jiri Sikora, Stepán Friedl, Martin Spinler, Jan Korenek |
FPL Demo: 400G FPGA Packet Capture Based on Network Development Kit. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Carmine Rizzi, Andrea Guerrieri, Paolo Ienne, Lana Josipovic |
A Comprehensive Timing Model for Accurate Frequency Tuning in Dataflow Circuits. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Morihiro Kuga, Masahiro Iida, Hideharu Amano |
FPL Demo: An FPGA-IP Prototype Chip for MEC devices. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Bardia Babaei, Dirk Koch |
Precise Characterizing of FPGAs in Production Systems. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Lucas Bex, Furkan Turan, Michiel Van Beirendonck, Ingrid Verbauwhede |
Mining CryptoNight-Haven on the Varium C1100 Blockchain Accelerator Card. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Stewart Denholm, Wayne Luk |
A Unified Approach for Managing Heterogeneous Processing Elements on FPGAs. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Kohei Ito, Ryota Yasudo, Hideharu Amano |
Optimizing Application Mapping for Multi-FPGA Systems with Multi-ejection STDM Switches. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Ioanna-Maria Panagou, Maria Rafaela Gkeka, Alexandros Patras, Spyros Lalis, Christos D. Antonopoulos, Nikolaos Bellas |
FPGA Roofline modeling and its Application to Visual SLAM. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad A. A. Abdelgawad, Ray C. C. Cheung, Hong Yan 0001 |
A High-Performance FPGA Accelerator for CUR Decomposition. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Jinjie Ruan, Yisong Chang, Ke Zhang 0017, Kan Shi, Mingyu Chen 0001, Yungang Bao |
Increasing Flexibility of Cloud FPGA Virtualization. |
FPL |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Jing Yu 0014, Andrew Attwood, Nguyen Dao, Dirk Koch |
The FABulous Open eFPGA Ecosystem in Action - From Specifications to Chips to Running Bitsteams. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Angelos S. Voros, Christos Panagiotou, Stavros Zogas, Georgios Keramidas, Christos P. Antonopoulos, Michael Hübner 0001, Nikolaos S. Voros |
The SMART4ALL High Performance Computing Infrastructure: Sharing high-end hardware resources via cloud-based microservices. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Chen Wu, Jinming Zhuang, Kun Wang 0005, Lei He 0001 |
MP-OPU: A Mixed Precision FPGA-based Overlay Processor for Convolutional Neural Networks. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Myat Thu Linn Aung, Chuping Qu, Liwei Yang, Tao Luo 0014, Rick Siow Mong Goh, Weng-Fai Wong |
DeepFire: Acceleration of Convolutional Spiking Neural Network on Modern Field Programmable Gate Arrays. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Daouda Diakite, Nicolas Gac, Maxime Martelli |
OpenCL FPGA Optimization guided by memory accesses and roofline model analysis applied to tomography acceleration. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Arish Sateesan, Jo Vliegen, Simon Scherrer, Hsu-Chun Hsiao, Adrian Perrig, Nele Mentens |
Speed Records in Network Flow Measurement on FPGA. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | David Northcote, Lewis D. McLaughlin, Louise H. Crockett, Robert W. Stewart |
Capture and Visualisation of Radio Signals with an Open Source, Single Chip Spectrum Analyser. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Anupreetham Anupreetham, Mohamed Ibrahim, Mathew Hall, Andrew Boutros, Ajay Kuzhively, Abinash Mohanty, Eriko Nurvitadhi, Vaughn Betz, Yu Cao 0001, Jae-sun Seo |
End-to-End FPGA-based Object Detection Using Pipelined CNN and Non-Maximum Suppression. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Vasileios Leon, Kiamal Z. Pekmestzi, Dimitrios Soudris |
Exploiting the Potential of Approximate Arithmetic in DSP & AI Hardware Accelerators. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Florian Fricke |
A Novel Top to Bottom Toolchain For Generating Virtual Coarse-Grained Reconfigurable Arrays. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Tian Ye, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna |
Performance Modeling and FPGA Acceleration of Homomorphic Encrypted Convolution. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Ariel Podlubne, Diana Göhringer |
Reconfigurable Computing Systems as Component-oriented Designs for Robotics. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Aman Arora, Andrew Boutros, Daniel Rauch, Aishwarya Rajen, Aatman Borda, Seyed Alireza Damghani, Samidh Mehta, Sangram Kate, Pragnesh Patel, Kenneth B. Kent, Vaughn Betz, Lizy K. John |
Koios: A Deep Learning Benchmark Suite for FPGA Architecture and CAD Research. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Hasan Irmak, Daniel Ziener, Nikolaos Alachiotis 0001 |
Increasing Flexibility of FPGA-based CNN Accelerators with Dynamic Partial Reconfiguration. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Stefan Nikolic 0001, Paolo Ienne |
Turning PathFinder Upside-Down: Exploring FPGA Switch-Blocks by Negotiating Switch Presence. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Rui Ma, Jia-Ching Hsu, Tian Tan 0007, Eriko Nurvitadhi, Rajesh Vivekanandham, Aravind Dasu, Martin Langhammer, Derek Chiou |
DO-GPU: Domain Optimizable Soft GPUs. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Dominika Przewlocka-Rus, Tomasz Kryjak |
Quantised Siamese Tracker for 4K/UltraHD Video Stream - a demo. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Marcin Kowalczyk, Tomasz Kryjak |
A comparison of real-time 4K/UltraHD connected component labelling architectures. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Anh Hoang Ngoc Nguyen, Yuko Hara-Azumi |
An FPGA-based Stochastic SAT Solver Leveraging Inter-Variable Dependencies. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexander Klemd, Bernd Klauer, Johannes Timmermann, Delf Sachau |
A Flexible Multi-Channel Feedback FxLMS Architecture for FPGA Platforms. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Friedrich Bauer, Felix Braun, Daniel Hauer, Axel Jantsch, Markus D. Kobelrausch, Martin Mosbeck, Nima Taherinejad, Philipp-Sebastian Vogt |
MELODI: An Online Platform for Mass Education of Digital Design - HDL to Remote FPGA. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Philippos Papaphilippou, Paul H. J. Kelly, Wayne Luk |
Simodense: a RISC-V softcore optimised for exploring custom SIMD instructions. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael Hart, John Mc Allister, Leo Rogers, Charles Gillan |
An Emulation of Quantum Error-Correction on an FPGA device. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Shun Yan, Zhengyan Liu, Yun Wang, Chenglong Zeng, Qiang Liu 0011, Bowen Cheng, Ray C. C. Cheung |
An FPGA-based MobileNet Accelerator Considering Network Structure Characteristics. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhenhao He, Dario Korolija, Gustavo Alonso |
EasyNet: 100 Gbps Network for HLS. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Joanna Stanisz, Konrad Lis, Tomasz Kryjak, Marek Gorgon |
Hardware-software implementation of a DNN for 3D object detection using FINN - a demo. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | David Castells-Rufas, Santiago Marco-Sola, Quim Aguado-Puig, Antonio Espinosa-Morales, Juan Carlos Moure, Lluc Alvarez, Miquel Moretó |
OpenCL-based FPGA Accelerator for Semi-Global Approximate String Matching Using Diagonal Bit-Vectors. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Emilien Fournier, Ciprian Teodorov, Loïc Lagadec |
Carnac: Algorithm Variability for Fast Swarm Verification on FPGA. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu Zhu, Zhenhao He, Wenqi Jiang, Kai Zeng, Jingren Zhou, Gustavo Alonso |
Distributed Recommendation Inference on FPGA Clusters. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuhang Shen, Jiadong Qian, Kaichuang Shi, Lingli Wang, Hao Zhou 0008 |
Two-level MUX Design and Exploration in FPGA Routing Architecture. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Fei Wen, Mian Qin, Paul Gratz, A. L. Narasimha Reddy |
An FPGA-based Hybrid Memory Emulation System. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Behnam Ghavami, Milad Ibrahimipour, Zhenman Fang, Lesley Shannon |
MAPLE: A Machine Learning based Aging-Aware FPGA Architecture Exploration Framework. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Sarah L. Harris, Daniel Chaver, Luis Piñuel, José Ignacio Gómez Pérez, M. Hamza Liaqat, Zubair L. Kakakhel, Olof Kindgren, Robert Owen |
RVfpga: Using a RISC-V Core Targeted to an FPGA in Computer Architecture Education. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Nikolaos Bellas, Christos D. Antonopoulos, Spyros Lalis, Maria Rafaela Gkeka, Alexandros Patras, Georgios Keramidas, Iakovos Stamoulis, Nikolaos Tavoularis, Stylianos Piperakis, Emmanouil Hourdakis, Panos E. Trahanias, Paul Zikas, George Papagiannakis, Ioanna Kartsonaki |
Architectures for SLAM and Augmented Reality Computing. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Sumesh Kumar, Fahad Saeed |
Communication-avoiding micro-architecture to compute Xcorr scores for peptide identification. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Vatistas Kostalabros, Jordi Ribes-González, Oriol Farràs, Miquel Moretó, Carles Hernández 0001 |
HLS-Based HW/SW Co-Design of the Post-Quantum Classic McEliece Cryptosystem. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhengtai Chang, Shanshan Shi, Binwei Song, Wenbing Fan, Yao Wang |
Modeling Attack Resistant Arbiter PUF with Time-Variant Obfuscation Scheme. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Abbas Haghi, Santiago Marco-Sola, Lluc Alvarez, Dionysios Diamantopoulos, Christoph Hagleitner, Miquel Moretó |
An FPGA Accelerator of the Wavefront Algorithm for Genomics Pairwise Alignment. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Atiyehsadat Panahi, Suhail Basalama, Ange-Thierry Ishimwe, Joel Mandebi Mbongue, David Andrews 0001 |
A Customizable Domain-Specific Memory-Centric FPGA Overlay for Machine Learning Applications. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Enrico Calore, Sebastiano Fabio Schifano |
Performance assessment of FPGAs as HPC accelerators using the FPGA Empirical Roofline. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Shikha Goel, M. Balakrishnan, Rijurekha Sen |
EnergyNN: Energy Estimation for Neural Network Inference Tasks on DPU. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Nobuho Hashimoto, Shinya Takamaeda-Yamazaki |
An FPGA-Based Fully Pipelined Bilateral Grid for Real-Time Image Denoising. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Konstantina Koliogeorgi, Fekhr Eddine Keddous, Dimosthenis Masouros, Antony Chazapis, Michelle Aubrun, Sotirios Xydis, Angelos Bilas, Romain Hugues, Jean-Thomas Acquaviva, Huy-Nam Nguyen, Dimitrios Soudris |
FPGA acceleration in EVOLVE's Converged Cloud-HPC Infrastructure. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed Kamaleldin, Diana Göhringer |
Design For Agility: A Modular Reconfigurable Platform for Heterogeneous Many-Core Architectures. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Franz-Josef Streit, Paul Krüger, Andreas Becher, Jens Schlumberger, Stefan Wildermann, Jürgen Teich |
Choice - A Tunable PUF-Design for FPGAs. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Jürgen Becker 0001, Leonard Masing, Tobias Dörr, Florian Schade, Georgios Keramidas, Christos P. Antonopoulos, Michail Mavropoulos, Efstratios Tiganourias, Vasilios I. Kelefouras, Konstantinos Antonopoulos, Nikolaos S. Voros, Umut Durak, Alexander Ahlbrecht, Wanja Zaeske, Christos Panagiotou, Dimitris Karadimas, Nico Adler, Andreas Sailer, Raphael Weber, Thomas Wilhelm 0005, Florian Oszwald, Dominik Reinhardt, Mohamad Chamas, Adnan Bekan, Graham Smethurst, Fahad Siddiqui 0001, Rafiullah Khan, Vahid Garousi, Sakir Sezer, Victor Morales |
XANDAR: X-by-Construction Design framework for Engineering Autonomous & Distributed Real-time Embedded Software Systems. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas Mauldin, Zhenyu Xu, Tao Wei |
Minimal Overhead Optical Time-Domain Reflectometer Via I/O Integrated Data Converter Enabled by Field Programmable Voltage Offset. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Sanjay Deshpande, Santos Merino Del Pozo, Víctor Mateu, Marc Manzano, Najwa Aaraj, Jakub Szefer |
Modular Inverse for Integers using Fast Constant Time GCD Algorithm and its Applications. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Hector Gerardo Muñoz Hernandez |
Towards the Efficient Multi-Platform Execution of Deep Neural Networks. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Marcelo Brandalero, Mitko Veleski, Hector Gerardo Muñoz Hernandez, Muhammad Ali 0010, Laurens Le Jeune, Toon Goedemé, Nele Mentens, Jurgen Vandendriessche, Lancelot Lhoest, Bruno da Silva 0001, Abdellah Touhafi, Diana Goehringer, Michael Hübner 0001 |
AITIA: Embedded AI Techniques for Industrial Applications. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Keyvan Shahin, Michael Hübner 0001 |
Accelerating Fixed-Point Simulations Using Width Reconfigurable Hardware Architectures. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Nupur Sumeet, Manoj Nambiar 0001 |
HLS_PRINT: High Performance Logging Framework on FPGA. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | |
31st International Conference on Field-Programmable Logic and Applications, FPL 2021, Dresden, Germany, August 30 - Sept. 3, 2021 |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Grace Zgheib, Yu Shen Lu, Ilya Ganusov |
Clock Skew Scheduling: Avoiding the Runtime Cost of Mixed-Integer Linear Programming. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Yunhui Qiu, Wenbo Yin, Lingli Wang |
A High-performance Open-channel Open-way NAND Flash Controller Architecture. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Jin Hee Kim, Jason Helge Anderson |
Post-LUT-Mapping Implementation of General Logic on Carry Chains Via a MIG-Based Circuit Representation. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Langhammer, Simon Finn, Sergey Gribok, Bogdan Pasca 0001 |
Dense FPGA Compute Using Signed Byte Tuples. |
FPL |
2021 |
DBLP DOI BibTeX RDF |
|
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