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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 34 occurrences of 32 keywords
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Results
Found 149 publication records. Showing 149 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Marco Cornero, Roberto Costa, Ricardo Fernández Pascual, Andrea C. Ornstein, Erven Rohou |
An Experimental Environment Validating the Suitability of CLI as an Effective Deployment Format for Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings, pp. 130-144, 2008, Springer, 978-3-540-77559-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Common Language Infrastructure, embedded systems, deployment, GCC |
1 | Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero |
MLP-Aware Dynamic Cache Partitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings, pp. 337-352, 2008, Springer, 978-3-540-77559-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
1 | Yosi Ben-Asher, Omer Boehm, Daniel Citron, Gadi Haber, Moshe Klausner, Roy Levin, Yousef Shajrawi |
Aggressive Function Inlining: Preventing Loop Blockings in the Instruction Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings, pp. 384-397, 2008, Springer, 978-3-540-77559-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
1 | Frederik Vandeputte, Lieven Eeckhout |
Phase Complexity Surfaces: Characterizing Time-Varying Program Behavior. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings, pp. 320-334, 2008, Springer, 978-3-540-77559-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
1 | Roy Levin, Ilan Newman, Gadi Haber |
Complementing Missing and Inaccurate Profiling Using a Minimum Cost Circulation Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings, pp. 291-304, 2008, Springer, 978-3-540-77559-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Circulations, Real-time, Sampling, Profiling, Control Flow, Flow network |
1 | Yiannakis Sazeides, Andreas Moustakas, Kypros Constantinides, Marios Kleanthous |
The Significance of Affectors and Affectees Correlations for Branch Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings, pp. 243-257, 2008, Springer, 978-3-540-77559-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
1 | Filip Blagojevic, Xizhou Feng, Kirk W. Cameron, Dimitrios S. Nikolopoulos |
Modeling Multigrain Parallelism on Heterogeneous Multi-core Processors: A Case Study of the Cell BE. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings, pp. 38-52, 2008, Springer, 978-3-540-77559-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
1 | Thomas M. Conte |
Keynote: Insight, Not (Random) Numbers: An Embedded Perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 3, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Johnny Huynh, José Nelson Amaral, Paul Berube, Sid Ahmed Ali Touati |
Evaluation of Offset Assignment Heuristics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 261-275, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | I-Wei Wu, Shih-Chia Huang, Chung-Ping Chung, Jean Jyh-Jiun Shann |
Instruction Set Extension Generation with Considering Physical Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 291-305, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Pipestage Timing Constraint, ASIP, Instruction set extension, Extensible Processors |
1 | Apala Guha, Kim M. Hazelwood, Mary Lou Soffa |
Reducing Exit Stub Memory Consumption in Code Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 87-101, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Phillip Stanley-Marbell, Diana Marculescu |
Sunflower : Full-System, Embedded Microarchitecture Evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 168-182, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Koen De Bosschere, David R. Kaeli, Per Stenström, David B. Whalley, Theo Ungerer (eds.) |
High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![Springer, 978-3-540-69337-6 The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Lixia Liu, Xiao-Feng Li, Michael K. Chen, Roy Dz-Ching Ju |
A Throughput-Driven Task Creation and Mapping for Network Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 227-241, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Intel IXP, Task Creation and Mapping, Throughput, Network Processors, Dataflow Programming |
1 | Hans Vandierendonck, André Seznec |
Fetch Gating Control Through Speculative Instruction Window Weighting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 120-135, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Georgios Keramidas, Polychronis Xekalakis, Stefanos Kaxiras |
Applying Decay to Reduce Dynamic Power in Set-Associative Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 38-53, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Jun Yan 0008, Wei Zhang 0002 |
Virtual Registers: Reducing Register Pressure Without Enlarging the Register File. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 57-70, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Major Bhadauria, Sally A. McKee, Karan Singh, Gary S. Tyson |
Leveraging High Performance Data Cache Techniques to Save Power in Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 23-37, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Sonia López, Steve Dropsho, David H. Albonesi, Oscar Garnica, Juan Lanchares |
Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 136-150, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Simon Kluyskens, Lieven Eeckhout |
Branch History Matching: Branch Predictor Warmup for Sampled Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 153-167, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Weihaw Chuang, Satish Narayanasamy, Brad Calder, Ranjit Jhala |
Bounds Checking with Taint-Based Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 71-86, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Klaas L. Hofstra, Sabih H. Gerez |
Arx: A Toolset for the Efficient Simulation and Direct Synthesis of High-Performance Signal Processing Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 215-226, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Mazen A. R. Saghir, Mohamad El-Majzoub, Patrick Akl |
Customizing the Datapath and ISA of Soft VLIW Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 276-290, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Vijay Nagarajan, Rajiv Gupta 0001, Arvind Krishnaswamy |
Compiler-Assisted Memory Encryption for Embedded Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 7-22, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Chang-Ching Yeh, Kuei-Chung Chang, Tien-Fu Chen, Chingwei Yeh |
Reducing Branch Misprediction Penalties Via Adaptive Pipeline Scaling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 105-119, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Paolo D'Alberto, Markus Püschel, Franz Franchetti |
Performance/Energy Optimization of DSP Transforms on the XScale Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 201-214, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Chunling Hu, Daniel A. Jiménez, Ulrich Kremer |
Efficient Program Power Behavior Characterization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 183-197, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Grigori Fursin, John Cavazos, Michael F. P. O'Boyle, Olivier Temam |
MiDataSets: Creating the Conditions for a More Realistic Evaluation of Iterative Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 245-260, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | David Moloney, Dermot Geraghty, Colm McSweeney, Ciarán McElroy |
Streaming Sparse Matrix Compression/Decompression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 116-129, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Thomas M. Conte, Nacho Navarro, Wen-mei W. Hwu, Mateo Valero, Theo Ungerer (eds.) |
High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![Springer, 3-540-30317-0 The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Pedro Javier García, José Flich, José Duato, Ian Johnson, Francisco J. Quiles 0001, Finbar Naven |
Dynamic Evolution of Congestion Trees: Analysis and Impact on Switch Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 266-285, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Hyunseok Lee, Yuan Lin 0002, Yoav Harel, Mark Woh, Scott A. Mahlke, Trevor N. Mudge, Krisztián Flautner |
Software Defined Radio - A High Performance Embedded Challenge. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 6-26, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Weidong Shi, Chenghuai Lu, Hsien-Hsin S. Lee |
Memory-Centric Security Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 153-168, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Abdulhadi Shoufan, Sorin A. Huss, Murtuza Cutleriwala |
A Novel Batch Rekeying Processor Architecture for Secure Multicast Key Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 169-183, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Dries Buytaert, Kris Venstermans, Lieven Eeckhout, Koen De Bosschere |
Garbage Collection Hints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 233-248, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Gansha Wu, Xin Zhou, Guei-Yuan Lueh, Jesse Z. Fang, Peng Guo, Jinzhan Peng, Victor Ying |
XAMM: A High-Performance Automatic Memory Management System with Memory-Constrained Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 130-149, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Markus Levy |
Using EEMBC Benchmarks to Understand Processor Behavior in Embedded Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 3-4, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Grigori Fursin, Albert Cohen 0001, Michael F. P. O'Boyle, Olivier Temam |
A Practical Method for Quickly Evaluating Program Optimizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 29-46, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Michael Van Biesbrouck, Lieven Eeckhout, Brad Calder |
Efficient Sampling Startup for Sampled Processor Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 47-67, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Jinpyo Kim, Sreekumar V. Kodakara, Wei-Chung Hsu, David J. Lilja, Pen-Chung Yew |
Dynamic Code Region (DCR) Based Program Phase Tracking and Prediction for Dynamic Optimizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 203-217, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Bengu Li, Ganesh Venkatesh, Brad Calder, Rajiv Gupta 0001 |
Exploiting a Computation Reuse Cache to Reduce Energy in Network Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 251-265, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Mahadevan Gomathisankaran, Akhilesh Tyagi |
Arc3D: A 3D Obfuscation Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 184-199, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Victor Moya Del Barrio, Carlos González, Jordi Roca, Agustín Fernández, Roger Espasa |
A Single (Unified) Shader GPU Microarchitecture for Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 286-301, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Per Stenström |
The Chip-Multiprocessing Paradigm Shift: Opportunities and Challenges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 5, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Sebastian Pop, Albert Cohen 0001, Georges-André Silber |
Induction Variable Analysis with Delayed Abstractions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 218-232, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Ke Ning, David R. Kaeli |
Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 87-101, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
embedded systems, Power-aware, external memory, media processor, bus arbitration |
1 | Michael J. Geiger, Sally A. McKee, Gary S. Tyson |
Beyond Basic Region Caching: Specializing Cache Structures for High Performance and Energy Conservation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 102-115, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Hyun-Gyu Kim, Hyeong-Cheol Oh |
A Low-Power DSP-Enhanced 32-Bit EISC Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 302-316, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Jia Yu 0008, Jun Yang 0002, Shaojie Chen, Yan Luo, Laxmi N. Bhuyan |
Enhancing Network Processor Simulation Speed with Statistical Input Sampling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 68-83, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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