Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Nagadastagiri Challapalle, Vijaykrishnan Narayanan |
Performance Evaluation of Video Analytics Workloads on Emerging Processing-In-Memory Architectures. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Ataberk Olgun, Juan Gómez-Luna, Konstantinos Kanellopoulos, Behzad Salami 0001, Hasan Hassan, Oguz Ergin, Onur Mutlu |
PiDRAM: An FPGA-based Framework for End-to-end Evaluation of Processing-in-DRAM Techniques. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Haroon Waris, Chenghua Wang, Weiqiang Liu 0001 |
Architectural-Space Exploration of Energy-Efficient Approximate Arithmetic Units for Error-Tolerant Applications. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Dionysios Filippas, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos |
LeapConv: An Energy-Efficient Streaming Convolution Engine with Reconfigurable Stride. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Martha Schnieber, Saman Fröhlich, Rolf Drechsler |
Polynomial Formal Verification of Approximate Functions. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Ayush Arunachalam, Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Kanad Basu |
Fault Resilience of DNN Accelerators for Compressed Sensor Inputs. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Nikhil Rangarajan, Satwik Patnaik, Mohammed Nabeel 0001, Mohammed Ashraf, Shubham Rai, Gopal Raut, Heba Abunahla, Baker Mohammad, Santosh Kumar Vishvakarma, Akash Kumar 0001, Johann Knechtel, Ozgur Sinanoglu |
SCRAMBLE: A Secure and Configurable, Memristor-Based Neuromorphic Hardware Leveraging 3D Architecture. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Kumari Suravi, Rahul Shrestha |
High-Throughput VLSI Architecture for LDPC Decoder Based on Low-Latency Decoding Technique for Wireless Communication Systems. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Yu Wang 0002, Shulin Zeng, Kaiyuan Guo, Xuefei Ning, Yali Zhao, Zhongyuan Qiu, Changcheng Tang, Shuang Liang 0010, Huazhong Yang |
Efficient Autonomous Driving System Design: From Software to Hardware. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Vojtech Mrazek |
Optimization of BDD-based Approximation Error Metrics Calculations. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Febin Sunny, Mahdi Nikdast, Sudeep Pasricha |
RecLight: A Recurrent Neural Network Accelerator with Integrated Silicon Photonics. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Alessio Carpegna, Alessandro Savino, Stefano Di Carlo |
Spiker: an FPGA-optimized Hardware accelerator for Spiking Neural Networks. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Farhad Merchant |
Security as an Important Ingredient in Neuromorphic Engineering. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Alberto Bosio, Bastien Deveautour, Ian O'Connor |
Exploiting Approximate Computing for Efficient and Reliable Convolutional Neural Networks. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Shivani Maurya, Ziaul Choudhury, Suresh Purini |
Accuracy Configurable FPGA Implementation of Harris Corner Detection. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Gang Mao, Alex Yakovlev, Fei Xia, Shengqi Yu, Rishad A. Shafik |
Automated Mapping of Asynchronous Circuits on FPGA under Timing Constraints. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Qazi Arbab Ahmed, Marco Platzner |
On the Detection and Circumvention of Bitstream-level Trojans in FPGAs. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Shalini Singh, Pavan Kumar Pothula, Madhav Rao |
Design and Evaluation of On-chip DCT accelerators based on Novel Approximate Reverse Carry Propagate Adders. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Arjun Chaudhuri, Jonti Talukdar, Krishnendu Chakrabarty |
Probabilistic Fault Grading for AI Accelerators using Neural Twins. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Fernando Fernandes dos Santos, Paolo Rech, Angeliki Kritikakou, Olivier Sentieys |
Evaluating the Impact of Mixed-Precision on Fault Propagation for Deep Neural Networks on GPUs. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Jitka Kocnová, Zdenek Vasícek |
Delay-aware evolutionary optimization of digital circuits. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Geraldo F. Oliveira, Amirali Boroumand, Saugata Ghose, Juan Gómez-Luna, Onur Mutlu |
Heterogeneous Data-Centric Architectures for Modern Data-Intensive Applications: Case Studies in Machine Learning and Databases. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Eduarde D. Brandão, Joao P. Nespolo, Renato D. Peralta, Paulo F. Butzen, André Inácio Reis |
Possible Reductions to Generate circuits from BDDs. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Paul-Antoine Matrangolo, Cédric Marchand 0002, David Navarro, Ian O'Connor |
Hardware Emulation of FeFET On FPGA. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | |
IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2022, Nicosia, Cyprus, July 4-6, 2022 |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Christina Giannoula, Ivan Fernandez, Juan Gómez-Luna, Nectarios Koziris, Georgios I. Goumas, Onur Mutlu |
SparseP: Efficient Sparse Matrix Vector Multiplication on Real Processing-In-Memory Architectures. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Laavanya Rachakonda, Daniel T. Marchand |
Fall-Sense: An Enhanced Sensor System to Predict and Detect Elderly Falls using IoMT. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Joseph Clark, Himanshu Thapliyal, Travis S. Humble |
A Novel Approach to Quantum Circuit Partitioning. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Nikhil Saxena, Ranga Vemuri |
ISPLock: A Hybrid Internal State Locking Method Using Polymorphic Gates. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Taisei Ichikawa, Yutaka Masuda, Tohru Ishihara, Akihiko Shinya, Masaya Notomi |
Optoelectronic Implementation of Compact and Power-efficient Recurrent Neural Networks. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Amir Ali Pour, Fatemeh Afghah, David Hély, Vincent Beroulle, Giorgio Di Natale |
Secure PUF-based Authentication and Key Exchange Protocol using Machine Learning. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Saugata Ghose |
The Road to Widely Deploying Processing-in-Memory: Challenges and Opportunities. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Shamiul Alam, Md. Mazharul Islam 0006, Akhilesh Jaiswal 0001, Nathaniel C. Cady, Garrett S. Rose, Ahmedullah Aziz |
Variation-aware Design Space Exploration of Mott Memristor-based Neuristors. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Deepak Puthal, Ernesto Damiani, Saraju P. Mohanty |
Secure and Scalable Collaborative Edge Computing using Decision Tree. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Manasa Leela Gummadavelly, Haymanot Gebre-Amlak, Henry Zhu, Sejun Song, Baek-Young Choi |
CosMos: Building A Network Reliability Cost Modeling System for Customer SLA. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Abhijit Das 0002, John Jose |
Designing Data-Aware Network-on-Chip for Performance. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Qing Lu, Weiwen Jiang, Meng Jiang, Jingtong Hu, Yiyu Shi 0001 |
Hardware/Software Co-Exploration for Graph Neural Architectures on FPGAs. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Jun Feng 0008, Shixi Chen, Jiaxu Zhang, Yuxiang Fu, Jiang Xu 0001 |
Energy-Efficient High-Performance Photonic Backplane Network for Rack-Scale Computing Systems. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Evanthia Faliagka, Christos Panagiotou, Christos P. Antonopoulos, Georgios Keramidas, Nikolaos S. Voros |
A Novel Marketplace Perspective Promoting Customized Low Energy Computing and IoT: The SMART4ALL Approach. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Juan Gómez-Luna, Yuxin Guo, Sylvan Brocard, Julien Legriel, Remy Cimadomo, Geraldo F. Oliveira, Gagandeep Singh 0002, Onur Mutlu |
Machine Learning Training on a Real Processing-in-Memory System. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Adeboye Stephen Oyeniran, Maksim Jenihhin, Jaan Raik, Raimund Ubar |
High-Level Fault Diagnosis in RISC Processors with Implementation-Independent Functional Test. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Samiksha Agarwal, Smruti R. Sarangi |
HAJPAQUE: Hardware Accelerator for JSON Parsing, Querying and Schema Validation. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Josie E. Rodriguez Condia, Riccardo Faggiano, Matteo Sonza Reorda |
Microarchitectural Reliability Evaluation of a Block Scheduling Controller in GPUs. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Nikita Acharya, Samah Mohamed Saeed |
Automated Flag Qubit Insertion for Reliable Quantum Circuit Output. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Danylo Lykov, Yuri Alexeev |
Importance of Diagonal Gates in Tensor Network Simulations. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Mohammed E. Elbtity, Abhishek Singh, Brendan Reidy, Xiaochen Guo, Ramtin Zand |
An In-Memory Analog Computing Co-Processor for Energy-Efficient CNN Inference on Mobile Devices. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Jonas Krautter, Mehdi B. Tahoori |
Neural Networks as a Side-Channel Countermeasure: Challenges and Opportunities. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Liancheng Jia, Zizhang Luo, Liqiang Lu, Yun Liang 0001 |
Analyzing the Design Space of Spatial Tensor Accelerators on FPGAs. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Mottaqiallah Taouil, Cezar Reinbrecht, Said Hamdioui, Johanna Sepúlveda |
LightRoAD: Lightweight Rowhammer Attack Detector. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Krithika Dhananjay, Emre Salman |
EQUAL: Efficient QUasi Adiabatic Logic for Enhanced Side-Channel Resistance. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Shiv Chandra Kumar, Siddharth R. K., Nithin Kumar Y. B., M. H. Vasantha |
A 1-V, 10-bit, 250 MS/s, Current-Steering Segmented DAC for Video Applications. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Muhammad Awais 0009, Marco Platzner |
MCTS-based Synthesis Towards Efficient Approximate Accelerators. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Yuk Wong 0001, Zhenjiang Dong, Wei Zhang |
Low Bitwidth CNN Accelerator on FPGA Using Winograd and Block Floating Point Arithmetic. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Rajdeep Kumar Nath, Himanshu Thapliyal, Travis S. Humble |
Quantum Annealing for Automated Feature Selection in Stress Detection. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Adrian Tatulian, Ronald F. DeMara |
A Reconfigurable and Compact Spin-Based Analog Block for Generalizable nth Power and Root Computation. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Oumarou Oumarou, Alexandru Paler, Robert Basmadjian |
Fast quantum circuit simulation using hardware accelerated general purpose libraries. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | John Reuben, Dietmar Fey |
Carry-free Addition in Resistive RAM Array: n-bit Addition in 22 Memory Cycles. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Subashree Raja, Padmaja Bhamidipati, Xiaobang Liu, Ranga Vemuri |
Security Capsules: An Architecture for Post-Silicon Security Assertion Validation for Systems-on-Chip. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Sajjad Parvin, Mustafa Altun |
A Study on Hardware-Aware Training Techniques for Feedforward Artificial Neural Networks. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Deepraj Soni, Ramesh Karri |
Efficient Hardware Implementation of PQC Primitives and PQC algorithms Using High-Level Synthesis. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Fabian Kempf, Thomas Hartmann, Steffen Baehr, Jürgen Becker 0001 |
An Adaptive Lockstep Architecture for Mixed-Criticality Systems. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Ryosuke Matsuo, Shin-ichi Minato |
BDD Variable Ordering for Minimizing Power Consumption of Optical Logic Circuits. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Adam Z. Foshie, Nishith N. Chakraborty, John J. Murray, Tanner J. Fowler, Mst Shamim Ara Shawkat, Garrett S. Rose |
A Multi-Context Neural Core Design for Reconfigurable Neuromorphic Arrays. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Sukanta Dey, Sukumar Nandi, Gaurav Trivedi |
Machine Learning for VLSI CAD: A Case Study in On-Chip Power Grid Design. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Kuiqing He, Zhi Yang, Zhitai Yu, Jianglong Zhi, Zhaohao Wang, Yijiao Wang |
Proposal of A Novel Hybrid NAND-Like MRAM/DRAM Memory Architecture. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Siyuan Niu, Aida Todri-Sanial |
Analyzing crosstalk error in the NISQ era. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Shakil Mahmud, Brooks Olney, Robert Karam |
An Extensible Evaluation Platform for FPGA Bitstream Obfuscation Security. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Marina Yushkova, Alberto Sánchez 0004, Angel de Castro |
Improved Polygon Method for HIL Simulations in Real Time. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Matthew Lewandowski, Srinivas Katkoori |
Enhancing PRESENT-80 and Substitution-Permutation Network Cipher Security with Dynamic "Keyed" Permutation Networks. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Joel Mandebi Mbongue, Sujan Kumar Saha, Christophe Bobda |
A Security Architecture for Domain Isolation in Multi-Tenant Cloud FPGAs. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Zachary Kahleifeh, Himanshu Thapliyal |
Low-Energy and CPA-Resistant Adiabatic CMOS/MTJ Logic for IoT Devices. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Mahdi Zahedi, Remon van Duijnen, Stephan Wong, Said Hamdioui |
Tile Architecture and Hardware Implementation for Computation-in-Memory. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Seungseok Nam, Emil Matús, Gerhard P. Fettweis |
Minimized Region of Path-search Algorithm for ASIP-based Connection Allocator in NoCs. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Bradley Comar |
Implementation of a QPSK Symbol Synchronizer in Xilinx System Generator. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Shaya Wolf, Hui Hu, Rafer Cooley, Mike Borowczak |
Stealing Machine Learning Parameters via Side Channel Power Attacks. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | William Unger, Liljana Babinkostova, Mike Borowczak, Robert Erbes |
Side-channel Leakage Assessment Metrics: A Case Study of GIFT Block Ciphers. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Mohammadreza Esmali Nojehdeh, Sajjad Parvin, Mustafa Altun |
Efficient Hardware Implementation of Convolution Layers Using Multiply-Accumulate Blocks. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Yassmeen Elderhalli, Nahla A. El-Araby, Osman Hasan, Axel Jantsch, Sofiène Tahar |
Dynamic Fault Tree Models for FPGA Fault Tolerance and Reliability. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Meriam Gay Bautista, Zhi Jackie Yao, Anastasiia Butko, Mariam Kiran, Mekena Metcalf |
Towards Automated Superconducting Circuit Calibration using Deep Reinforcement Learning. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Chris Collinsworth, Sayed Ahmad Salehi |
Stochastic Number Generators with Minimum Probability Conversion Circuits. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Md Rubel Ahmed, Hao Zheng 0001, Parijat Mukherjee, Mahesh C. Ketkar, Jin Yang 0006 |
A Comparative Study of Specification Mining Methods for SoC Communication Traces. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Corentin Delacour, Stefania Carapezzi, Madeleine Abernot, Gabriele Boschetto, Nadine Azémard, Jérémie Salles, Thierry Gil, Aida Todri-Sanial |
Oscillatory Neural Networks for Edge AI Computing. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Supreeth Mysore Shivanandamurthy, Ishan G. Thakkar, Sayed Ahmad Salehi |
ATRIA: A Bit-Parallel Stochastic Arithmetic Based Accelerator for In-DRAM CNN Processing. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Rajdeep Kumar Nath, Himanshu Thapliyal |
Wearable Health Monitoring System for Older Adults in a Smart Home Environment. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Rahul Thapa, Dongning Ma, Xun Jiao |
HDXplore: Automated Blackbox Testing of Brain-Inspired Hyperdimensional Computing. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Sandeep Sunkavilli, Zhiming Zhang, Qiaoyan Yu |
New Security Threats on FPGAs: From FPGA Design Tools Perspective. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Harideep Nair, John Paul Shen, James E. Smith 0001 |
A Microarchitecture Implementation Framework for Online Learning with Temporal Neural Networks. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Shatadal Chatterjee, Maryaradhiya Daimari, Sounak Roy |
A Fully Digital Foreground Calibration Technique of A Flash ADC. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Wei Zeng 0015, Azadeh Davoodi, Rasit Onur Topaloglu |
Lorax: Machine Learning-Based Oracle Reconstruction With Minimal I/O Patterns. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Keyue Deng, Hangxuan Cui, Jun Lin 0001, Zhongfeng Wang 0001 |
Counter Random Gradient Descent Bit-Flipping Decoder for LDPC Codes. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Quang-Linh Nguyen, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre |
On Preventing SAT Attack with Decoy Key-Inputs. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Tongtong Yin, Wendong Mao, Jinming Lu, Zhongfeng Wang 0001 |
A Reconfigurable Accelerator for Generative Adversarial Network Training Based on FPGA. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Mohammad Ebrahimabadi, Wassila Lalouani, Mohamed F. Younis, Naghmeh Karimi |
Countering PUF Modeling Attacks through Adversarial Machine Learning. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Mateus Saquetti, Raphael Martins Brum, Bruno Zatt, Samuel Pagliarini, Weverton Cordeiro, José Rodrigo Azambuja |
A Terabit Hybrid FPGA-ASIC Platform for Switch Virtualization. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Sachin Bhat, Mingyu Li, Sounak Shaun Ghosh, Sourabh Kulkarni, Csaba Andras Moritz |
SkyBridge-3D-CMOS 2.0: IC Technology for Stacked-Transistor 3D ICs beyond FinFETs. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Shijin Duan, Wenhao Wang, Yukui Luo, Xiaolin Xu |
A Survey of Recent Attacks and Mitigation on FPGA Systems. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Martha Schnieber, Saman Fröhlich, Rolf Drechsler |
Depth Optimized Synthesis of Symmetric Boolean Functions. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Mahboobe Sadeghipour Roodsari, Hanieh Totonchi Asl, Zainalabedin Navabi |
n-DiCE-LSTM: An n-Dimensional Configurable and Efficient Architecture for LSTM Accelerator. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | Ke Huang 0001, Md Toufiq Hasan Anik, Xinqiao Zhang, Naghmeh Karimi |
Real-Time IC Aging Prediction via On-Chip Sensors. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
1 | |
IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2021, Tampa, FL, USA, July 7-9, 2021 |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|