| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Osvaldo Navarro, Tim Leiding, Michael Hübner 0001 |
Configurable cache tuning with a victim cache.  |
ReCoSoC  |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Stefan Werner 0002, Dennis Heinrich, Jannik Piper, Sven Groppe, Rico Backasch, Christopher Blochwitz, Thilo Pionteck |
Automated composition and execution of hardware-accelerated operator graphs. |
ReCoSoC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | |
10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2015, Bremen, Germany, June 29 - July 1, 2015 |
ReCoSoC |
2015 |
DBLP BibTeX RDF |
|
| 1 | Byron Navas, Ingo Sander, Johnny Öberg |
Towards cognitive reconfigurable hardware: Self-aware learning in RTR fault-tolerant SoCs. |
ReCoSoC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Fynn Schwiegelshohn, Lars Gierke, Michael Hübner 0001 |
FPGA based traffic sign detection for automotive camera systems. |
ReCoSoC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Rémy Druyer, Lionel Torres, Pascal Benoit, Paul-Vincent Bonzom, Patrick Le-Quéré |
A survey on security features in modern FPGAs. |
ReCoSoC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Marco A. Z. Alves, Paulo C. Santos 0001, Matthias Diener, Luigi Carro |
Reconfigurable Vector Extensions inside the DRAM. |
ReCoSoC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Robin Bonamy, Sébastien Bilavarn, Fabrice Muller |
An energy-aware scheduler for dynamically reconfigurable multi-core systems. |
ReCoSoC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Christian de Schryver |
Towards run-time flexible risk management systems on hybrid platforms. |
ReCoSoC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Cédric Lichtenau |
Beyond many-core: Commercial workload acceleration in high-end systems. |
ReCoSoC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Javier Mora 0001, Andrés Otero, Eduardo de la Torre, Teresa Riesgo |
Fast and compact evolvable systolic arrays on dynamically reconfigurable FPGAs. |
ReCoSoC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Charlotte Frenkel, Jean-Didier Legat, David Bol |
A Partial Reconfiguration-based scheme to mitigate Multiple-Bit Upsets for FPGAs in low-cost space applications. |
ReCoSoC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Wolfgang Büter, Yanqiu Huang, Daniel Gregorek, Alberto García Ortiz |
A decentralised, autonomous, and congestion-aware thermal monitoring infrastructure for photonic network-on-chip. |
ReCoSoC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Fabien Clermidy, O. Turkyimaz, Olivier Billoint, Pierre-Emmanuel Gaillardon |
3D technologies for reconfigurable architectures. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Mokhtar Bouain, Venkatasubramanian Viswanathan, Rabie Ben Atitallah, Jean-Luc Dekeyser |
Communication-centric design for FMC based I/O system. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Guy Wassi, Mohamed El Amine Benkhelifa, Geoff Lawday, François Verdier, Samuel Garcia |
Multi-shape tasks scheduling for online multitasking on FPGAs. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Kris Heid, Haoyuan Ying, Christian Hochberger, Klaus Hofmann |
LatEst: Latency estimation and high speed evaluation for wormhole switched Networks-on-Chip. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Pierre-Emmanuel Gaillardon, Xifan Tang, Giovanni De Micheli |
Novel configurable logic block architecture exploiting controllable-polarity transistors. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexandre Ingles da Silva, Fábio Dacêncio Pereira |
Sram-Based FPGA proposal for dynamic power management on sensor node. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Ping-Chun Lee, Ing-Jer Huang |
Reconfigurable Bus Monitor Tool Suite for on-chip SoC for performance and protocol monitoring. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Chuan Shan, Dimitri Galayko, François Anceau, Eldar Zianbetov |
A reconfigurable distributed architecture for clock generation in large many-core SoC. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Arnaud Vena, Brice Sorli, Alain Foucaran, Yassin Belaizi |
A RFID-enabled sensor platform for pervasive monitoring. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Maha Kooli, Pascal Benoit, Giorgio Di Natale, Lionel Torres, Volkmar Sieh |
Fault injection tools based on Virtual Machines. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Gregor Rebel, Francisco J. Estévez, Ioanna Tsekoura, Ingo Schulz, Peter Glösekötter |
Interrupt aware queue implementation for energy efficient multitasking systems based on Cortex-M3 architecture. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Faycal Ait Aouda, Kevin Marquet, Guillaume Salagnac |
Incremental checkpointing of program state to NVRAM for transiently-powered systems. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Baqar Raza, Husain Parvez, Muhammad Mohiuddin |
Exploring alternate trade-offs of placement quality versus runtime in Simulated Annealing algorithm. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Piotr Dziurzanski, Hashem Ali Ghazzawi, Leandro Soares Indrusiak |
Feedback-based admission control for task allocation. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Philipp Wehner, Christina Piberger, Diana Göhringer |
Using JSON to manage communication between services in the Internet of Things. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Fynn Schwiegelshohn, Michael Hübner 0001 |
An application scenario for dynamically reconfigurable FPGAs. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Jaime Correa Rodriguez, Kurt Franz Ackermann |
Leveraging partial dynamic reconfiguration on Zynq SoC FPGAs. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Haoyuan Ying, Thomas Hollstein, Klaus Hofmann |
A hardware/software co-design reconfigurable Network-on-Chip FPGA emulation method. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Ioanna Tsekoura, Gregor Rebel, Peter Glösekötter, Mladen Berekovic |
An evaluation of energy efficient microcontrollers. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Sophiane Senni, Lionel Torres, Gilles Sassatelli, Anastasiia Butko, Bruno Mussard |
Power efficient Thermally Assisted Switching Magnetic memory based memory systems. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Bharath Sudev, Leandro Soares Indrusiak |
Low overhead predictability enhancement in non-preemptive network-on-chip routers using Priority Forwarded Packet Splitting. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas Carle, Manel Djemal, Daniela Genius, François Pêcheux, Dumitru Potop-Butucaru, Robert de Simone, Franck Wajsbürt, Zhen Zhang |
Reconciling performance and predictability on a many-core through off-line mapping. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Alfonso Rodríguez 0002, Juan Valverde, Eduardo de la Torre, Teresa Riesgo |
Dynamic management of multikernel multithread accelerators using Dynamic Partial Reconfiguration. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | |
9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip, ReCoSoC 2014, Montpellier, France, May 26-28, 2014 |
ReCoSoC |
2014 |
DBLP BibTeX RDF |
|
| 1 | Parham Haririan, Alberto García Ortiz |
Non-intrusive DVFS emulation in gem5 with application to self-aware architectures. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Laurent Gantel, Mohamed El Amine Benkhelifa, François Verdier, Fabrice Lemonnier |
MRAPI resource management layer on reconfigurable systems-on-chip. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Sébastien Le Beux, Hui Li 0034, Gabriela Nicolescu, Ian O'Connor |
A reconfigurable optical network on chip for streaming applications. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Moslem Amiri, Vaclav Prenosil |
General solutions for MTTF and steady-state availability of NMR systems. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas Schuster, Rolf Meyer, Rainer Buchty, Luca Fossati, Mladen Berekovic |
SoCRocket - A virtual platform for the European Space Agency's SoC development. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Fatma Karray, Mohamed Wassim Jmal, Mohamed Abid, Mohammed S. BenSaleh, Abdulfattah Mohammad Obeid |
A review on wireless sensor node architectures. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad Amin Qureshi, Husain Parvez |
Design-space exploration between FPGA and ASIF. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul James Fox, A. Theodore Markettos, Simon W. Moore |
Reliably prototyping large SoCs using FPGA clusters. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohamed Amine Boussadi, Thierry Tixier, Alexis Landrault, Jean-Pierre Dérutin |
HNCP-II: A 16-core 65nm microprocessor ASIC for image processing algorithms. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Abdelkarim Cherkaoui, Lilian Bossuet, Ludwig Seitz, Göran Selander, Ravishankar Borgaonkar |
New paradigms for access control in constrained environments. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Christof Osewold, Wolfgang Büter, Alberto García Ortiz |
A coding-based configurable and asymmetrical redundancy scheme for 3-D interconnects. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Ali Ahari, Hossein Asadi 0001, Mehdi Baradaran Tahoori |
Emerging Non-Volatile Memory technologies for future low power reconfigurable systems. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Loïc Lagadec, Jean-Christophe Le Lann, Théotime Bollengier |
A prototyping platform for virtual reconfigurable units. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Yunfeng Ma, M. Norazizi Sham Mohd Sayuti, Leandro Soares Indrusiak |
Inexact End-to-End Response Time Analysis as fitness function in search-based task allocation heuristics for hard real-time network-on-chips. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Ning Ma, Zhuo Zou, Zhonghai Lu, Li-Rong Zheng 0001, Stefan Blixt |
A hierarchical reconfigurable micro-coded multi-core processor for IoT applications. |
ReCoSoC |
2014 |
DBLP DOI BibTeX RDF |
|
| 1 | Christian Stüllein, Norbert Abel, Udo Kebschull |
Bitfile preservation - Generation of reusable out of context modules. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Riccardo Cattaneo, Xinyu Niu, Christian Pilato, Tobias Becker, Wayne Luk, Marco D. Santambrogio |
A framework for effective exploitation of partial reconfiguration in dataflow computing. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexander Wold, Dirk Koch, Jim Tørresen |
Component based design using constraint programming for module placement on FPGAs. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexander Logvinenko, Carsten Gremzow, Dietmar Tutsch |
RecMIN: A reconfiguration architecture for network on chip. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Qian Zhao 0001, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi |
An FPGA design and implementation framework combined with commercial VLSI CADs. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Matthias Hiller, Georg Sigl, Michael Pehl |
A new model for estimating bit error probabilities of Ring-Oscillator PUFs. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Jesús Carabaño, Francisco Dios, Masoud Daneshtalab, Masoumeh Ebrahimi |
An exploration of heterogeneous systems. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Anup Das 0001, Amit Kumar Singh 0002, Akash Kumar 0001 |
Energy-aware dynamic reconfiguration of communication-centric applications for reliable MPSoCs. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Philipp Gorski, Dirk Timmermann |
Centralized traffic monitoring for online-resizable clusters in Networks-on-Chip. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Marco Ramírez 0001, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila |
Towards a Configurable Many-core Accelerator for FPGA-based embedded systems. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Francesco Robino, Johnny Öberg |
The HeartBeat model: A platform abstraction enabling fast prototyping of real-time applications on NoC-based MPSoC on FPGA. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael Dreschmann, Oliver Sander, Alexander Klimm, Christoph Roth, Jürgen Becker 0001 |
Addiguration: Exploring configuration behavior of Spartan-3 devices. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Maicon A. Sartin, Alexandre C. R. da Silva |
Approximation of hyperbolic tangent activation function using hybrid methods. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Juan Carlos Pena Ramos, Marian Verhelst |
Flexible, ultra-low power sensor nodes through configurable finite state machines. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | James Harbin, Leandro Soares Indrusiak |
Dynamic task remapping for power and latency performance improvement in priority-based non-preemptive Networks On Chip. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Shuo Li 0002, Ahmed Hemani |
Memory allocation and optimization in system-level architectural synthesis. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Christoph Roth, Harald Bucher, Simon Reder, Oliver Sander, Jürgen Becker 0001 |
Improving parallel MPSoC simulation performance by exploiting dynamic routing delay prediction. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Shivam Bhasin, Wei He, Sylvain Guilley, Jean-Luc Danger |
Exploiting FPGA block memories for protected cryptographic implementations. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Dominic Hillenbrand, Yuuki Furuyama, Akihiro Hayashi, Hiroki Mikami, Keiji Kimura, Hironori Kasahara |
Reconciling application power control and operating systems for optimal power and performance. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | |
2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), Darmstadt, Germany, July 10-12, 2013 |
ReCoSoC |
2013 |
DBLP BibTeX RDF |
|
| 1 | Bouthaina Damak, Mouna Baklouti, Smaïl Niar, Mohamed Abid |
Shared hardware accelerator architectures for heterogeneous MPSoCs. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Eduardo Cuevas-Farfan, Miguel Morales-Sandoval, René Cumplido, Claudia Feregrino Uribe, Ignacio Algredo-Badillo |
A programmable FPGA-based cryptoprocessor for bilinear pairings over F2m. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Fabio Cancare, Christian Pilato, Andrea Cazzaniga, Donatella Sciuto, Marco D. Santambrogio |
D-RECS: A complete methodology to implement Self Dynamic Reconfigurable FPGA-based systems. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Kartikeya Bhardwaj, Pravin S. Mane |
ACMA: Accuracy-configurable multiplier architecture for error-resilient System-on-Chip. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Juan M. Campos, René Cumplido, Claudia Feregrino Uribe, Roberto Perez-Andrade |
A parallelization methodology for reconfigurable systems applied to edge detection. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniela Genius |
Measuring memory access latency for software objects in a NUMA system-on-chip architecture. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Ingrid Exurville, Jacques J. A. Fournier, Jean-Max Dutertre, Bruno Robisson, Assia Tria |
Practical measurements of data path delays for IP authentication & integrity verification. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Jörg Walter 0001, Jörg Lenhardt, Wolfram Schiffmann |
SoC performance evaluation with ArchC and TLM-2.0. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Simen Gimle Hansen, Dirk Koch, Jim Tørresen |
Simulation framework for cycle-accurate RTL modeling of partial run-time reconfiguration in VHDL. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Vianney Lapotre, Michael Hübner 0001, Guy Gogniat, Purushotham Murugappa, Amer Baghdadi, Jean-Philippe Diguet |
An efficient on-chip configuration infrastructure for a flexible multi-ASIP turbo decoder architecture. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Kumm, Konrad Möller, Peter Zipf |
Dynamically reconfigurable FIR filter architectures with fast reconfiguration. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Juan Fernando Eusse, Christopher Williams 0004, Rainer Leupers |
CoEx: A novel profiling-based algorithm/architecture co-exploration for ASIP design. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Jens Huthmann, Björn Liebig, Julian Oppermann, Andreas Koch 0001 |
Hardware/software co-compilation with the Nymble system. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | André Himmighofen, Bernhard Jungk, Steffen Reith |
On a FPGA-based method for authentication using Edwards curves. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Gerald Hempel, Jan Hoyer, Thilo Pionteck, Christian Hochberger |
Register allocation for high-level synthesis of hardware accelerators targeting FPGAs. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Bernhard Jungk, Marc Stöttinger |
Among slow dwarfs and fast giants: A systematic design space exploration of KECCAK. |
ReCoSoC |
2013 |
DBLP DOI BibTeX RDF |
|
| 1 | Masoud Daneshtalab, Masoumeh Ebrahimi, Juha Plosila |
GLB - Efficient Global Load Balancing method for moderating congestion in on-chip networks. |
ReCoSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohsin Amin, Mihkel Tagel, Gert Jervan, Thomas Hollstein |
Design methodology for fault-tolerant heterogeneous MPSoC under real-time constraints. |
ReCoSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Dimitris Bekiaris, Efstathios Sotiriou-Xanthopoulos, George Economakos, Dimitrios Soudris |
Systematic design and evaluation of a scalable reconfigurable multiplier scheme for HLS environments. |
ReCoSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicolas Serna, François Verdier |
High-level model of sensor architecture for hardware and software design space exploration. |
ReCoSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Anup Das 0001, Akash Kumar 0001, Bharadwaj Veeravalli |
Fault-tolerant network interface for spatial division multiplexing based Network-on-Chip. |
ReCoSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohamad Sofian Abu Talip, Takayuki Akamine, Yasunori Osana, Naoyuki Fujita, Hideharu Amano |
Dynamically reconfigurable flux limiter functions in MUSCL scheme. |
ReCoSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Adrian Racu, Leandro Soares Indrusiak |
Using genetic algorithms to map hard real-time on NoC-based systems. |
ReCoSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Chiraz Trabelsi, Samy Meftali, Jean-Luc Dekeyser |
Distributed control for reconfigurable FPGA systems: A high-level design approach. |
ReCoSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Ross A. Elliot, Martin A. Enderwitz, Ke He, Faisal Darbari, Louise Crockett, Stephan Weiss 0001, Robert W. Stewart |
Partially reconfigurable TVWS transceiver for use in UK and US markets. |
ReCoSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Mark Milward, David Stevens, Vassilios A. Chouliaras |
Embedded UML design flow to the configurable LE1 MultiCore VLIW processor. |
ReCoSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyprianos Papadimitriou, Charalampos Vatsolakis, Dionisios N. Pnevmatikatos |
Invited paper: Acceleration of computationally-intensive kernels in the reconfigurable era. |
ReCoSoC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Anastasiia Butko, Rafael Garibotti, Luciano Ost, Gilles Sassatelli |
Accuracy evaluation of GEM5 simulator system. |
ReCoSoC |
2012 |
DBLP DOI BibTeX RDF |
|
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