|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 102 occurrences of 72 keywords
|
|
|
Results
Found 117 publication records. Showing 117 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
16 | Amir H. Farrahi, D. T. Lee, Majid Sarrafzadeh |
Two-Way and Multiway Partitioning of a Set of Intervals for Clique-Width Maximization. |
Algorithmica |
1999 |
DBLP DOI BibTeX RDF |
Partitioning, Interval graphs, Sleep mode, Clique-width |
16 | Stephen L. Hary, Füsun Özgüner |
Precedence-Constrained Task Allocation onto Point-to-Point Networks for Pipelined Execution. |
IEEE Trans. Parallel Distributed Syst. |
1999 |
DBLP DOI BibTeX RDF |
real-time systems, Task scheduling, direct networks, message scheduling, pipeline scheduling |
16 | Jan-Yang Chang, Yu-Chen Liu, Ting-Chi Wang |
Faster and Better Spectral Algorithms for Multi-Way Partitioning. |
ASP-DAC |
1999 |
DBLP DOI BibTeX RDF |
|
16 | Jong-Sheng Cherng, Sao-Jie Chen, Chia-Chun Tsai, Jan-Ming Ho |
An Efficient Two-Level Partitioning Algorithm for VLSI Circuits. |
ASP-DAC |
1999 |
DBLP DOI BibTeX RDF |
|
16 | Gregory Tumbush, Dinesh Bhatia |
Clustering to improve bi-partition quality and run time. |
ISCAS (6) |
1999 |
DBLP DOI BibTeX RDF |
|
16 | D. Stroobannt |
PIN count prediction in ratio cut partitioning for VLSI and ULSI. |
ISCAS (6) |
1999 |
DBLP DOI BibTeX RDF |
|
16 | Charles J. Alpert, Jen-Hsin Huang, Andrew B. Kahng |
Multilevel circuit partitioning. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1998 |
DBLP DOI BibTeX RDF |
|
16 | John Marty Emmert, Akash Randhar, Dinesh Bhatia |
Fast Floorplanning for FPGAs. |
FPL |
1998 |
DBLP DOI BibTeX RDF |
|
16 | Jason Cong, Honching Peter Li, Sung Kyu Lim, Toshiyuki Shibuya, Dongmin Xu |
Large scale circuit partitioning with loose/stable net removal and signal flow based clustering. |
ICCAD |
1997 |
DBLP DOI BibTeX RDF |
|
16 | Charles J. Alpert, Jen-Hsin Huang, Andrew B. Kahng |
Multilevel Circuit Partitioning. |
DAC |
1997 |
DBLP DOI BibTeX RDF |
|
16 | Charles J. Alpert, Andrew B. Kahng |
A general framework for vertex orderings with applications to circuit clustering. |
IEEE Trans. Very Large Scale Integr. Syst. |
1996 |
DBLP DOI BibTeX RDF |
|
16 | Jason Cong, Wilburt Labio, Narayanan Shivakumar |
Multiway VLSI circuit partitioning based on dual net representation. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1996 |
DBLP DOI BibTeX RDF |
|
16 | Jih-Shyr Yih, Pinaki Mazumder |
A neural network design for circuit partitioning. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1990 |
DBLP DOI BibTeX RDF |
|
16 | Fillia Makedon, Spyros Tragoudas |
Approximating the minimum net expansion: Near optimal solutions to circuit partitioning problems. |
WG |
1990 |
DBLP DOI BibTeX RDF |
|
16 | Andrew B. Kahng |
Fast Hypergraph Partition. |
DAC |
1989 |
DBLP DOI BibTeX RDF |
|
16 | Jih-Shyr Yih, Pinaki Mazumder |
A Neural Network Design for Circuit Partitioning. |
DAC |
1989 |
DBLP DOI BibTeX RDF |
|
16 | J. Blanks |
Partitioning by Probability Condensation. |
DAC |
1989 |
DBLP DOI BibTeX RDF |
|
Displaying result #101 - #117 of 117 (100 per page; Change: ) Pages: [ <<][ 1][ 2] |
|