Search results for "cmps"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
23	Rajdeep Bhowmik, Chaitali Gupta, Madhusudhan Govindaraju, Aneesh Aggarwal	Efficient XML-Based Grid Middleware Design for Multi-Core Processors.	ICWS	2007	DBLP DOI BibTeX RDF
23	Xudong Shi 0003, Feiqi Su, Jih-Kwon Peir, Ye Xia 0001, Zhen Yang	Modeling and Single-Pass Simulation of CMP Cache Capacity and Accessibility.	ISPASS	2007	DBLP DOI BibTeX RDF	multiple cache organization, single-pass simulation, on-chip storage space, on-chip cache capacity, single-pass stack simulation, global stack, shared stack, per-core private stack, single simulation pass, average memory access time, chip-multiprocessor, data replication, data accessibility, abstract model, reuse distances
23	Sebastian Herbert, Diana Marculescu	Analysis of dynamic voltage/frequency scaling in chip-multiprocessors.	ISLPED	2007	DBLP DOI BibTeX RDF	chip-multiprocessor, dynamic voltage/frequency scaling
23	Mikhail Smelyanskiy, Victor W. Lee, Daehyun Kim 0001, Anthony D. Nguyen, Pradeep Dubey	Scaling performance of interior-point method on large-scale chip multiprocessor system.	SC	2007	DBLP DOI BibTeX RDF
23	Troy A. Johnson, Rudolf Eigenmann, T. N. Vijaykumar	Speculative thread decomposition through empirical optimization.	PPoPP	2007	DBLP DOI BibTeX RDF	empirical search, chip multiprocessor, decomposition, multi-core, thread-level speculation
23	Sanjeev Kumar, Christopher J. Hughes, Anthony D. Nguyen	Carbon: architectural support for fine-grained parallelism on chip multiprocessors.	ISCA	2007	DBLP DOI BibTeX RDF	loop and task parallelism, CMP, architectural support
23	Georgios Keramidas, Pavlos Petoumenos, Stefanos Kaxiras, Alexandros Antonopoulos, Dimitrios N. Serpanos	Preventing Denial-of-Service Attacks in Shared CMP Caches.	SAMOS	2006	DBLP DOI BibTeX RDF
23	Myungho Lee, Yeonseung Ryu, Sugwon Hong, Chungki Lee	Performance Impact of Resource Conflicts on Chip Multi-processor Servers.	PARA	2006	DBLP DOI BibTeX RDF
23	Jack Sampson, Rubén González, Jean-Francois Collard, Norman P. Jouppi, Michael S. Schlansker, Brad Calder	Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers.	MICRO	2006	DBLP DOI BibTeX RDF
23	Stanley L. C. Fung, J. Gregory Steffan	Improving cache locality for thread-level speculation.	IPDPS	2006	DBLP DOI BibTeX RDF
23	Xudong Shi 0003, Zhen Yang, Jih-Kwon Peir, Lu Peng 0001, Yen-Kuang Chen, Victor W. Lee, B. Liang	Coterminous locality and coterminous group data prefetching on chip-multiprocessors.	IPDPS	2006	DBLP DOI BibTeX RDF
23	Dan Wallin, Henrik Löf, Erik Hagersten, Sverker Holmgren	Multigrid and Gauss-Seidel smoothers revisited: parallelization on chip multiprocessors.	ICS	2006	DBLP DOI BibTeX RDF	Gauss-Seidel, temporal blocking, CMP, OpenMP, relaxation, orderings, multigrid, Poisson equation, cache blocking
23	Michela Becchi, Patrick Crowley	Dynamic thread assignment on heterogeneous multiprocessor architectures.	Conf. Computing Frontiers	2006	DBLP DOI BibTeX RDF	simulation, chip multiprocessor, heterogeneous architectures
23	Björn Jäger, Mario Porrmann, Ulrich Rückert 0001	Bio-inspired massively parallel architectures for nanotechnologies.	ISCAS	2006	DBLP DOI BibTeX RDF
23	Michael R. Marty, Jesse D. Bingham, Mark D. Hill, Alan J. Hu, Milo M. K. Martin, David A. Wood 0001	Improving Multiple-CMP Systems Using Token Coherence.	HPCA	2005	DBLP DOI BibTeX RDF
23	Jose Renau, James Tuck 0001, Wei Liu 0014, Luis Ceze, Karin Strauss, Josep Torrellas	Tasking with out-of-order spawn in TLS chip multiprocessors: microarchitecture and compilation.	ICS	2005	DBLP DOI BibTeX RDF
23	Philo Juang, Qiang Wu, Li-Shiuan Peh, Margaret Martonosi, Douglas W. Clark	Coordinated, distributed, formal energy management of chip multiprocessors.	ISLPED	2005	DBLP DOI BibTeX RDF	power, dynamic voltage scaling
23	Kyriakos Stavrou, Pedro Trancoso	TSIC: Thermal Scheduling Simulator for Chip Multiprocessors.	Panhellenic Conference on Informatics	2005	DBLP DOI BibTeX RDF
23	Murali Annavaram, Ed Grochowski, John Paul Shen	Mitigating Amdahl's Law through EPI Throttling.	ISCA	2005	DBLP DOI BibTeX RDF
23	Troy A. Johnson, Rudolf Eigenmann, T. N. Vijaykumar	Min-cut program decomposition for thread-level speculation.	PLDI	2004	DBLP DOI BibTeX RDF	partitioning, chip multiprocessor, thread-level speculation, min-cut, program decomposition
23	Mohamed A. Gomaa, Michael D. Powell, T. N. Vijaykumar	Heat-and-run: leveraging SMT and CMP to manage power density through the operating system.	ASPLOS	2004	DBLP DOI BibTeX RDF	CMP, migration, SMT, heat, power density
23	Venkata Krishnan, Josep Torrellas	The Need for Fast Communication in Hardware-Based Speculative Chip Multiprocessors.	IEEE PACT	1999	DBLP DOI BibTeX RDF	register communication, Chip-multiprocessor, speculative multithreading, data-dependence speculation
19	Mohammad Hashem Haghbayan, Antonio Miele, Onur Mutlu, Juha Plosila	Run-Time Resource Management in CMPs Handling Multiple Aging Mechanisms.	IEEE Trans. Computers	2023	DBLP DOI BibTeX RDF
19	Wangqian Ju, Heike Hofmann	An Open-Source Implementation of the CMPS Algorithm for Assessing Similarity of Bullets.	R J.	2022	DBLP DOI BibTeX RDF
19	Michael Toth, Nataliia Bielova, Vincent Roca	On dark patterns and manipulation of website publishers by CMPs.	Proc. Priv. Enhancing Technol.	2022	DBLP DOI BibTeX RDF
19	Ahmad Siavashi, Mahmoud Momtazpour	Yield-aware joint die packing, die matching and static thread mapping for hard real-time 3D embedded CMPs.	Microprocess. Microsystems	2022	DBLP DOI BibTeX RDF
19	Hemanta Kumar Mondal, Sarnava Konar, Poulomi Hore, Ramapati Patra, Pradipta Sarkar, Sujay Deb	Interconnect support for energy efficient and high bandwidth memory access in CMPs.	Sustain. Comput. Informatics Syst.	2022	DBLP DOI BibTeX RDF
19	Jian Wang 0024, Zhe Chen, Shize Guo, Yubai Li, Zhonghai Lu	Optimal Sprinting Pattern in Thermal Constrained CMPs.	IEEE Trans. Emerg. Top. Comput.	2021	DBLP DOI BibTeX RDF
19	Solomon Abera, M. Balakrishnan, Anshul Kumar	Performance-Energy Trade-off in Modern CMPs.	ACM Trans. Archit. Code Optim.	2021	DBLP DOI BibTeX RDF
19	Tadej Petric	Phase-Synchronized Learning of Periodic Compliant Movement Primitives (P-CMPs).	Frontiers Neurorobotics	2020	DBLP DOI BibTeX RDF
19	Arghavan Asad, Furat Al-Obaidy, Farah Mohammadi 0001	Efficient Power Consumption using Hybrid Emerging Memory Technology for 3D CMPs.	LASCAS	2020	DBLP DOI BibTeX RDF
19	Theodoros Marinakis, Iraklis Anagnostopoulos	Performance and Fairness Improvement on CMPs Considering Bandwidth and Cache Utilization.	IEEE Comput. Archit. Lett.	2019	DBLP DOI BibTeX RDF
19	Shize Guo, Jian Wang 0024, Zhe Chen, Zhonghai Lu, Jinhong Guo, Lian Yang	Security-Aware Task Mapping Reducing Thermal Side Channel Leakage in CMPs.	IEEE Trans. Ind. Informatics	2019	DBLP DOI BibTeX RDF
19	Alexandra Ferrerón-Labari, Jesús Alastruey-Benedé, Darío Suárez Gracia, Teresa Monreal Arnal, Pablo Ibáñez-Marín, Víctor Viñals Yúfera	A fault-tolerant last level cache for CMPs operating at ultra-low voltage.	J. Parallel Distributed Comput.	2019	DBLP DOI BibTeX RDF
19	Subodha Charles, Alif Ahmed, Ümit Y. Ogras, Prabhat Mishra 0001	Efficient Cache Reconfiguration Using Machine Learning in NoC-Based Many-Core CMPs.	ACM Trans. Design Autom. Electr. Syst.	2019	DBLP DOI BibTeX RDF
19	Pratik Gajane, Ronald Ortner, Peter Auer, Csaba Szepesvári	Autonomous exploration for navigating in non-stationary CMPs.	CoRR	2019	DBLP BibTeX RDF
19	Marco Pranzo, Somnath Mazumdar	An analytical model for thread-core mapping for tiled CMPs.	Perform. Evaluation	2019	DBLP DOI BibTeX RDF
19	Suvadip Hazra, Mamata Dalui	Cellular Automata Based Solution for Detecting Hardware Trojan in CMPs.	ICITAM	2019	DBLP DOI BibTeX RDF
19	Jeckson Dellagostin Souza, Antonio Carlos Schneider Beck Filho	Trimming the ISA to Optimize Area and EDP in Heterogeneous CMPs.	SBAC-PAD	2019	DBLP DOI BibTeX RDF
19	Mohaddeseh Hoveida, Fatemeh Aghaaliakbari, Majid Jalili 0001, Ramin Bashizade, Mohammad Arjomand, Hamid Sarbazi-Azad	Chapter Two - Revisiting Processor Allocation and Application Mapping in Future CMPs in Dark Silicon Era.	Adv. Comput.	2018	DBLP DOI BibTeX RDF
19	Amin Jadidi, Mohammad Arjomand, Mahmut T. Kandemir, Chita R. Das	Performance and Power-Efficient Design of Dense Non-Volatile Cache in CMPs.	IEEE Trans. Computers	2018	DBLP DOI BibTeX RDF
19	José L. Abellán, Eduardo Padierna, Alberto Ros 0001, Manuel E. Acacio	Photonic-based express coherence notifications for many-core CMPs.	J. Parallel Distributed Comput.	2018	DBLP DOI BibTeX RDF
19	Sina Shahhosseini, Kasra Moazzemi, Amir M. Rahmani, Nikil D. Dutt	On the feasibility of SISO control-theoretic DVFS for power capping in CMPs.	Microprocess. Microsystems	2018	DBLP DOI BibTeX RDF
19	Bidesh Chakraborty, Mamata Dalui, Biplab K. Sikdar	Design of a Reliable Cache System for Heterogeneous CMPs.	J. Circuits Syst. Comput.	2018	DBLP DOI BibTeX RDF
19	Mohammadreza Soltaniyeh, Ismail Kadayif, Ozcan Ozturk 0001	Classifying Data Blocks at Subpage Granularity With an On-Chip Page Table to Improve Coherence in Tiled CMPs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2018	DBLP DOI BibTeX RDF
19	Paolo Grani, Sandro Bartolini	Scalable Path-Setup Scheme for All-Optical Dynamic Circuit Switched NoCs in Cache Coherent CMPs.	ACM J. Emerg. Technol. Comput. Syst.	2018	DBLP DOI BibTeX RDF
19	Gabriele Mencagli, Marco Vanneschi, Silvia Lametti	The home-forwarding mechanism to reduce the cache coherence overhead in next-generation CMPs.	Future Gener. Comput. Syst.	2018	DBLP DOI BibTeX RDF
19	Subodha Charles, Chetan Arvind Patil, Ümit Y. Ogras, Prabhat Mishra 0001	Exploration of Memory and Cluster Modes in Directory-Based Many-Core CMPs.	NOCS	2018	DBLP DOI BibTeX RDF
19	Bryan Donyanavard, Amir M. Rahmani, Tiago Mück, Kasra Moazemmi, Nikil D. Dutt	Gain scheduled control for nonlinear power management in CMPs.	DATE	2018	DBLP DOI BibTeX RDF
19	Solomon Abera, M. Balakrishnan, Anshul Kumar	Performance-Energy Trade-off in CMPs with Per-Core DVFS.	ARCS	2018	DBLP DOI BibTeX RDF
19	Woo-Cheol Kwon	Co-design of on-chip caches and networks for scalable shared-memory many-core CMPs.		2018	RDF
19	Shirshendu Das, Hemangee K. Kapoor	Dynamic Associativity Management in Tiled CMPs by Runtime Adaptation of Fellow Sets.	IEEE Trans. Parallel Distributed Syst.	2017	DBLP DOI BibTeX RDF
19	Albert Esteve, Alberto Ros 0001, María Engracia Gómez, Antonio Robles, José Duato	TLB-Based Temporality-Aware Classification in CMPs with Multilevel TLBs.	IEEE Trans. Parallel Distributed Syst.	2017	DBLP DOI BibTeX RDF
19	Shounak Chakraborty 0001, Hemangee K. Kapoor	Performance linked dynamic cache tuning: A static energy reduction approach in tiled CMPs.	Microprocess. Microsystems	2017	DBLP DOI BibTeX RDF
19	Fengkai Yuan, Zhenzhou Ji, Zhongchuan Fu	RACMan: Replication-aware cache management for manycore CMPs with private LLCs.	Microprocess. Microsystems	2017	DBLP DOI BibTeX RDF
19	Mamata Dalui, Biplab K. Sikdar	A cellular automata based self-correcting protocol processor for scalable CMPs.	Microelectron. J.	2017	DBLP DOI BibTeX RDF
19	Baisakhi Das, Biplab K. Sikdar	Evaluating impact on CMPs' power for design inaccuracy diagnosis.	Int. J. Comput. Appl. Technol.	2017	DBLP DOI BibTeX RDF
19	Pooneh Safayenikoo, Arghavan Asad, Mahmood Fathy, Farah Mohammadi 0001	Exploiting non-uniformity of write accesses for designing a high-endurance hybrid Last Level Cache in 3D CMPs.	CCECE	2017	DBLP DOI BibTeX RDF
19	Bidesh Chakraborty, Mamata Dalui, Biplab K. Sikdar	Design of Coherence Verification Unit for Heterogeneous CMPs Integrating Update and Invalidate Protocols.	VLSID	2017	DBLP DOI BibTeX RDF
19	Hadi Asgharimoghaddam, Nam Sung Kim	SpinWise: A Practical Energy-Efficient Synchronization Technique for CMPs.	SIGARCH Comput. Archit. News	2016	DBLP DOI BibTeX RDF
19	Mamata Dalui, Biplab K. Sikdar	A Cache System Design for CMPs with Built-In Coherence Verification.	VLSI Design	2016	DBLP DOI BibTeX RDF
19	Martí Torrents, Raúl Martínez, Carlos Molina	Facing prefetching challenges in distributed shared memories for CMPs.	J. Supercomput.	2016	DBLP DOI BibTeX RDF
19	Xiaofei Liao, Rentong Guo, Danping Yu, Hai Jin 0001, Li Lin 0001	A Phase Behavior Aware Dynamic Cache Partitioning Scheme for CMPs.	Int. J. Parallel Program.	2016	DBLP DOI BibTeX RDF
19	Marta Ortín-Obón, Darío Suárez Gracia, María Villarroya-Gaudó, Cruz Izu, Víctor Viñals	Reactive circuits: Dynamic construction of circuits for reactive traffic in homogeneous CMPs.	J. Parallel Distributed Comput.	2016	DBLP DOI BibTeX RDF
19	Zhonghai Lu, Yuan Yao 0009	Aggregate Flow-Based Performance Fairness in CMPs.	ACM Trans. Archit. Code Optim.	2016	DBLP DOI BibTeX RDF
19	Shounak Chakraborty 0001, Shirshendu Das, Hemangee K. Kapoor	Static energy efficient cache reconfiguration for dynamic NUCA in tiled CMPs.	SAC	2016	DBLP DOI BibTeX RDF
19	Shirshendu Das, Hemangee K. Kapoor	Dynamic associativity enabled DNUCA to improve block localisation in tiled CMPs.	SAC	2016	DBLP DOI BibTeX RDF
19	Nasibeh Teimouri, Hamed Tabkhi, Gunar Schirner	Improving scalability of CMPs with dense ACCs coverage.	DATE	2016	DBLP BibTeX RDF
19	Yuan Yao 0009, Zhonghai Lu	Memory-access aware DVFS for network-on-chip in CMPs.	DATE	2016	DBLP BibTeX RDF
19	Bidesh Chakraborty, Mamata Dalui, Biplab K. Sikdar	CA based protocol processor for heterogeneous CMPs.	ISED	2016	DBLP DOI BibTeX RDF
19	Mamata Dalui, Tannishtha Som, Shivani Bansal, Shivam Pant, Biplab K. Sikdar	MASI: An eviction aware cache coherence protocol for CMPs.	ISED	2016	DBLP DOI BibTeX RDF
19	Baisakhi Das, Supreeti Kamilya, Biplab K. Sikdar	Design of CA based scheme for evenhanded data migration in CMPs.	ISED	2016	DBLP DOI BibTeX RDF
19	Yuan Yao 0009, Zhonghai Lu	DVFS for NoCs in CMPs: A thread voting approach.	HPCA	2016	DBLP DOI BibTeX RDF
19	Rajiv Nishtala, Xavier Martorell	RePP-C: Runtime estimation of performance-power with workload consolidation in CMPs.	IGSC	2016	DBLP DOI BibTeX RDF
19	Masayuki Sato 0001, Shin Nishimura, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi	A cache partitioning mechanism to protect shared data for CMPs.	COOL Chips	2016	DBLP DOI BibTeX RDF
19	Alberto Scionti, Somnath Mazumdar, Antoni Portero	Software defined Network-on-Chip for scalable CMPs.	HPCS	2016	DBLP DOI BibTeX RDF
19	Yuan Yao 0009, Zhonghai Lu	Opportunistic Competition Overhead Reduction for Expediting Critical Section in NoC Based CMPs.	ISCA	2016	DBLP DOI BibTeX RDF
19	Bidesh Chakraborty, Mamata Dalui, Biplab K. Sikdar	Design of coherence verification unit for CMPs realizing dragon protocol.	VDAT	2016	DBLP DOI BibTeX RDF
19	Joan J. Valls, Alberto Ros 0001, Julio Sahuquillo, María Engracia Gómez	PS directory: a scalable multilevel directory cache for CMPs.	J. Supercomput.	2015	DBLP DOI BibTeX RDF
19	Prasanna Venkatesh Rengasamy, Anand Sivasubramaniam, Mahmut T. Kandemir, Chita R. Das	Exploiting Staleness for Approximating Loads on CMPs.	PACT	2015	DBLP DOI BibTeX RDF
19	Hemangee K. Kapoor, Shirshendu Das, Shounak Chakraborty 0001	Static energy reduction by performance linked cache capacity management in tiled CMPs.	SAC	2015	DBLP DOI BibTeX RDF
19	Yi-Jung Chen, Chia-Lin Yang, Ping-Sheng Lin, Yi-Chang Lu	Thermal/performance characterization of CMPs with 3D-stacked DRAMs under synergistic voltage-frequency control of cores and DRAMs.	RACS	2015	DBLP DOI BibTeX RDF
19	Rajiv Nishtala, Marc González Tallada, Xavier Martorell	A Methodology to Build Models and Predict Performance-Power in CMPs.	ICPP Workshops	2015	DBLP DOI BibTeX RDF
19	Martí Torrents, Raúl Martínez, Carlos Molina	Prefetching Challenges in Distributed Memories for CMPs.	ICCS	2015	DBLP DOI BibTeX RDF
19	Alirad Malek, Stavros Tzilis, Danish Anis Khan, Ioannis Sourdis, Georgios Smaragdos, Christos Strydis	Reducing the performance overhead of resilient CMPs with substitutable resources.	DFTS	2015	DBLP DOI BibTeX RDF
19	Nikola Markovic, Daniel Nemirovsky, Osman S. Unsal, Mateo Valero, Adrián Cristal	Performance and Energy Efficient Hardware-Based Scheduler for Symmetric/Asymmetric CMPs.	SBAC-PAD	2015	DBLP DOI BibTeX RDF
19	Shirshendu Das, Hemangee K. Kapoor	Exploration of Migration and Replacement Policies for Dynamic NUCA over Tiled CMPs.	VLSID	2015	DBLP DOI BibTeX RDF
19	Saha Mousumi, Navneet Kumar Gautam, Biplab K. Sikdar	A fault tolerant test hardware for L1 cache module in tile CMPs architecture.	VDAT	2015	DBLP DOI BibTeX RDF
19	Bidesh Chakraborty, Bhanu Pratap Singh, M. Chinnapureddy, Mamata Dalui, Biplab K. Sikdar	Design of coherence verification unit for heterogeneous CMPs.	VDAT	2015	DBLP DOI BibTeX RDF
19	Nasibeh Teimouri, Hamed Tabkhi, Gunar Schirner	Revisiting accelerator-rich CMPs: challenges and solutions.	DAC	2015	DBLP DOI BibTeX RDF
19	Christopher Callum Thompson	On the simulation and design of manycore CMPs.		2015	RDF
19	Nikola Markovic	Hardware thread scheduling algorithms for single-ISA asymmetric CMPs.		2015	RDF
19	Josué Feliu, Salvador Petit, Julio Sahuquillo, José Duato	Cache-Hierarchy Contention-Aware Scheduling in CMPs.	IEEE Trans. Parallel Distributed Syst.	2014	DBLP DOI BibTeX RDF
19	Weiwei Fu, Li Liu 0006, Tianzhou Chen	Direct distributed memory access for CMPs.	J. Parallel Distributed Comput.	2014	DBLP DOI BibTeX RDF
19	Da Cheng, Sandeep K. Gupta 0001	Maximizing Yield per Area of Highly Parallel CMPs Using Hardware Redundancy.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2014	DBLP DOI BibTeX RDF
19	Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian, Glenn Reinman	Architecture Support for Domain-Specific Accelerator-Rich CMPs.	ACM Trans. Embed. Comput. Syst.	2014	DBLP DOI BibTeX RDF
19	Martí Torrents, Raúl Martínez, Carlos Molina	Network aware performance evaluation of prefetching techniques in CMPs.	Simul. Model. Pract. Theory	2014	DBLP DOI BibTeX RDF
19	Biswabandan Panda, Shankar Balachandran	XStream: cross-core spatial streaming based MLC prefetchers for parallel applications in CMPs.	PACT	2014	DBLP DOI BibTeX RDF
19	Alexandros-Herodotos Haritatos, Georgios I. Goumas, Nikos Anastopoulos, Konstantinos Nikas, Kornilios Kourtis, Nectarios Koziris	LCA: a memory link and cache-aware co-scheduling approach for CMPs.	PACT	2014	DBLP DOI BibTeX RDF
19	Weiwei Fu, Mingmin Yuan, Tianzhou Chen, Li Liu 0006	Agent-Based Memory Access for Many-Core CMPs.	ISPDC	2014	DBLP DOI BibTeX RDF