Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
20 | Kaspar Matas, Tuan Minh La, Khoa Dang Pham, Dirk Koch |
Power-hammering through Glitch Amplification - Attacks and Mitigation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2020, Fayetteville, AR, USA, May 3-6, 2020, pp. 65-69, 2020, IEEE, 978-1-7281-5803-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Miriam Sturdee, Joseph Lindley, Regan Harrison, Tine Kluth |
The Seven Year Glitch: Unpacking Beauty and Despair in Malfunction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHI Extended Abstracts ![In: Extended Abstracts of the 2020 CHI Conference on Human Factors in Computing Systems, CHI 2020, Honolulu, HI, USA, April 25-30, 2020, pp. 1-11, 2020, ACM, 978-1-4503-6819-3. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Hung-Yi Huang, Xin-Yu Chen, Tai-Haur Kuo |
A 177mW 10GS/s NRZ DAC with Switching-Glitch Compensation Achieving > 64dBc SFDR and < -77dBc IM3. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: IEEE Symposium on VLSI Circuits, VLSI Circuits 2020, Honolulu, HI, USA, June 16-19, 2020, pp. 1-2, 2020, IEEE, 978-1-7281-9942-9. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Anh Tuan Do, Tony Tae-Hyoung Kim, Xin Liu, Jun Zhou |
Design and Characterization of Radiation-Hardened MCU for Space Application using Error Correction SRAM and Glitch Removal Clock Buffer Cell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2020, Sevilla, Spain, October 10-21, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-3320-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Aein Rezaei Shahmirzadi, Amir Moradi 0001 |
Clock Glitch versus SIFA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Stephan Jürgens, Nuno N. Correia, Raul Masu |
Designing Glitch Procedures and Visualisation Workflows for Markerless Live Motion Capture of Contemporary Dance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MOCO ![In: MOCO '20: 7th International Conference on Movement and Computing, virtual [Jersey City, NJ, USA], July 15-17, 2020, pp. 6:1-6:8, 2020, ACM, 978-1-4503-7505-4. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Wenye Liu, Chip-Hong Chang, Fan Zhang 0010, Xiaoxuan Lou |
Imperceptible Misclassification Attack on Deep Learning Accelerator by Glitch Injection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: 57th ACM/IEEE Design Automation Conference, DAC 2020, San Francisco, CA, USA, July 20-24, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-1085-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Shivani Bathla, Rahul M. Rao, Nitin Chandrachoodan |
A Simulation-Based Metric to Guide Glitch Power Reduction in Digital Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 27(2), pp. 376-386, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Dam Minh Tung, Nguyen Van Toan, Jeong-Gun Lee |
A high-resolution and glitch-free all-digital variable length ring oscillator design on an FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Electr. Eng. ![In: Comput. Electr. Eng. 74, pp. 149-163, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Pablo Morales-Alvarez, Pablo Ruiz 0002, Scott Coughlin, Rafael Molina 0001, Aggelos K. Katsaggelos |
Scalable Variational Gaussian Processes for Crowdsourcing: Glitch Detection in LIGO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1911.01915, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
20 | Thorben Moos, Amir Moradi 0001, Tobias Schneider 0002, François-Xavier Standaert |
Glitch-Resistant Masking Revisited or Why Proofs in the Robust Probing Model are Needed. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IACR Trans. Cryptogr. Hardw. Embed. Syst. ![In: IACR Trans. Cryptogr. Hardw. Embed. Syst. 2019(2), pp. 256-292, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Claudio Bozzato, Riccardo Focardi, Francesco Palmarini |
Shaping the Glitch: Optimizing Voltage Fault Injection Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IACR Trans. Cryptogr. Hardw. Embed. Syst. ![In: IACR Trans. Cryptogr. Hardw. Embed. Syst. 2019(2), pp. 199-224, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Mitsunari Oda, Takashi Torihara, Eiji Kondo, Noriyoshi Kumazawa |
Feasibility Study of a Hybrid Spindle System with Ball and Active Magnetic Bearings for Quadrant Glitch Compensation During End Milling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Autom. Technol. ![In: Int. J. Autom. Technol. 13(3), pp. 432-439, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Arvind Singh, Monodeep Kar, Nikhil Chawla, Saibal Mukhopadhyay |
Mitigating Power Supply Glitch based Fault Attacks with Fast All-Digital Clock Modulation Circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Florence, Italy, March 25-29, 2019, pp. 19-24, 2019, IEEE, 978-3-9819263-2-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Zahra Kazemi, Athanasios Papadimitriou, Ioanna Souvatzoglou, Ehsan Aerabi, Mosabbah Mushir Ahmed, David Hély, Vincent Beroulle |
On a Low Cost Fault Injection Framework for Security Assessment of Cyber-Physical Systems: Clock Glitch Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IVSW ![In: 4th IEEE International Verification and Security Workshop, IVSW 2019, Rhodes Island, Greece, July 1-3, 2019, pp. 7-12, 2019, IEEE, 978-1-7281-2671-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Stefano Gualeni |
On the de-familiarizing and re-ontologizing effects of glitches and glitch-alikes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DiGRA Conference ![In: Proceedings of the 2019 DiGRA International Conference: Game, Play and the Emerging Ludo-Mix, DiGRA 2019, Kyoto, Japan, August 6-10, 2019, 2019, Digital Games Research Association. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
20 | Shu Takemoto, Yusuke Nozaki, Masaya Yoshikawa |
Statistical Power Analysis for IoT Device Oriented Encryption with Glitch Canceller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWCIA ![In: 11th IEEE International Workshop on Computational Intelligence and Applications, IWCIA 2019, Hiroshima, Japan, November 9-10, 2019, pp. 73-76, 2019, IEEE, 978-1-7281-2429-2. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Tasnuva Noor, Emre Salman |
A Novel Glitch-Free Integrated Clock Gating Cell for High Reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019, pp. 1-5, 2019, IEEE, 978-1-7281-0397-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Jhankar Malakar, Devraj M. Rajagopal, Srikanth Srinivasan 0003, Gayatri Hegde |
Noise Immune, Low-Skew, Pulse Width Retainable Analog Glitch-Filter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-0397-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Kun-Han Tsai |
Race and Glitch Handling: A Test Perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC-Asia ![In: IEEE International Test Conference in Asia, ITC-Asia 2019, Tokyo, Japan, September 3-5, 2019, pp. 85-90, 2019, IEEE, 978-1-7281-4718-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | De-Xuan Ji, Hsiao-Yu Chiang, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang |
A Glitch Key-Gate for Logic Locking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: 32nd IEEE International System-on-Chip Conference, SOCC 2019, Singapore, September 3-6, 2019, pp. 74-79, 2019, IEEE, 978-1-7281-3483-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Kiran Gopal, Avanish K |
Delay Skew Reduction in IO Glitch Filter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSID ![In: 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, VLSID 2019, Delhi, India, January 5-9, 2019, pp. 174-178, 2019, IEEE, 978-1-7281-0409-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Sara Bahaadini, Vahid Noroozi, Neda Rohani, Scott Coughlin, Michael Zevin, Joshua R. Smith 0003, Vicky Kalogera, Aggelos K. Katsaggelos |
Machine learning for Gravity Spy: Glitch classification and dataset. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Sci. ![In: Inf. Sci. 444, pp. 172-186, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Alexander Wild, Amir Moradi 0001, Tim Güneysu |
GliFreD: Glitch-Free Duplication Towards Power-Equalized Circuits on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 67(3), pp. 375-387, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Emily E. Crawford |
Glitch Horror: BEN Drowned and the Fallibility of Technology in Game Fan Fiction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Trans. Digit. Games Res. Assoc. ![In: Trans. Digit. Games Res. Assoc. 4(2), 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Okan Seker, Abraham Fernandez-Rubio, Thomas Eisenbarth 0001, Rainer Steinwandt |
Extending Glitch-Free Multiparty Protocols to Resist Fault Injection Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IACR Trans. Cryptogr. Hardw. Embed. Syst. ![In: IACR Trans. Cryptogr. Hardw. Embed. Syst. 2018(3), pp. 394-430, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Thorben Moos, Amir Moradi 0001, Tobias Schneider 0002, François-Xavier Standaert |
Glitch-Resistant Masking Revisited - or Why Proofs in the Robust Probing Model are Needed. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IACR Cryptol. ePrint Arch. ![In: IACR Cryptol. ePrint Arch. 2018, pp. 490, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
|
20 | Yang Wang, Lin-Lin Xie, Yong Hei, Shushan Qiao |
A low power and glitch-free circular rotation phase modulator for outphasing transmitter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 15(14), pp. 20180406, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Chiraag Juvekar, Anantha P. Chandrakasan, Joyce Kwong, Hyung-Min Lee |
A nonvolatile flip-flop-enabled cryptographic wireless authentication tag with per-query key update and power-glitch attack countermeasures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: 23rd Asia and South Pacific Design Automation Conference, ASP-DAC 2018, Jeju, Korea (South), January 22-25, 2018, pp. 279-280, 2018, IEEE, 978-1-5090-0602-1. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Ali Shiri Sichani, Wilfrido A. Moreno |
Mathematical model for glitch power consumption to study its implication on power analysis attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LASCAS ![In: 9th IEEE Latin American Symposium on Circuits & Systems, LASCAS 2018, Puerto Vallarta, Mexico, February 25-28, 2018, pp. 1-4, 2018, IEEE, 978-1-5386-2311-4. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | M. Castresana, Francisco Siles |
Goniometry-based Glitch-Correction Algorithm for Optical Motion Capture Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWOBI ![In: IEEE International Work Conference on Bioinspired Intelligence, IWOBI 2018, San Carlos, Alajuela, Costa Rica, July 18-20, 2018, pp. 1-8, 2018, IEEE, 978-1-5386-7506-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Bo Ning 0001, Qiang Liu |
Modeling and Efficiency Analysis of Clock Glitch Fault Injection Attack. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AsianHOST ![In: Asian Hardware Oriented Security and Trust Symposium, AsianHOST 2018, Hong Kong, China, December 17-18, 2018, pp. 13-18, 2018, IEEE, 978-1-5386-7471-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Victor Arribas, Thomas De Cnudde, Danilo Sijacic |
Glitch-Resistant Masking Schemes as Countermeasure Against Fault Sensitivity Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FDTC ![In: 2018 Workshop on Fault Diagnosis and Tolerance in Cryptography, FDTC 2018, Amsterdam, The Netherlands, September 13, 2018, pp. 27-34, 2018, IEEE Computer Society, 978-1-5386-8197-8. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Kaship Sheikh, Lan Wei |
Methodology to Capture Statistical Effect of Process Imperfections on Glitch Suppression in CNFET Circuits and to Improve by Using Approximate Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 2018 on Great Lakes Symposium on VLSI, GLSVLSI 2018, Chicago, IL, USA, May 23-25, 2018, pp. 27-32, 2018, ACM. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Hyung-Min Lee, Chiraag Juvekar, Joyce Kwong, Anantha P. Chandrakasan |
A Nonvolatile Flip-Flop-Enabled Cryptographic Wireless Authentication Tag With Per-Query Key Update and Power-Glitch Attack Countermeasures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 52(1), pp. 272-283, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Teruki Someya, Hiroshi Fuketa, Kenichi Matsunaga, Hiroki Morimura, Takayasu Sakurai, Makoto Takamiya |
Design and Analysis of Ultra-Low Power Glitch-Free Programmable Voltage Detector Based on Multiple Voltage Copier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Electron. ![In: IEICE Trans. Electron. 100-C(4), pp. 349-358, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Davide De Caro, Fabio Tessitore, Gianfranco Vai, Gerardo Castellano, Ettore Napoli, Nicola Petra, Claudio Parrella, Antonio G. M. Strollo |
Single Flip-Flop Driving Circuit for Glitch-Free NAND-Based Digitally Controlled Delay-Lines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Circuits Syst. Signal Process. ![In: Circuits Syst. Signal Process. 36(4), pp. 1341-1360, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Sara Bahaadini, Neda Rohani, Scott Coughlin, Michael Zevin, Vicky Kalogera, Aggelos K. Katsaggelos |
Deep Multi-view Models for Glitch Classification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1705.00034, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
20 | Daniel George, Hongyu Shen, E. A. Huerta |
Glitch Classification and Clustering for LIGO with Deep Transfer Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1711.07468, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
20 | Daniel George, Hongyu Shen, E. A. Huerta |
Deep Transfer Learning: A new deep learning glitch classification method for advanced LIGO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1706.07446, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
20 | Leslie Lamport, Richard Palais |
On the Glitch Phenomenon. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1704.01154, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
20 | James Howe, Máire O'Neill |
GLITCH: A Discrete Gaussian Testing Suite For Lattice-Based Cryptography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IACR Cryptol. ePrint Arch. ![In: IACR Cryptol. ePrint Arch. 2017, pp. 438, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
20 | Okan Seker, Thomas Eisenbarth 0001, Rainer Steinwandt |
Extending Glitch-Free Multiparty Protocols to Resist Fault Injection Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IACR Cryptol. ePrint Arch. ![In: IACR Cryptol. ePrint Arch. 2017, pp. 269, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
20 | Takuya Kojima, Naoki Ando, Hayate Okuhara, Hideharu Amano |
Glitch-aware variable pipeline optimization for CGRAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: International Conference on ReConFigurable Computing and FPGAs, ReConFig 2017, Cancun, Mexico, December 4-6, 2017, pp. 1-6, 2017, IEEE, 978-1-5386-3797-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | James Howe, Máire O'Neill |
GLITCH: A Discrete Gaussian Testing Suite for Lattice-based Cryptography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SECRYPT ![In: Proceedings of the 14th International Joint Conference on e-Business and Telecommunications (ICETE 2017) - Volume 4: SECRYPT, Madrid, Spain, July 24-26, 2017., pp. 413-419, 2017, SciTePress, 978-989-758-259-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Sara Bahaadini, Neda Rohani, Scott Coughlin, Michael Zevin, Vicky Kalogera, Aggelos K. Katsaggelos |
Deep multi-view models for glitch classification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP ![In: 2017 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP 2017, New Orleans, LA, USA, March 5-9, 2017, pp. 2931-2935, 2017, IEEE, 978-1-5090-4117-6. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Emily E. Crawford |
Glitch Horror: BEN Drowned and the Fallibility of Technology in Game Fan Fiction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DiGRA Conference ![In: Proceedings of the 2017 DiGRA International Conference, DiGRA 2017, Melbourne, Australia, July 2-6, 2017, 2017, Digital Games Research Association. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
20 | Jungwoo Joh, Yezee Seo, Hoon-Kyu Kim, Taekyoung Kwon 0002 |
Glitch Recall: A Hardware Trojan Exploiting Natural Glitches in Logic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WISA ![In: Information Security Applications - 18th International Conference, WISA 2017, Jeju Island, Korea, August 24-26, 2017, Revised Selected Papers, pp. 150-161, 2017, Springer, 978-3-319-93562-1. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Hsin-Shu Chen, Jia-Nan Tai, Yi-Jan Emery Chen, Jau-Horng Chen |
A current average control method for transient-glitch reduction in variable frequency DC-DC converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, MD, USA, May 28-31, 2017, pp. 1-4, 2017, IEEE, 978-1-4673-6853-7. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Fang-Ting Chou, Chung-Chih Hung |
Glitch Energy Reduction and SFDR Enhancement Techniques for Low-Power Binary-Weighted Current-Steering DAC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 24(6), pp. 2407-2411, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Matthias Függer, Thomas Nowak, Ulrich Schmid 0001 |
Unfaithful Glitch Propagation in Existing Binary Circuit Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 65(3), pp. 964-978, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Noemie Beringuier-Boher, Vincent Beroulle, David Hély, Joel Damiens, Philippe Candelier |
Clock generator behavioral modeling for supply voltage glitch attack effects analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 47, pp. 37-43, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Pei Luo, Chao Luo, Yunsi Fei |
System Clock and Power Supply Cross-Checking for Glitch Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IACR Cryptol. ePrint Arch. ![In: IACR Cryptol. ePrint Arch. 2016, pp. 968, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP BibTeX RDF |
|
20 | Stepan Lapshev, S. M. Rezaul Hasan |
New Low Glitch and Low Power DET Flip-Flops Using Multiple C-Elements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(10), pp. 1673-1681, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Elizabeth Gibney |
Computing glitch may have doomed Mars lander. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Nat. ![In: Nat. 538(7626), pp. 435-436, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Safeen Huda, Jason Helge Anderson |
Towards PVT-Tolerant Glitch-Free Operation in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, USA, February 21-23, 2016, pp. 90-99, 2016, ACM, 978-1-4503-3856-1. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Chiraag Juvekar, Hyung-Min Lee, Joyce Kwong, Anantha P. Chandrakasan |
16.2 A Keccak-based wireless authentication tag with per-query key update and power-glitch attack countermeasures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016, San Francisco, CA, USA, January 31 - February 4, 2016, pp. 290-291, 2016, IEEE, 978-1-4673-9466-6. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Bilgiday Yuce, Nahid Farhady Ghalaty, Harika Santapuri, Chinmay Deshpande, Conor Patrick, Patrick Schaumont |
Software Fault Resistance is Futile: Effective Single-Glitch Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FDTC ![In: 2016 Workshop on Fault Diagnosis and Tolerance in Cryptography, FDTC 2016, Santa Barbara, CA, USA, August 16, 2016, pp. 47-58, 2016, IEEE Computer Society, 978-1-5090-1108-7. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Serge Vaudenay |
Side-Channel Attacks on Threshold Implementations Using a Glitch Algebra. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CANS ![In: Cryptology and Network Security - 15th International Conference, CANS 2016, Milan, Italy, November 14-16, 2016, Proceedings, pp. 55-70, 2016, 978-3-319-48964-3. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Masato Matsubayashi, Akashi Satoh, Jun Ishii |
Clock glitch generator on SAKURA-G for fault injection attack against a cryptographic circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GCCE ![In: IEEE 5th Global Conference on Consumer Electronics, GCCE 2016, Kyoto, Japan, October 11-14, 2016, pp. 1-4, 2016, IEEE, 978-1-5090-2333-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Zhidong Liu, Hoi Lee |
A 26 W 97%-Efficiency Fast-Settling Dimmable LED Driver With Dual-nMOS-Sensing Based Glitch-Tolerant Synchronous Current Control for High-Brightness Solid-State Lighting Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 50(9), pp. 2174-2187, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Jenny Sundén |
On trans-, glitch, and gender as machinery of failure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
First Monday ![In: First Monday 20(4), 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Alexander Wild, Amir Moradi 0001, Tim Güneysu |
GliFreD: Glitch-Free Duplication - Towards Power-Equalized Circuits on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IACR Cryptol. ePrint Arch. ![In: IACR Cryptol. ePrint Arch. 2015, pp. 124, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP BibTeX RDF |
|
20 | Robert Najvirt, Andreas Steininger |
A versatile and reliable glitch filter for clocks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: 25th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2015, Salvador, Brazil, September 1-4, 2015, pp. 140-147, 2015, IEEE, 978-1-4673-9419-2. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Teruki Someya, Hiroshi Fuketa, Kenichi Matsunaga, Hiroki Morimura, Takayasu Sakurai, Makoto Takamiya |
248pW, 0.11mV/°C glitch-free programmable voltage detector with multiple voltage duplicator for energy harvesting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference, Graz, Austria, September 14-18, 2015, pp. 249-252, 2015, IEEE, 978-1-4673-7470-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Sang Min Lee 0014, Dongwon Seo, Shahin Mehdizad Taleie, Derui Kong, Michael Joseph McGowan, Tongyu Song, Ganesh R. Saripalli, Jenny Kuo, Seyfi S. Bazarjani |
A 14b 750MS/s DAC in 20nm CMOS with <-168dBm/Hz noise floor beyond Nyquist and 79dBc SFDR utilizing a low glitch-noise hybrid R-2R architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSIC ![In: Symposium on VLSI Circuits, VLSIC 2015, Kyoto, Japan, June 17-19, 2015, pp. 164-, 2015, IEEE, 978-4-86348-502-0. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Volnei A. Pedroni |
XOR-decomposition principle and its use to build a glitch-free maximum-speed arbitrary binary waveform generator and deglitcher. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, Portugal, May 24-27, 2015, pp. 1834-1837, 2015, IEEE, 978-1-4799-8391-9. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Joonghyun An, Jeonghun Cho, Daejin Park |
On-chip glitch-free backup clock changer with noise canceller and edge detector for safety MCU clock system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GCCE ![In: IEEE 4th Global Conference on Consumer Electronics, GCCE 2015, Osaka, Japan, 27-30 October 2015, pp. 487-488, 2015, IEEE. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Anders Drachen, Joseph Riley, Shawna Baskin, Diego Klabjan |
Going out of business: Auction house behavior in the Massively Multi-player Online Game Glitch. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Entertain. Comput. ![In: Entertain. Comput. 5(4), pp. 219-232, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Iman Shayan Moradi |
Noise Channels. Glitch and Error in Digital Culture. Peter Krapp. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Lit. Linguistic Comput. ![In: Lit. Linguistic Comput. 29(1), pp. 137-139, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Matthias Függer, Robert Najvirt, Thomas Nowak, Ulrich Schmid 0001 |
Faithful Glitch Propagation in Binary Circuit Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1406.2544, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP BibTeX RDF |
|
20 | Antti Tenhiälä, Fabrizio Salvador |
Looking Inside Glitch Mitigation Capability: The Effect of Intraorganizational Communication Channels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Decis. Sci. ![In: Decis. Sci. 45(3), pp. 437-466, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Kathryn Thompson |
Noise Channels: Glitch and Error in Digital Culture, by Peter Krapp. Minneapolis, MN: University of Minnesota Press, 2011, 162 pp. $22.50 paper. ISBN 9780816676255 (paper). ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Soc. ![In: Inf. Soc. 30(1), pp. 83-84, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Jordi Perez-Puigdemont, Francesc Moll, Antonio Calomarde |
All-Digital Simple Clock Synthesis Through a Glitch-Free Variable-Length Ring Oscillator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 61-II(2), pp. 90-94, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Mahadevan Gomathisankaran, Akhilesh Tyagi |
Glitch Resistant Private Circuits Design Using HORNS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2014, Tampa, FL, USA, July 9-11, 2014, pp. 522-527, 2014, IEEE Computer Society, 978-1-4799-3763-9. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Arunkumar Vijayakumar, Sandip Kundu |
Glitch Power Reduction via Clock Skew Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2014, Tampa, FL, USA, July 9-11, 2014, pp. 504-509, 2014, IEEE Computer Society, 978-1-4799-3763-9. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Loïc Zussa, Amine Dehbaoui, Karim Tobich, Jean-Max Dutertre, Philippe Maurine, Ludovic Guillaume-Sage, Jessy Clédière, Assia Tria |
Efficiency of a glitch detector against electromagnetic fault injection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2014, Dresden, Germany, March 24-28, 2014, pp. 1-6, 2014, European Design and Automation Association, 978-3-9815370-2-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Noemie Beringuier-Boher, Kamil Gomina, David Hély, Jean-Baptiste Rigaud, Vincent Beroulle, Assia Tria, Joel Damiens, Philippe Gendrier, Philippe Candelier |
Voltage Glitch Attacks on Mixed-Signal Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 17th Euromicro Conference on Digital System Design, DSD 2014, Verona, Italy, August 27-29, 2014, pp. 379-386, 2014, IEEE Computer Society, 978-1-4799-5793-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Stuart Cunningham 0001, Jonathan Weinel, Darryl Griffiths |
ACERemix: a tool for glitch music remix production and performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Audio Mostly Conference ![In: Audio Mostly 2014, AM '14, Aalborg, Denmark, October 1-3, 2014, pp. 7:1-7:7, 2014, ACM, 978-1-4503-3032-9. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Tamraparni Dasu, Ji Meng Loh, Divesh Srivastava |
Empirical glitch explanations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
KDD ![In: The 20th ACM SIGKDD International Conference on Knowledge Discovery and Data Mining, KDD '14, New York, NY, USA - August 24 - 27, 2014, pp. 572-581, 2014, ACM, 978-1-4503-2956-9. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Thomas De Cnudde, Begül Bilgin, Oscar Reparaz, Svetla Nikova |
Higher-Order Glitch Resistant Implementation of the PRESENT S-Box. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BalkanCryptSec ![In: Cryptography and Information Security in the Balkans - First International Conference, BalkanCryptSec 2014, Istanbul, Turkey, October 16-17, 2014, Revised Selected Papers, pp. 75-93, 2014, Springer, 978-3-319-21355-2. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Thomas Korak, Michael Hutter, Baris Ege, Lejla Batina |
Clock Glitch Attacks in the Presence of Heating. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FDTC ![In: 2014 Workshop on Fault Diagnosis and Tolerance in Cryptography, FDTC 2014, Busan, South Korea, September 23, 2014, pp. 104-114, 2014, IEEE Computer Society, 978-1-4799-6292-1. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Fang-Ting Chou, Zong-Yi Chen, Chung-Chih Hung |
A 10-bit 250MS/s low-glitch binary-weighted digital-to-analog converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: 27th IEEE International System-on-Chip Conference, SOCC 2014, Las Vegas, NV, USA, September 2-5, 2014, pp. 231-235, 2014, IEEE, 978-1-4799-3378-5. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Kamil Gomina, Jean-Baptiste Rigaud, Philippe Gendrier, Philippe Candelier, Assia Tria |
Power supply glitch attacks: Design and evaluation of detection circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HOST ![In: 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, HOST 2014, Arlington, VA, USA, May 6-7, 2014, pp. 136-141, 2014, IEEE Computer Society, 978-1-4799-4114-8. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Fang-Ting Chou, Chia-Min Chen, Zong-Yi Chen, Chung-Chih Hung |
A novel glitch reduction circuitry for binary-weighted DAC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014, Ishigaki, Japan, November 17-20, 2014, pp. 240-243, 2014, IEEE, 978-1-4799-5230-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Davide De Caro |
Glitch-Free NAND-Based Digitally Controlled Delay-Lines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 21(1), pp. 55-66, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Matthias Függer, Thomas Nowak, Ulrich Schmid 0001 |
Unfaithful Glitch Propagation in Existing Binary Circuit Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1311.1423, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP BibTeX RDF |
|
20 | Haochi Wang, Yanlong Zhang, Xuewu Li, Lei Chen 0010, Zhiping Wen 0001, Kun Zhang, Min Wang |
A configurable fault-tolerant glitch-free clock switching circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013, Columbus, OH, USA, August 4-7, 2013, pp. 537-540, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Amine Dehbaoui, Amir-Pasha Mirbaha, Nicolas Moro, Jean-Max Dutertre, Assia Tria |
Electromagnetic Glitch on the AES Round Counter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COSADE ![In: Constructive Side-Channel Analysis and Secure Design - 4th International Workshop, COSADE 2013, Paris, France, March 6-8, 2013, Revised Selected Papers, pp. 17-31, 2013, Springer, 978-3-642-40025-4. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Rajesh Velegalati, Kinjal Shah, Jens-Peter Kaps |
Glitch Detection in Hardware Implementations on FPGAs Using Delay Based Sampling Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2013 Euromicro Conference on Digital System Design, DSD 2013, Los Alamitos, CA, USA, September 4-6, 2013, pp. 947-954, 2013, IEEE Computer Society, 978-1-4799-2978-8. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Matthias Függer, Thomas Nowak, Ulrich Schmid 0001 |
Unfaithful Glitch Propagation in Existing Binary Circuit Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 19th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2013, Santa Monica, CA, USA, May 19-22, 2013, pp. 191-199, 2013, IEEE Computer Society, 978-1-4673-5956-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Rafael Boix Carpi, Stjepan Picek, Lejla Batina, Federico Menarini, Domagoj Jakobovic, Marin Golub |
Glitch It If You Can: Parameter Search Strategies for Successful Fault Injection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CARDIS ![In: Smart Card Research and Advanced Applications - 12th International Conference, CARDIS 2013, Berlin, Germany, November 27-29, 2013. Revised Selected Papers, pp. 236-252, 2013, Springer, 978-3-319-08301-8. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Eelco den Heijer |
Evolving Glitch Art. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EvoMUSART ![In: Evolutionary and Biologically Inspired Music, Sound, Art and Design - Second International Conference, EvoMUSART 2013, Vienna, Austria, April 3-5, 2013. Proceedings, pp. 109-120, 2013, Springer, 978-3-642-36954-4. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Hiroaki Igarashi, Youhua Shi, Masao Yanagisawa, Nozomu Togawa |
Concurrent faulty clock detection for crypto circuits against clock glitch based DFA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, May 19-23, 2013, pp. 1432-1435, 2013, IEEE, 978-1-4673-5760-9. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Loïc Zussa, Jean-Max Dutertre, Jessy Clédière, Assia Tria |
Power supply glitch induced faults on FPGA: An in-depth analysis of the injection mechanism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), Chania, Crete, Greece, July 8-10, 2013, pp. 110-115, 2013, IEEE, 978-1-4799-0662-8. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Amir Moradi 0001, Oliver Mischke |
On the Simplicity of Converting Leakages from Multivariate to Univariate - (Case Study of a Glitch-Resistant Masking Scheme). ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2013 - 15th International Workshop, Santa Barbara, CA, USA, August 20-23, 2013. Proceedings, pp. 1-20, 2013, Springer, 978-3-642-40348-4. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Shad Gross |
Glitch, please: datamoshing as a medium-specific application of digital material. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DPPI ![In: Designing Pleasurable Products and Interfaces, DPPI '13, Newcastle upon Tyne, United Kingdom, September 3-5, 2013, pp. 175-184, 2013, ACM, 978-1-4503-2192-1. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Mohammad Tohidi, Morteza Mousazadeh, Saeed Akbari, Khayrollah Hadidi, Abdollah Khoei |
CMOS implementation of a new high speed, glitch-free 5-2 compressor for fast arithmetic operations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MIXDES ![In: Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2013, Gdynia, Poland, June 20-22, 2013, pp. 204-208, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP BibTeX RDF |
|
20 | Thomas Roche, Emmanuel Prouff |
Higher-order glitch free implementation of the AES using Secure Multi-Party Computation protocols - Extended version. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Cryptogr. Eng. ![In: J. Cryptogr. Eng. 2(2), pp. 111-127, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
20 | Koichi Shimizu, Daisuke Suzuki, Tomomi Kasuya |
Glitch PUF: Extracting Information from Usually Unwanted Glitches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 95-A(1), pp. 223-233, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|