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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 363 occurrences of 173 keywords
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Results
Found 524 publication records. Showing 524 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
21 | Seonggeun Ryu, Youngsong Mun |
An Optimized Scheme for Mobile IPv6 Handover Between Domains Based on AAA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC ![In: Embedded and Ubiquitous Computing, International Conference, EUC 2006, Seoul, Korea, August 1-4, 2006, Proceedings, pp. 1148-1157, 2006, Springer, 3-540-36679-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Tsung-Yi Ho, Yao-Wen Chang, Sao-Jie Chen, D. T. Lee |
Crosstalk- and performance-driven multilevel full-chip routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(6), pp. 869-878, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Hongbing Fan, Yu-Liang Wu |
Crossbar based design schemes for switch boxes and programmable interconnection networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 910-915, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
switch matrix, FPGA, routing, interconnection network, layout, crossbar, switch box |
21 | Tai-Chen Chen, Yao-Wen Chang |
Multilevel full-chip gridless routing considering optical proximity correction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 1160-1163, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Chiu-Wing Sham, Evangeline F. Y. Young |
Congestion prediction in floorplanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 1107-1110, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Eric Hsiao-Kuang Wu, Y. Ahmet Sekercioglu, Greg Daley, Sathya Narayanan |
An Analytical Study of Direct and Indirect Signaling for Mobile IPv6 in Mobile-to-Mobile Communications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCC ![In: Proceedings of the 10th IEEE Symposium on Computers and Communications (ISCC 2005), 27-30 June 2005, Murcia, Cartagena, Spain, pp. 65-70, 2005, IEEE Computer Society, 0-7695-2373-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Qinghua Liu, Malgorzata Marek-Sadowska |
A congestion-driven placement framework with local congestion prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005, pp. 488-493, 2005, ACM, 1-59593-057-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
cell padding, congestion prediction, placement migration |
21 | María Calderón, Carlos Jesus Bernardos, Marcelo Bagnulo, Ignacio Soto |
Securing Route Optimisation in NEMO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WiOpt ![In: 3rd International Symposium on Modeling and Optimization in Mobile, Ad-Hoc and Wireless Networks (WiOpt 2005), 4-6 April 2005, Trentino, Italy, pp. 248-254, 2005, IEEE Computer Society, 0-7695-2267-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Nak-Woong Eum, Taewhan Kim, Chong-Min Kyung |
CeRA: A Router for Symmetrical FPGAs Based on Exact Routing Density Evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 53(7), pp. 829-842, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Gi-Joon Nam, Fadi A. Aloul, Karem A. Sakallah, Rob A. Rutenbar |
A Comparative Study of Two Boolean Formulations of FPGA Detailed Routing Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 53(6), pp. 688-696, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Ulrich Brenner, Anna Pauli, Jens Vygen |
Almost optimum placement legalization by minimum cost flow and dynamic programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2004 International Symposium on Physical Design, ISPD 2004, Phoenix, Arizona, USA, April 18-21, 2004, pp. 2-9, 2004, ACM, 1-58113-817-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
placement, legalization, minimum-cost flow, detailed placement |
21 | Saurabh N. Adya, S. Chaturvedi, Jarrod A. Roy, David A. Papa, Igor L. Markov |
Unification of partitioning, placement and floorplanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 550-557, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Andrew B. Kahng, Igor L. Markov, Sherief Reda |
On legalization of row-based placements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004, pp. 214-219, 2004, ACM, 1-58113-853-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
min-cut placement, legalization, detailed placement |
21 | Prabhakar Kudva, Andrew Sullivan, William E. Dougherty |
Measurements for structural logic synthesis optimizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(6), pp. 665-674, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
21 | Yao-Wen Chang, Kai Zhu 0001, Guang-Ming Wu, D. F. Wong 0001, C. K. Wong |
Analysis of FPGA/FPIC switch modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 8(1), pp. 11-37, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
FPIC, FPGA, synthesis, layout, Computer-aided design of VLSI |
21 | Seokjin Lee, Hua Xiang 0001, D. F. Wong 0001, Richard Y. Sun |
Wire type assignment for FPGA routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2003, Monterey, CA, USA, February 23-25, 2003, pp. 61-67, 2003, ACM, 1-58113-651-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
min-cost flow algorithm, wire type assignment, FPGA routing |
21 | Steve T. W. Lai, Evangeline F. Y. Young, Chris C. N. Chu |
A New and Efficient Congestion Evaluation Model in Floorplanning: Wire Density Control with Twin Binary Trees. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 10856-10861, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
21 | Jinan Lou, Shashidhar Thakur, Shankar Krishnamoorthy, Henry S. Sheng |
Estimating routing congestion using probabilistic analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(1), pp. 32-41, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Russell Tessier |
Fast placement approaches for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 7(2), pp. 284-305, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
field-programmable gate arrays, synthesis, layout, Computer-aided design of VLSI |
21 | Amit Singh 0001, Malgorzata Marek-Sadowska |
Efficient circuit clustering for area and power reduction in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2002, Monterey, CA, USA, February 24-26, 2002, pp. 59-66, 2002, ACM, 1-58113-452-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Wai-Chiu Wong, Chiu-Wing Sham, Evangeline F. Y. Young |
Congestion Estimation with Buffer Planning in Floorplan Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2002 Design, Automation and Test in Europe Conference and Exposition (DATE 2002), 4-8 March 2002, Paris, France, pp. 696-701, 2002, IEEE Computer Society, 0-7695-1471-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar |
Hybrid Routing for FPGAs by Integrating Boolean Satisfiability with Geometric Search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 360-369, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Prabhakar Kudva, Andrew Sullivan, William E. Dougherty |
Metrics for structural logic synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, ICCAD 2002, San Jose, California, USA, November 10-14, 2002, pp. 551-556, 2002, ACM / IEEE Computer Society, 0-7803-7607-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Chau-Shen Chen, TingTing Hwang, C. L. Liu 0001 |
Architecture driven circuit partitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 9(2), pp. 383-389, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
21 | Jinan Lou, Shankar Krishnamoorthy, Henry S. Sheng |
Estimating routing congestion using probabilistic analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2001 International Symposium on Physical Design, ISPD 2001, Sonoma County, CA, USA, April 1-4, 2001, pp. 112-117, 2001, ACM, 1-58113-347-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
21 | Gi-Joon Nam, Fadi A. Aloul, Karem A. Sakallah, Rob A. Rutenbar |
A comparative study of two Boolean formulations of FPGA detailed routing constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2001 International Symposium on Physical Design, ISPD 2001, Sonoma County, CA, USA, April 1-4, 2001, pp. 222-227, 2001, ACM, 1-58113-347-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
21 | Yao-Wen Chang, D. F. Wong 0001, C. K. Wong |
Universal switch modules for FPGA design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 1(1), pp. 80-101, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
21 | Yoshihiro Konno, Kazushi Nakamura, Tatsushige Bitoh, Koji Saga, Seiken Yano |
A Consistent Scan Design System for Large-Scale ASICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 5th Asian Test Symposium (ATS '96), November 20-22, 1996, Hsinchu, Taiwan, pp. 82-87, 1996, IEEE Computer Society, 0-8186-7478-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
21 | Larry McMurchie, Carl Ebeling |
PathFinder: A Negotiation-based Performance-driven Router for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the Third International ACM Symposium on Field-Programmable Gate Arrays,FPGA 1995, Monterey, California, USA, February 12-14, 1995, pp. 111-117, 1995, ACM, 0-89791-743-X. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
21 | Jason Lee, Lesley Shannon |
Predicting the performance of application-specific NoCs implemented on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, FPGA 2010, Monterey, California, USA, February 21-23, 2010, pp. 23-32, 2010, ACM, 978-1-60558-911-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
performance, FPGAs, topologies, heterogeneous, NoCs, homogeneous, application-specific, routability |
21 | Keith So |
Solving hard instances of FPGA routing with a congestion-optimal restrained-norm path search space. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2007 International Symposium on Physical Design, ISPD 2007, Austin, Texas, USA, March 18-21, 2007, pp. 151-158, 2007, ACM, 978-1-59593-613-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
negotiated congestion, routability-driven routing, FPGA |
21 | Mehdi Saeedi, Morteza Saheb Zamani, Ali Jahanian 0001 |
Prediction and reduction of routing congestion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2006 International Symposium on Physical Design, ISPD 2006, San Jose, California, USA, April 9-12, 2006, pp. 72-77, 2006, ACM, 1-59593-299-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
placement, physical design, congestion, routability |
21 | Jurjen Westra, Patrick Groeneveld |
Is probabilistic congestion estimation worthwhile? ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Seventh International Workshop on System-Level Interconnect Prediction (SLIP 2005), San Francisco, CA, USA, April 2-3, 2005, Proceedings, pp. 99-106, 2005, ACM, 1-59593-033-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
congestion estimation, degenerate global routing, probabilistic congestion estimation, congestion, routability |
21 | Xiaojian Yang, Maogang Wang, Ryan Kastner, Soheil Ghiasi, Majid Sarrafzadeh |
Congestion reduction during placement with provably good approximation bound. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 8(3), pp. 316-333, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
placement, Physical design, congestion, routability |
21 | Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen 0001, Yici Cai, Chung-Kuan Cheng, Jun Gu |
An integrated floorplanning with an efficient buffer planning algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2003 International Symposium on Physical Design, ISPD 2003, Monterey, CA, USA, April 6-9, 2003, pp. 136-142, 2003, ACM, 1-58113-650-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
floorplanning, buffer insertion, routability |
21 | Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen 0001, Yici Cai, Chung-Kuan Cheng, Jun Gu |
Dynamic global buffer planning optimization based on detail block locating and congestion analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 806-811, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
congestion, floorplanning, buffer insertion, routability |
21 | Jeffrey Z. Su, Wayne Wei-Ming Dai |
Post-route optimization for improved yield using a rubber-band wiring model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997, pp. 700-706, 1997, IEEE Computer Society / ACM, 0-8186-8200-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Rubber-Band, Topological Wiring Even Wire Distribution, Yield, Design for Manufacturability, Spacing, Bridge Fault, Routability, Critical Area, Layout Optimization, Routing Congestion |
21 | Keumog Ahn, Sartaj Sahni |
NP-Hard Module Rotation Problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 42(12), pp. 1506-1510, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
NP-hard module rotation problems, circuit modules, performance, computational complexity, circuit layout CAD, circuit layout CAD, routability |
21 | Chung-Kuan Cheng, So-Zen Yao, T. C. Hu |
The Orientation of Modules Based on Graph Decomposition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 40(6), pp. 774-780, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
layout stage, total net length, printed circuits, computational complexity, VLSI, VLSI, graph theory, NP-complete, modules, orientation, circuit layout CAD, routability, minimum cut, graph decomposition, printed circuit board, graph problem |
19 | Zijun Li 0005, Ziran Zhu, Huan He, Jianli Chen |
An effective routability-driven packing algorithm for large-scale heterogeneous FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 94, pp. 102098, January 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
19 | Yilu Chen, Miaodi Su, Hongzhi Ding, Shaohong Weng, Zhifeng Lin, Xiqiong Bai |
High-correlation 3D routability estimation for congestion-guided global routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 80(3), pp. 3114-3141, February 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
19 | Fangzhou Wang, Jinwei Liu, Wing Ho Lau, Haocheng Li, Evangeline F. Y. Young |
FastPass: A Fast Pin Access Analysis Framework for Detailed Routability Enhancement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(5), pp. 1566-1579, May 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
19 | Chen-Chia Chang, Jingyu Pan, Zhiyao Xie, Tunhou Zhang, Jiang Hu, Yiran Chen 0001 |
Toward Fully Automated Machine Learning for Routability Estimator Development. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(3), pp. 970-982, March 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
19 | Hailiang Li, Yan Huo, Yan Wang, Xu Yang, Miaohui Hao, Xiao Wang |
A Lightweight Inception Boosted U-Net Neural Network for Routability Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2402.10937, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
19 | Bing-Xun Song, Ting Xin Lin, Yih-Lang Li |
Routability Booster " Synthesize a Routing Friendly Standard Cell Library by Relaxing BEOL Resources. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2024 International Symposium on Physical Design, ISPD 2024, Taipei, Taiwan, March 12-15, 2024, pp. 185-193, 2024, ACM. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
19 | Chien-Pang Lu, Iris Hui-Ru Jiang, Chung-Ching Peng, Mohd Mawardi Mohd Razha, Alessandro Uber |
Power Sub-Mesh Construction in Multiple Power Domain Design with IR Drop and Routability Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2024 International Symposium on Physical Design, ISPD 2024, Taipei, Taiwan, March 12-15, 2024, pp. 205-212, 2024, ACM. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
19 | Jingsong Chen, Jian Kuang 0001, Guowei Zhao, Dennis J.-H. Huang, Evangeline F. Y. Young |
PROS 2.0: A Plug-In for Routability Optimization and Routed Wirelength Estimation Using Deep Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(1), pp. 164-177, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Daijoon Hyun, Sunwha Koh, Younggwang Jung, Taeyoung Kim, Youngsoo Shin |
Routability Optimization of Extreme Aspect Ratio Design through Non-uniform Placement Utilization and Selective Flip-flop Stacking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 28(4), pp. 50:1-50:19, July 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Ping-Wei Huang, Yao-Wen Chang |
Routability-driven Power/Ground Network Optimization Based on Machine Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 28(4), pp. 53:1-53:27, July 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Jonathan W. Greene |
FPGA Mux Usage and Routability Estimates without Explicit Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 141-147, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Daeyeon Kim, Jakang Lee, Seokhyeong Kang |
Routability Prediction using Deep Hierarchical Classification and Regression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2023, Antwerp, Belgium, April 17-19, 2023, pp. 1-2, 2023, IEEE, 978-3-9819263-7-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Andrew David Gunter, Steve Wilton |
Reformulating the FPGA Routability Prediction Problem with Machine Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2023, Marina Del Rey, CA, USA, May 8-11, 2023, pp. 230-232, 2023, IEEE, 979-8-3503-1205-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Jai-Ming Lin, Tsung-Chun Tsai, Rui-Ting Shen |
Routability-Driven Orientation-Aware Analytical Placement for System in Package. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: IEEE/ACM International Conference on Computer Aided Design, ICCAD 2023, San Francisco, CA, USA, October 28 - Nov. 2, 2023, pp. 1-8, 2023, IEEE, 979-8-3503-2225-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Seonghyeon Park, Daeyeon Kim, Seongbin Kwon, Seokhyeong Kang |
Routability Prediction and Optimization Using Explainable AI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: IEEE/ACM International Conference on Computer Aided Design, ICCAD 2023, San Francisco, CA, USA, October 28 - Nov. 2, 2023, pp. 1-8, 2023, IEEE, 979-8-3503-2225-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Xun Jiang, Zizheng Guo, Zhuomin Chai, Yuxiang Zhao, Yibo Lin, Runsheng Wang, Ru Huang |
Invited Paper: Accelerating Routability and Timing Optimization with Open-Source AI4EDA Dataset CircuitNet and Heterogeneous Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: IEEE/ACM International Conference on Computer Aided Design, ICCAD 2023, San Francisco, CA, USA, October 28 - Nov. 2, 2023, pp. 1-9, 2023, IEEE, 979-8-3503-2225-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Younggwang Jung, Daijoon Hyun, Soyoon Choi, Youngsoo Shin |
Power Distribution Network Optimization Using HLA-GCN for Routability Enhancement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: IEEE/ACM International Conference on Computer Aided Design, ICCAD 2023, San Francisco, CA, USA, October 28 - Nov. 2, 2023, pp. 1-8, 2023, IEEE, 979-8-3503-2225-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Wonjae Lee, Insu Cho, Gangmin Cho, Youngsoo Shin |
Routability-Driven Power Distribution Network Synthesis with IR-Drop Budgeting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MLCAD ![In: 5th ACM/IEEE Workshop on Machine Learning for CAD, MLCAD 2023, Snowbird, UT, USA, September 10-13, 2023, pp. 1-6, 2023, IEEE, 979-8-3503-0955-3. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Seonghyeon Park, Daeyeon Kim, Seokhyeong Kang |
Invited: Acceleration on Physical Design: Machine Learning-based Routability Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: Proceedings of the ACM International Workshop on System-Level Interconnect Pathfinding, SLIP 2023, San Francisco, CA, USA, 2 November 2023, pp. 5:1-5:6, 2023, ACM. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Chieh-Yu Cheng, Ting-Chi Wang |
Routability-aware Placement Guidance Generation for Mixed-size Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 24th International Symposium on Quality Electronic Design, ISQED 2023, San Francisco, CA, USA, April 5-7, 2023, pp. 1-7, 2023, IEEE, 979-8-3503-3475-3. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Zhijie Cai, Peng Zou, Zhengtao Wu, Xingyu Tong, Jun Yu 0010, Jianli Chen, Yao-Wen Chang |
PUFFER: A Routability-Driven Placement Framework via Cell Padding with Multiple Features and Strategy Exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: 60th ACM/IEEE Design Automation Conference, DAC 2023, San Francisco, CA, USA, July 9-13, 2023, pp. 1-6, 2023, IEEE, 979-8-3503-2348-1. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Jai-Ming Lin, Liang-Chi Zane, Min-Chia Tsai, Yung-Chen Chen, Che-Li Lin, Chen-Fa Tsai |
PPOM: An Effective Post-Global Placement Optimization Methodology for Better Wirelength and Routability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 30(11), pp. 1783-1793, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Chung-Kuan Cheng, Andrew B. Kahng, Hayoung Kim, Minsoo Kim, Daeyeal Lee, Dongwon Park, Mingyu Woo |
PROBE2.0: A Systematic Framework for Routability Assessment From Technology to Design in Advanced Nodes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(5), pp. 1495-1508, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Jingyu Pan, Chen-Chia Chang, Zhiyao Xie, Ang Li 0005, Minxue Tang, Tunhou Zhang, Jiang Hu, Yiran Chen 0001 |
Towards Collaborative Intelligence: Routability Estimation based on Decentralized Private Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2203.16009, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Sheiny Fabre Almeida, José Luís Güntzel, Laleh Behjat, Cristina Meinhardt |
Routability-Driven Detailed Placement Using Reinforcement Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, VLSI-SoC 2022, Patras, Greece, October 3-5, 2022, pp. 1-2, 2022, IEEE, 978-1-6654-9005-4. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Hao Chen 0059, Walker J. Turner, David Z. Pan, Haoxing Ren |
Routability-Aware Placement for Advanced FinFET Mixed-Signal Circuits using Satisfiability Modulo Theories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2022 Design, Automation & Test in Europe Conference & Exhibition, DATE 2022, Antwerp, Belgium, March 14-23, 2022, pp. 160-165, 2022, IEEE, 978-3-9819263-6-1. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Miaodi Su, Hongzhi Ding, Shaohong Weng, Changzhong Zou, Zhonghua Zhou, Yilu Chen, Jianli Chen, Yao-Wen Chang |
High-Correlation 3D Routability Estimation for Congestion-guided Global Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: 27th Asia and South Pacific Design Automation Conference, ASP-DAC 2022, Taipei, Taiwan, January 17-20, 2022, pp. 580-585, 2022, IEEE, 978-1-6654-2135-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Jiayuan He 0003, Udit Agarwal, Yihang Yang, Rajit Manohar, Keshav Pingali |
SPRoute 2.0: A detailed-routability-driven deterministic parallel global router with soft capacity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: 27th Asia and South Pacific Design Automation Conference, ASP-DAC 2022, Taipei, Taiwan, January 17-20, 2022, pp. 586-591, 2022, IEEE, 978-1-6654-2135-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Jai-Ming Lin, Hao-Yuan Hsieh, Hsuan Kung, Hao-Jia Lin |
Routability-Driven Analytical Placement with Precise Penalty Models for Large-Scale 3D ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2022, San Diego, California, USA, 30 October 2022 - 3 November 2022, pp. 119:1-119:8, 2022, ACM, 978-1-4503-9217-4. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Yuxuan Pan, Zhonghua Zhou, André Ivanov |
Routability-driven Global Routing with 3D Congestion Estimation Using a Customized Neural Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 23rd International Symposium on Quality Electronic Design, ISQED 2022, Santa Clara, CA, USA, April 6-7, 2022, pp. 1-6, 2022, IEEE, 978-1-6654-9466-3. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Jingyu Pan, Chen-Chia Chang, Zhiyao Xie, Ang Li 0005, Minxue Tang, Tunhou Zhang, Jiang Hu, Yiran Chen 0001 |
Towards collaborative intelligence: routability estimation based on decentralized private data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10 - 14, 2022, pp. 961-966, 2022, ACM, 978-1-4503-9142-9. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Abeer Y. Al-Hyari, Hannah Szentimrey, Ahmed Shamli, Timothy Martin, Gary Gréwal, Shawki Areibi |
A Deep Learning Framework to Predict Routability for FPGA Circuit Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 14(3), pp. 16:1-16:28, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Song Mu, Yi Zeng, Bo Wang |
Routability-Enhanced Scheduling for Application Mapping on CGRAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 9, pp. 92358-92366, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Jia-Hong Chang, Shao-Yun Fang |
Placement-guided pin layout substitution for routability optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 114, pp. 105151, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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19 | Daeyeon Kim, Hyun-jeong Kwon, Sung-Yun Lee, Seungwon Kim, Mingyu Woo, Seokhyeong Kang |
Machine Learning Framework for Early Routability Prediction with Artificial Netlist Generator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2021, Grenoble, France, February 1-5, 2021, pp. 1809-1814, 2021, IEEE, 978-3-9819263-5-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Siting Liu 0002, Qi Sun 0002, Peiyu Liao, Yibo Lin, Bei Yu 0001 |
Global Placement with Deep Learning-Enabled Explicit Routability Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2021, Grenoble, France, February 1-5, 2021, pp. 1821-1824, 2021, IEEE, 978-3-9819263-5-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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19 | Chen-Chia Chang, Jingyu Pan, Tunhou Zhang, Zhiyao Xie, Jiang Hu, Weiyi Qi, Chung-Wei Lin, Rongjian Liang, Joydeep Mitra, Elias Fallon, Yiran Chen 0001 |
Automatic Routability Predictor Development Using Neural Architecture Search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: IEEE/ACM International Conference On Computer Aided Design, ICCAD 2021, Munich, Germany, November 1-4, 2021, pp. 1-9, 2021, IEEE, 978-1-6654-4507-8. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Jai-Ming Lin, Chung-Wei Huang, Liang-Chi Zane, Min-Chia Tsai, Che-Li Lin, Chen-Fa Tsai |
Routability-driven Global Placer Target on Removing Global and Local Congestion for VLSI Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: IEEE/ACM International Conference On Computer Aided Design, ICCAD 2021, Munich, Germany, November 1-4, 2021, pp. 1-8, 2021, IEEE, 978-1-6654-4507-8. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Timothy Martin, Shawki Areibi, Gary Gréwal |
Effective Machine-Learning Models for Predicting Routability During FPGA Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MLCAD ![In: 3rd ACM/IEEE Workshop on Machine Learning for CAD, MLCAD 2021, Raleigh, NC, USA, August 30 - Sept. 3, 2021, pp. 1-6, 2021, IEEE, 978-1-6654-3166-8. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Sunwha Koh, Younggwang Jung, Daijoon Hyun, Youngsoo Shin |
Routability Optimization for Extreme Aspect Ratio Design Using Convolutional Neural Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021, pp. 1-4, 2021, IEEE, 978-1-7281-9201-7. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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19 | Dongwon Park, Daeyeal Lee, Ilgweon Kang, Chester Holtz, Sicun Gao, Bill Lin 0001, Chung-Kuan Cheng |
Grid-Based Framework for Routability Analysis and Diagnosis With Conditional Design Rules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12), pp. 5097-5110, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Hannah Szentimrey, Abeer Y. Al-Hyari, Jérémy Foxcroft, Timothy Martin, David Noel, Gary William Grewal, Shawki Areibi |
Machine Learning for Congestion Management and Routability Prediction within FPGA Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 25(5), pp. 37:1-37:25, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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19 | Jingyu Pan, Chen-Chia Chang, Tunhou Zhang, Zhiyao Xie, Jiang Hu, Weiyi Qi, Chung-Wei Lin, Rongjian Liang, Joydeep Mitra, Elias Fallon, Yiran Chen 0001 |
Automatic Routability Predictor Development Using Neural Architecture Search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2012.01737, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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19 | Jingsong Chen, Jian Kuang 0001, Guowei Zhao, Dennis J.-H. Huang, Evangeline F. Y. Young |
PROS: A Plug-in for Routability Optimization applied in the State-of-the-art commercial EDA tool using deep learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: IEEE/ACM International Conference On Computer Aided Design, ICCAD 2020, San Diego, CA, USA, November 2-5, 2020, pp. 17:1-17:8, 2020, IEEE. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Chung-Kuan Cheng, Chia-Tung Ho, Daeyeal Lee, Dongwon Park |
A Routability-Driven Complimentary-FET (CFET) Standard Cell Synthesis Framework using SMT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: IEEE/ACM International Conference On Computer Aided Design, ICCAD 2020, San Diego, CA, USA, November 2-5, 2020, pp. 158:1-158:8, 2020, IEEE. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Run-Yi Wang, Yao-Wen Chang |
Routability-Aware Pin Access Optimization for Monolithic 3D Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: IEEE/ACM International Conference On Computer Aided Design, ICCAD 2020, San Diego, CA, USA, November 2-5, 2020, pp. 2:1-2:6, 2020, IEEE. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Jinwei Liu, Chak-Wa Pui, Fangzhou Wang, Evangeline F. Y. Young |
CUGR: Detailed-Routability-Driven 3D Global Routing with Probabilistic Resource Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: 57th ACM/IEEE Design Automation Conference, DAC 2020, San Francisco, CA, USA, July 20-24, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-1085-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Abeer Y. Al-Hyari, Ziad Abuowaimer, Timothy Martin, Gary Gréwal, Shawki Areibi, Anthony Vannelli |
Novel Congestion-estimation and Routability-prediction Methods based on Machine Learning for Modern FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 12(3), pp. 16:1-16:25, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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19 | Jai-Ming Lin, You-Lun Deng, Szu-Ting Li, Bo-Heng Yu, Li-Yen Chang, Te-Wei Peng |
Regularity-Aware Routability-Driven Macro Placement Methodology for Mixed-Size Circuits With Obstacles. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 27(1), pp. 57-68, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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19 | Prasun Datta, Shyamapada Mukherjee |
Architecture-aware routability-driven placer for large-scale mixed-size designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Circuits Devices Syst. ![In: IET Circuits Devices Syst. 13(8), pp. 1209-1220, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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19 | Yuan Wang, Martin A. Trefzer, Simon J. Bale, James Alfred Walker, Andy M. Tyrrell |
Multi-objective optimisation algorithm for routability and timing driven circuit clustering on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Comput. Digit. Tech. ![In: IET Comput. Digit. Tech. 13(4), pp. 273-281, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Chung-Kuan Cheng, Andrew B. Kahng, Ilgweon Kang, Lutong Wang |
RePlAce: Advancing Solution Quality and Routability Validation in Global Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(9), pp. 1717-1730, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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19 | Wei-Kai Cheng, Chih-Shuan Wu |
Machine Learning Techniques for Building and Evaluation of Routability-driven Macro Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCE-TW ![In: IEEE International Conference on Consumer Electronics - Taiwan, ICCE-TW 2019, Yilan, Taiwan, May 20-22, 2019, pp. 1-2, 2019, IEEE, 978-1-7281-3279-2. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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19 | Yu-Hung Huang, Zhiyao Xie, Guan-Qi Fang, Tao-Chun Yu, Haoxing Ren, Shao-Yun Fang, Yiran Chen 0001, Jiang Hu |
Routability-Driven Macro Placement with Embedded CNN-Based Prediction Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Florence, Italy, March 25-29, 2019, pp. 180-185, 2019, IEEE, 978-3-9819263-2-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Abeer Alhyari, Ahmed Shamli, Ziad Abuwaimer, Shawki Areibi, Gary Gréwal |
A Deep Learning Framework to Predict Routability for FPGA Circuit Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 29th International Conference on Field Programmable Logic and Applications, FPL 2019, Barcelona, Spain, September 8-12, 2019, pp. 334-341, 2019, IEEE, 978-1-7281-4884-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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19 | Dongwon Park, Ilgweon Kang, Yeseong Kim, Sicun Gao, Bill Lin 0001, Chung-Kuan Cheng |
ROAD: Routability Analysis and Diagnosis Framework Based on SAT Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2019 International Symposium on Physical Design, ISPD 2019, San Francisco, CA, USA, April 14-17, 2019, pp. 65-72, 2019, ACM, 978-1-4503-6253-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Genggeng Liu, Zhen Zhuang, Wenzhong Guo, Ting-Chi Wang |
RDTA: An Efficient Routability-Driven Track Assignment Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 2019 on Great Lakes Symposium on VLSI, GLSVLSI 2019, Tysons Corner, VA, USA, May 9-11, 2019, pp. 315-318, 2019, ACM, 978-1-4503-6252-8. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Zhonghua Zhou, Sunmeet Chahal, Tsung-Yi Ho, André Ivanov |
Supervised-Learning Congestion Predictor For Routability-Driven Global Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-DAT ![In: International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019, Hsinchu, Taiwan, April 22-25, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-0655-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Jai-Ming Lin, Szu-Ting Li, Yi-Ting Wang |
Routability-driven Mixed-size Placement Prototyping Approach Considering Design Hierarchy and Indirect Connectivity Between Macros. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019, Las Vegas, NV, USA, June 02-06, 2019, pp. 119, 2019, ACM, 978-1-4503-6725-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Oleg Petelin, Vaughn Betz |
Wotan: Evaluating FPGA Architecture Routability without Benchmarks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 11(2), pp. 11:1-11:23, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
19 | Wuxi Li, Shounak Dhar, David Z. Pan |
UTPlaceF: A Routability-Driven FPGA Placer With Physical and Congestion Aware Packing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(4), pp. 869-882, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
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