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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 4401 occurrences of 2030 keywords
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Results
Found 5686 publication records. Showing 5677 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
11 | Paul Scheffler, Florian Zaruba, Fabian Schuiki, Torsten Hoefler, Luca Benini |
Indirection Stream Semantic Register Architecture for Efficient Sparse-Dense Linear Algebra. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2021, Grenoble, France, February 1-5, 2021, pp. 1787-1792, 2021, IEEE, 978-3-9819263-5-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Rozhin Yasaei, Shih-Yuan Yu, Mohammad Abdullah Al Faruque |
GNN4TJ: Graph Neural Networks for Hardware Trojan Detection at Register Transfer Level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2021, Grenoble, France, February 1-5, 2021, pp. 1504-1509, 2021, IEEE, 978-3-9819263-5-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Ahmad M. Radaideh, Paul V. Gratz |
CMRC: Comprehensive Microarchitectural Register Coalescing for GPGPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2021, Grenoble, France, February 1-5, 2021, pp. 1803-1808, 2021, IEEE, 978-3-9819263-5-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai |
Multiport Register File Design for High-Performance Embedded Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: 14th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2021, Singapore, Singapore, December 20-23, 2021, pp. 281-286, 2021, IEEE, 978-1-6654-3860-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Mikolaj Bojanczyk, Bartek Klin, Joshua Moerman |
Orbit-Finite-Dimensional Vector Spaces and Weighted Register Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LICS ![In: 36th Annual ACM/IEEE Symposium on Logic in Computer Science, LICS 2021, Rome, Italy, June 29 - July 2, 2021, pp. 1-13, 2021, IEEE, 978-1-6654-4895-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Cinthia Paola Pascual Cáceres, José Vicente Berná-Martínez, Francisco Maciá Pérez, Iren Lorenzo-Fonseca |
Blockchain Validity Register for Healthcare Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BLOCKCHAIN ![In: Blockchain and Applications - 3rd International Congress, BLOCKCHAIN 2021, Salamanca, Spain, 6-8 October, 2021, pp. 64-73, 2021, Springer, 978-3-030-86161-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Fajar Wijitrisnanto, Sarwono Sutikno, Septafiansyah Dwi Putra |
Efficient Machine Learning Model for Hardware Trojan Detection on Register Transfer Level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSPIS ![In: 4th International Conference on Signal Processing and Information Security, ICSPIS 2021, Dubai, United Arab Emirates, November 24-25, 2021, pp. 37-40, 2021, IEEE, 978-1-6654-3796-7. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Changming Cui, Junlin Huang |
A 3DIC interconnect interface test and repair scheme based on Hybrid IEEE1838 Die Wrapper Register and BIST circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 26th IEEE European Test Symposium, ETS 2021, Bruges, Belgium, May 24-28, 2021, pp. 1-2, 2021, IEEE, 978-1-6654-1849-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Wojciech Czerwinski, Antoine Mottet, Karin Quaas |
New Techniques for Universality in Unambiguous Register Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICALP ![In: 48th International Colloquium on Automata, Languages, and Programming, ICALP 2021, July 12-16, 2021, Glasgow, Scotland (Virtual Conference)., pp. 129:1-129:16, 2021, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-195-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Simon Dierl, Falk Howar |
A Taxonomy and Reductions for Common Register Automata Formalisms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Model Checking, Synthesis, and Learning ![In: Model Checking, Synthesis, and Learning - Essays Dedicated to Bengt Jonsson on The Occasion of His 60th Birthday, pp. 186-218, 2021, Springer, 978-3-030-91383-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Haining Wang, Xin Xie, Allen Riddell |
The Challenge of Vernacular and Classical Chinese Cross-Register Authorship Attribution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHR ![In: Proceedings of the Conference on Computational Humanities Research, CHR2021, Amsterdam, The Netherlands, November 17-19, 2021., pp. 299-309, 2021, CEUR-WS.org. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
|
11 | Xiu-Wen Ye, Yuan Yuan Pan, Yu-Yan Peng, GuiQing Tan, GinQing Tan |
Big Data Grave Register Information Management System Outside Cemeteries Under Internet of Things. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SGIoT ![In: Smart Grid and Internet of Things - 5th EAI International Conference, SGIoT 2021, Virtual Event, December 18-19, 2021, Proceedings, pp. 128-137, 2021, Springer, 978-3-031-20397-8. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Peer Adelt, Bastian Koppelmann, Wolfgang Mueller, Christoph Scheytt |
Register and Instruction Coverage Analysis for Different RISC-V ISA Modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MBMV ![In: Methods and Description Languages for Modelling and Verification of Circuits and Systems, MBMV 2021, 24th Workshop, Virtual Event, Germany, March 18-19, 2021, pp. 1-8, 2021, VDE/IEEE, 978-3-8007-5500-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
|
11 | Vinicius Vielmo Cogo, Alysson Bessani |
Brief Announcement: Auditable Register Emulations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DISC ![In: 35th International Symposium on Distributed Computing, DISC 2021, October 4-8, 2021, Freiburg, Germany (Virtual Conference)., pp. 53:1-53:4, 2021, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-210-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Eyüp Eröz, Erkan Tanyildizi, Fatih Özkaynak |
Determination of Suitable Configuration Parameters for Linear Feedback Shift Register using Binary Bat Optimization Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCON ![In: 19th IEEE International Conference on Smart Technologies, EUROCON 2021, Lviv, Ukraine, July 6 - 8, 2021, pp. 348-351, 2021, IEEE, 978-1-6654-3300-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Martin Kostal, Michal Sojka |
Register file management for PRET machines: work-in-progress. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: CODES/ISSS 2021, International Conference on Hardware/Software Codesign and System Synthesis, Virtual Event, October 10-13, 2021, pp. 31-32, 2021, ACM, 978-1-4503-9076-7. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Jade Mekki, Delphine Battistelli, Nicolas Béchet, Gwénolé Lecorvé |
TREMoLo : un corpus multi-étiquettes de tweets en français pour la caractérisation des registres de langue (TREMoLo : a Multi-Label Corpus of French Tweets for Language Register Characterization). ![Search on Bibsonomy](Pics/bibsonomy.png) |
TALN (1) ![In: Actes de la 28e Conférence sur le Traitement Automatique des Langues Naturelles. Volume 1 : conférence principale, TALN 2021, Lille, France, June 28 - July 2, 2021, pp. 237-245, 2021, ATALA. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
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11 | Ilya Tuzov, Pablo Andreu, Laura Medina, Tomás Picornell, Antonio Robles, Pedro López 0001, José Flich, Carles Hernández 0001 |
Improving the Robustness of Redundant Execution with Register File Randomization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: IEEE/ACM International Conference On Computer Aided Design, ICCAD 2021, Munich, Germany, November 1-4, 2021, pp. 1-9, 2021, IEEE, 978-1-6654-4507-8. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Subhajit Dutta Chowdhury, Kaixin Yang, Pierluigi Nuzzo 0002 |
ReIGNN: State Register Identification Using Graph Neural Networks for Circuit Reverse Engineering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: IEEE/ACM International Conference On Computer Aided Design, ICCAD 2021, Munich, Germany, November 1-4, 2021, pp. 1-9, 2021, IEEE, 978-1-6654-4507-8. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Vassos Hadzilacos, Xing Hu 0009, Sam Toueg |
On Register Linearizability and Termination. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PODC ![In: PODC '21: ACM Symposium on Principles of Distributed Computing, Virtual Event, Italy, July 26-30, 2021, pp. 521-531, 2021, ACM, 978-1-4503-8548-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Hidehiro Fujiwara, Yi-Hsin Nien, Chih-Yu Lin, Hsien-Yu Pan, Hao-Wen Hsu, Shin-Rung Wu, Yao-Yi Liu, Yen-Huei Chen, Hung-Jen Liao, Jonathan Chang |
A 5nm 5.7GHz@1.0V and 1.3GHz@0.5V 4kb Standard-Cell- Based Two-Port Register File with a 16T Bitcell with No Half-Selection Issue. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2021, San Francisco, CA, USA, February 13-22, 2021, pp. 340-342, 2021, IEEE, 978-1-7281-9549-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Léo Exibard, Emmanuel Filiot, Ayrat Khalimov 0001 |
Church Synthesis on Register Automata over Linearly Ordered Data Domains. ![Search on Bibsonomy](Pics/bibsonomy.png) |
STACS ![In: 38th International Symposium on Theoretical Aspects of Computer Science, STACS 2021, March 16-19, 2021, Saarbrücken, Germany (Virtual Conference)., pp. 28:1-28:16, 2021, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-180-1. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Corentin Barloy, Lorenzo Clemente |
Bidimensional Linear Recursive Sequences and Universality of Unambiguous Register Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
STACS ![In: 38th International Symposium on Theoretical Aspects of Computer Science, STACS 2021, March 16-19, 2021, Saarbrücken, Germany (Virtual Conference)., pp. 8:1-8:15, 2021, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-180-1. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Liu Liu 0009, Hongdong Li, Haodong Yao, Ruyi Zha |
PluckerNet: Learn To Register 3D Line Reconstructions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CVPR ![In: IEEE Conference on Computer Vision and Pattern Recognition, CVPR 2021, virtual, June 19-25, 2021, pp. 1842-1852, 2021, Computer Vision Foundation / IEEE. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
|
11 | Bernhard Göschlberger, Dragos Deliu |
BiRank vs PageRank: Using SNA on Company Register Data for Fiscal Risk Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SNAMS ![In: Eighth International Conference on Social Network Analysis, Management and Security, SNAMS 2021, Gandia, Spain, December 6-9, 2021, pp. 1-6, 2021, IEEE, 978-1-6654-9495-3. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Yongwon Shin, Hyojin Sung |
Hybrid Register Allocation with Spill Cost and Pattern Guided Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing - 34th International Workshop, LCPC 2021, Newark, DE, USA, October 13-14, 2021, Revised Selected Papers, pp. 33-49, 2021, Springer, 978-3-030-99371-9. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Uday Kiran Naidu Ekkurthi, Venkatesh Dasari, Jyoshnavi Akiri, Chua-Chin Wang |
A 100 MHz 9.14-mW 8-Bit Shift Register Using Double-Edge Triggered Flip-Flop. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021, pp. 1-4, 2021, IEEE, 978-1-7281-9201-7. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Adrian Benton, Hanyang Li, Igor Malioutov |
Cross-Register Projection for Headline Part of Speech Tagging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EMNLP (1) ![In: Proceedings of the 2021 Conference on Empirical Methods in Natural Language Processing, EMNLP 2021, Virtual Event / Punta Cana, Dominican Republic, 7-11 November, 2021, pp. 6475-6490, 2021, Association for Computational Linguistics. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Aiqing Wu, Mengni Bie, Longmei Nan, Wei Li 0131 |
Effective Register Allocation for Configurable VLIW Crypto-Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 14th IEEE International Conference on ASIC, ASICON 2021, Kunming, China, October 26-29, 2021, pp. 1-4, 2021, IEEE, 978-1-6654-3867-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Endri Kaja, Nicolas Gerlin, Mounika Vaddeboina, Luis Rivas, Sebastian Siegfried Prebeck, Zhao Han, Keerthikumara Devarajegowda, Wolfgang Ecker |
Towards Fault Simulation at Mixed Register-Transfer/Gate-Level Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021, Athens, Greece, October 6-8, 2021, pp. 1-6, 2021, IEEE, 978-1-6654-1609-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Hikaru Takayashiki, Masayuki Sato 0001, Kazuhiko Komatsu, Hiroaki Kobayashi |
Register Flush-free Runahead Execution for Modern Vector Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBAC-PAD ![In: 33rd IEEE International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2021, Belo Horizonte, Brazil, October 26-29, 2021, pp. 114-125, 2021, IEEE, 978-1-6654-4301-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Anupam Yadav |
Power Optimization of 8-bit Register on Ultra Scale FPGA using Low Voltage CMOS I/O Standard. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCCNT ![In: 12th International Conference on Computing Communication and Networking Technologies, ICCCNT 2021, Kharagpur, India, July 6-8, 2021, pp. 1-6, 2021, IEEE, 978-1-7281-8595-8. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Nusrat Farzana, Avinash Ayalasomayajula, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor |
SAIF: Automated Asset Identification for Security Verification at the Register Transfer Level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 39th IEEE VLSI Test Symposium, VTS 2021, San Diego, CA, USA, April 25-28, 2021, pp. 1-7, 2021, IEEE, 978-1-6654-1949-9. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Samuel Rönnqvist, Valtteri Skantsi, Miika Oinonen, Veronika Laippala |
Multilingual and Zero-Shot is Closing in on Monolingual Web Register Classification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NoDaLiDa ![In: Proceedings of the 23rd Nordic Conference on Computational Linguistics, NoDaLiDa 2021, Reykjavik, Iceland (Online), May 31 - June 2, 2021, pp. 157-165, 2021, Linköping University Electronic Press, Sweden, 978-91-7929-614-8. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
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11 | Leandro L. S. França, Julierme Pinheiro, Joel B. Passos, José Luiz Portugal |
TopoGeo: a data model for elaboration of cadastral survey plans and land register documents. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GEOINFO ![In: XXII Brazilian Symposium on Geoinformatics - GEOINFO 2020, São José dos Campos, SP, Brazil, online, November 29 - December 2, 2020., pp. 13-25, 2021, MCTIC/INPE. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
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11 | Krisztián Bálint |
The connection of a Blockchain with Students' Attendance Register based on Security Cameras. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SISY ![In: 19th IEEE International Symposium on Intelligent Systems and Informatics, SISY 2021, Subotica, Serbia, September 16-18, 2021, pp. 67-70, 2021, IEEE, 978-1-6654-1380-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Slawomir Lasota 0001, Mohnish Pattathurajan |
Parikh Images of Register Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FSTTCS ![In: 41st IARCS Annual Conference on Foundations of Software Technology and Theoretical Computer Science, FSTTCS 2021, December 15-17, 2021, Virtual Conference., pp. 50:1-50:14, 2021, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-215-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Ayazulla Khan Patan, Dimitrios Stathis 0001, Pudi Dhilleswararao, Yu Yang, Srinivas Boppu, Ahmed Hemani |
Design and Implementation of Optimized Register File for Streaming Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VDAT ![In: 25th International Symposium on VLSI Design and Test, VDAT 2021, Surat, India, September 16-18, 2021, pp. 1-4, 2021, IEEE, 978-1-6654-1992-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Yu Fu, Wei Wang 0314, Lingjia Meng, Qiongxiao Wang, Yuan Zhao, Jingqiang Lin |
VIRSA: Vectorized In-Register RSA Computation with Memory Disclosure Resistance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICICS (1) ![In: Information and Communications Security - 23rd International Conference, ICICS 2021, Chongqing, China, November 19-21, 2021, Proceedings, Part I, pp. 293-309, 2021, Springer, 978-3-030-86889-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Ana Paula Chaves 0001, Marco Aurélio Gerosa |
The Impact of Chatbot Linguistic Register on User Perceptions: A Replication Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CONVERSATIONS ![In: Chatbot Research and Design - 5th International Workshop, CONVERSATIONS 2021, Virtual Event, November 23-24, 2021, Revised Selected Papers, pp. 143-159, 2021, Springer, 978-3-030-94889-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Noushin Ghaderi, Andrea Adami, Leandro Lorenzelli |
A low-power 6-bit successive approximation register ADC using a new split capacitor array method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuit and Systems, APCCAS 2021, Penang, Malaysia, November 22-26, 2021, pp. 233-236, 2021, IEEE, 978-1-6654-3916-9. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Geonhwa Jeong, Eric Qin 0001, Ananda Samajdar, Christopher J. Hughes, Sreenivas Subramoney, Hyesoon Kim, Tushar Krishna |
RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: 58th ACM/IEEE Design Automation Conference, DAC 2021, San Francisco, CA, USA, December 5-9, 2021, pp. 253-258, 2021, IEEE, 978-1-6654-3274-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Johannes Müller, Mohammad Rahmani Fadiheh, Anna Lena Duque Antón, Thomas Eisenbarth 0001, Dominik Stoffel, Wolfgang Kunz |
A Formal Approach to Confidentiality Verification in SoCs at the Register Transfer Level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: 58th ACM/IEEE Design Automation Conference, DAC 2021, San Francisco, CA, USA, December 5-9, 2021, pp. 991-996, 2021, IEEE, 978-1-6654-3274-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Shunning Jiang, Yanghui Ou, Peitian Pan, Christopher Batten |
UMOC: Unified Modular Ordering Constraints to Unify Cycle- and Register-Transfer-Level Modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: 58th ACM/IEEE Design Automation Conference, DAC 2021, San Francisco, CA, USA, December 5-9, 2021, pp. 883-888, 2021, IEEE, 978-1-6654-3274-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Orfeas Panetas-Felouris, Spyridon Vlassis |
A novel time register with process and temperature calibration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MOCAST ![In: 10th International Conference on Modern Circuits and Systems Technologies, MOCAST 2021, Thessaloniki, Greece, July 5-7, 2021, pp. 1-4, 2021, IEEE, 978-1-6654-1847-8. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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11 | Hodjat Asghari Esfeden |
Enhanced Register Data-Flow Techniques for High-Performance, Energy-Efficient GPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
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2021 |
RDF |
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11 | Laure Daviaud |
Register complexity and determinisation of max-plus automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM SIGLOG News ![In: ACM SIGLOG News 7(2), pp. 4-14, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Kenshu Seto |
Shift Register Initialization in Scalar Replacement for Reducing Code Size. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPSJ Trans. Syst. LSI Des. Methodol. ![In: IPSJ Trans. Syst. LSI Des. Methodol. 13, pp. 2-9, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Yasuhiro Ogasahara, Yohei Hori, Toshihiro Katashita, Tomoki Iizuka, Hiromitsu Awano, Makoto Ikeda, Hanpei Koike |
Implementation of pseudo-linear feedback shift register-based physical unclonable functions on silicon and sufficient Challenge-Response pair acquisition using Built-In Self-Test before shipping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 71, pp. 144-153, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Arindrajit Ghosh, Uddalak Bhattacharya, Manish Kumar, Swapna Banerjee |
Compiler compatible 5.66 Mb/mm2 8T 1R1W register file in 14 nm FinFET technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 70, pp. 126-137, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Won Jeon, Jun Hyun Park, Yoonsoo Kim, Gunjae Koo, Won Woo Ro |
Hi-End: Hierarchical, Endurance-Aware STT-MRAM-Based Register File for Energy-Efficient GPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 8, pp. 127768-127780, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Jian Chen, Fan Yu, Zhiqiang Wang, Lin Lin |
Multichannel Ultrasound Focusing Delay Control Method Based on Variable-Length Shift Register for Airborne Ultrasound Tactile Feedback. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 8, pp. 24904-24913, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Alejandro Valero, Darío Suárez Gracia, Ruben Gran Tejero |
DC-Patch: A Microarchitectural Fault Patching Technique for GPU Register Files. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 8, pp. 173276-173288, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Siva Nishok Dhanuskodi, Samuel Allen, Daniel E. Holcomb |
Efficient Register Renaming Architectures for 8-bit AES Datapath at 0.55 pJ/bit in 16-nm FinFET. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 28(8), pp. 1807-1820, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Suraj Pattanaik |
A novel approach to design a digital clock triggered modified pulse latch for 16-bit shift register. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Intell. Def. Support Syst. ![In: Int. J. Intell. Def. Support Syst. 6(1), pp. 21-34, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Jun-Cheol Jeon |
Low-complexity QCA universal shift register design using multiplexer and D flip-flop based on electronic correlations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 76(8), pp. 6438-6452, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Mohammad Samadi Gharajeh, Majid Haghparast |
Towards designing quantum reversible 32-bit MIPS register file. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. High Perform. Syst. Archit. ![In: Int. J. High Perform. Syst. Archit. 9(1), pp. 11-19, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Hau Sim Choo, Chia Yee Ooi, Michiko Inoue, Nordinah Ismail, Mehrdad Moghbel, Chee Hoo Kok |
Register-Transfer-Level Features for Machine-Learning-Based Hardware Trojan Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 103-A(2), pp. 502-509, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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11 | Ryoma Senda, Yoshiaki Takata, Hiroyuki Seki |
Generalized Register Context-Free Grammars. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Inf. Syst. ![In: IEICE Trans. Inf. Syst. 103-D(3), pp. 540-548, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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11 | Ihsen Alouani, Hamzeh Ahangari, Ozcan Ozturk 0001, Smaïl Niar |
Power-efficient reliable register file for aggressive-environment applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Comput. Digit. Tech. ![In: IET Comput. Digit. Tech. 14(1), pp. 1-8, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Shouping Li, Yang Guo, Jianjun Chen, Bin Liang |
A 12-bit 30 MS/s Successive Approximation-Register Analog-to-Digital Converter with Foreground Digital Calibration Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Symmetry ![In: Symmetry 12(1), pp. 165, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Xiayang Wang, Fuqian Huang, Haibo Chen 0001 |
Secure and Efficient Control Data Isolation with Register-Based Data Cloaking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 69(2), pp. 226-238, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Renkui Hou, Chu-Ren Huang, Kathleen Ahrens, Sophia Yat Mei Lee |
Linguistic characteristics of Chinese register based on the Menzerath - Altmann law and text clustering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Digit. Scholarsh. Humanit. ![In: Digit. Scholarsh. Humanit. 35(1), pp. 54-66, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Alireza Yazdanpanah, Sohrab Sajadimanesh, Saeed Safari |
EREER: Energy-aware register file and execution unit using exploiting redundancy in GPGPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 77, pp. 103176, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Quan Deng, Youtao Zhang, Zhenyu Zhao, Shuzheng Zhang, Minxuan Zhang, Jun Yang 0002 |
FRF: Toward Warp-Scheduler Friendly STT-RAM/SRAM Fine-Grained Hybrid GPGPU Register File Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10), pp. 2396-2409, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Kai Yang, Qiang Li 0007, Xiaodong Lin 0001, Xin Chen, Limin Sun |
iFinger: Intrusion Detection in Industrial Control Systems via Register-Based Fingerprinting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Sel. Areas Commun. ![In: IEEE J. Sel. Areas Commun. 38(5), pp. 955-967, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Mahdi Momeni, Mohammad Yavari |
Shifting the sampled input signal in successive approximation register analog-to-digital converters to reduce the digital-to-analog converter switching energy and area. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 48(11), pp. 1873-1886, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Gaurav Sharma 0008, Lava Bhargava, Vinod Kumar 0016 |
Automated Bug Resistant Test Intent with Register Header Database for Optimized Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 36(2), pp. 219-237, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | R. Murugasami, U. S. Ragupathy 0001 |
Performance analysis of clock pulse generators and design of low power area efficient shift register using multiplexer based clock pulse generator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 105, pp. 104891, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Mingyang Gong, Haichun Zhang, Chao Wang 0096, Qiaoling Tong, Zhenglin Liu |
Design and implementation of robust and low-cost SRAM PUF using PMOS and linear shift register extractor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 103, pp. 104844, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Alexandra Angerd, Erik Sintorn, Per Stenström |
A GPU Register File using Static Data Compression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2006.05693, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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11 | Mohammad Sadrosadati, Amirhossein Mirhosseini, Ali Hajiabadi, Seyed Borna Ehsani, Hajar Falahati, Hamid Sarbazi-Azad, Mario Drumond, Babak Falsafi, Rachata Ausavarungnirun, Onur Mutlu |
Enabling High-Capacity, Latency-Tolerant, and Highly-Concurrent GPU Register Files via Software/Hardware Cooperation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2010.09330, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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11 | Ian Rogers |
Efficient global register allocation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2011.05608, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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11 | Léo Exibard, Emmanuel Filiot, Ayrat Khalimov 0001 |
Register Games on Infinite Ordered Data Domains. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2004.12141, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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11 | Bharat Garhewal, Frits W. Vaandrager, Falk Howar, Timo Schrijvers, Toon Lenaerts, Rob Smits |
Grey-Box Learning of Register Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2009.09975, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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11 | Amir Hossein Sayyad Abdi, Mohsen Sharifi |
Avoiding Register Overflow in the Bakery Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2007.02081, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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11 | Andrzej S. Murawski, Steven J. Ramsay, Nikos Tzevelekos |
Bisimilarity in fresh-register automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2005.06411, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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11 | Paul Scheffler, Florian Zaruba, Fabian Schuiki, Torsten Hoefler, Luca Benini |
Indirection Stream Semantic Register Architecture for Efficient Sparse-Dense Linear Algebra. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2011.08070, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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11 | Paul Ryan, Harshvardhan J. Pandit, Rob Brennan |
Towards a Semantic Model of the GDPR Register of Processing Activities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2008.00877, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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11 | Frits W. Vaandrager, Abhisek Midya |
A Myhill-Nerode Theorem for Register Automata and Symbolic Trace Languages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2007.03540, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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11 | Liu Liu 0009, Hongdong Li, Haodong Yao, Ruyi Zha |
PlueckerNet: Learn to Register 3D Line Reconstructions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2012.01096, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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11 | Gaëtan Douéneau-Tabot, Emmanuel Filiot, Paul Gastin |
Register transducers are marble transducers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2005.01342, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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11 | Carlo Galli, Stefano Guizzardi |
Change in Format, Register and Narration Style in the Biomedical Literature: A 1948 Example. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Publ. ![In: Publ. 8(1), pp. 10, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Wen Shi, Tom Kelsey, Frank M. Sullivan |
Efficient identification of patients eligible for clinical studies using case-based reasoning on Scottish Health Research register (SHARE). ![Search on Bibsonomy](Pics/bibsonomy.png) |
BMC Medical Informatics Decis. Mak. ![In: BMC Medical Informatics Decis. Mak. 20(1), pp. 70, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Karoliina Lehtinen, Udi Boker |
Register Games. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Log. Methods Comput. Sci. ![In: Log. Methods Comput. Sci. 16(2), 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Shaull Almagor, Michaël Cadilhac, Filip Mazowiecki, Guillermo A. Pérez 0001 |
Weak Cost Register Automata are Still Powerful. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Found. Comput. Sci. ![In: Int. J. Found. Comput. Sci. 31(6), pp. 689-709, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Florian Giesemann, Lukas Gerlach 0001, Guillermo Payá Vayá |
Evolutionary Algorithms for Instruction Scheduling, Operation Merging, and Register Allocation in VLIW Compilers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 92(7), pp. 655-678, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Serena Coetzee, Martijn Odijk, Bastiaan van Loenen, Janette Storm, Jantien E. Stoter |
Stakeholder analysis of the governance framework of a national SDI dataset - whose needs are met in the buildings and address register of the Netherlands? ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Digit. Earth ![In: Int. J. Digit. Earth 13(3), pp. 355-373, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Chunguang Huang, Qun Ding |
Performance of Finite Precision on Discrete Chaotic Map Based on a Feedback Shift Register. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Complex. ![In: Complex. 2020, pp. 4676578:1-4676578:12, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Patrick Bahr, Graham Hutton |
Calculating correct compilers II: Return of the register machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Funct. Program. ![In: J. Funct. Program. 30, pp. e25, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Ki-Chan Woo, Hyeong-Ju Kang, Byung-Do Yang |
Low-Area and Low-Power Latch-Based Thermometer-Code Shift-Register. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 67-II(10), pp. 2119-2123, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Youngbog Yoon, Chulwoo Kim |
An Area-Efficient and Wide-Range Inter-Signal Skew Compensation Scheme With the Embedded Bypass Control Register Operating as a Binary Search Algorithm for DRAM Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 67-II(10), pp. 1775-1779, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Zhenwei Zhang, Yi Shan, Yemin Dong |
A 16 bit 200 kS/s successive approximation register ADC with foreground on-chip self-calibration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 17(10), pp. 20200109, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Shailendra Kumar Tripathi, Bhupendra Gupta, K. K. Soundra Pandian |
The Shortest Register With Non-Linear Update for Generating a Given Finite or Periodic Sequence. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Commun. Lett. ![In: IEEE Commun. Lett. 24(6), pp. 1173-1177, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Son N. Le, Sudarshan K. Srinivasan, Scott C. Smith |
Exploiting Dual-Rail Register Invariants for Equivalence Verification of NCL Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: 63rd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2020, Springfield, MA, USA, August 9-12, 2020, pp. 21-24, 2020, IEEE, 978-1-7281-8058-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Nadja Piedade de Antônio, Renata Mendes de Araujo, Marcelo Fornazin, Rodrigo Pereira dos Santos |
Scaling the Technology for Income Transfers: the trajectory of "Bolsa Família" Unique Register CadÚnico. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AMCIS ![In: 26th Americas Conference on Information Systems, AMCIS 2020, Virtual Conference, August 15-17, 2020, 2020, Association for Information Systems, 978-1-7336325-4-6. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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11 | Paul Ryan, Harshvardhan J. Pandit, Rob Brennan |
A Common Semantic Model of the GDPR Register of Processing Activities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
JURIX ![In: Legal Knowledge and Information Systems - JURIX 2020: The Thirty-third Annual Conference, Brno, Czech Republic, December 9-11, 2020, pp. 251-254, 2020, IOS Press, 978-1-64368-150-4. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Oron Port, Yoav Etsion |
Hardware Description Beyond Register-Transfer Level Languages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Seaside, CA, USA, February 23-25, 2020, pp. 312, 2020, ACM, 978-1-4503-7099-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Frits W. Vaandrager, Abhisek Midya |
A Myhill-Nerode Theorem for Register Automata and Symbolic Trace Languages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTAC ![In: Theoretical Aspects of Computing - ICTAC 2020 - 17th International Colloquium, Macau, China, November 30 - December 4, 2020, Proceedings, pp. 43-63, 2020, Springer, 978-3-030-64275-4. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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11 | Chandan Karfa, Ramanuj Chouksey, Christian Pilato, Siddharth Garg, Ramesh Karri |
Is Register Transfer Level Locking Secure? ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2020 Design, Automation & Test in Europe Conference & Exhibition, DATE 2020, Grenoble, France, March 9-13, 2020, pp. 550-555, 2020, IEEE, 978-3-9819263-4-7. The full citation details ...](Pics/full.jpeg) |
2020 |
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