Search results for "register"

Hits ?▲	Authors	Title	Venue	Year	Link
11	Xiaohui Wei, Hengshan Yue, Jingweijia Tan	LAD-ECC: Energy-Efficient ECC Mechanism for GPGPUs Register File.	DATE	2020	DBLP DOI BibTeX RDF
11	Michael Werner, Igli Zeraliu, Zhao Han, Sebastian Siegfried Prebeck, Lorenzo Servadei, Wolfgang Ecker	Optimized HW/FW Generation from an Abstract Register Interface Model.	DSD	2020	DBLP DOI BibTeX RDF
11	Szymon Torunczyk, Thomas Zeume	Register Automata with Extrema Constraints, and an Application to Two-Variable Logic.	LICS	2020	DBLP DOI BibTeX RDF
11	Dejan Spasov	Pipelined Serial Register Renaming.	ICT Innovations	2020	DBLP DOI BibTeX RDF
11	Satoshi Mitsuno, Junichiro Kadomoto, Toru Koizumi 0001, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai	A High-Performance Out-of-Order Soft Processor Without Register Renaming.	FPL	2020	DBLP DOI BibTeX RDF
11	Gaëtan Douéneau-Tabot, Emmanuel Filiot, Paul Gastin	Register Transducers Are Marble Transducers.	MFCS	2020	DBLP DOI BibTeX RDF
11	Abubaker Sasi, Majid Ahmadi, Arash Ahmadi	Low Power Memristor-Based Shift Register Design.	ICECS	2020	DBLP DOI BibTeX RDF
11	Andy Regensky, Simon Grosche, Jürgen Seiler, André Kaup	Real-Time Frequency Selective Reconstruction through Register-Based Argmax Calculation.	MMSP	2020	DBLP DOI BibTeX RDF
11	Luc Segoufin, Victor Vianu	Projection Views of Register Automata.	PODS	2020	DBLP DOI BibTeX RDF
11	Dejan Spasov	Sequential Register Renaming.	MIPRO	2020	DBLP DOI BibTeX RDF
11	Ekaterina Menshikova, Gennady S. Sigovtsev, Marina Charuta	Problem of Cybersecurity in Context of Medical Information System «Register of Palliative Patients».	FRUCT	2020	DBLP BibTeX RDF
11	Reza Nakhjavani, Jianwen Zhu	Rotary Register File: A Micro-Architectural Primitive on FPGA.	FCCM	2020	DBLP DOI BibTeX RDF
11	Ana Paula Chaves 0001	Should my Chatbot be Register-Specific? Designing Appropriate Utterances for Tourism.	CHI Extended Abstracts	2020	DBLP DOI BibTeX RDF
11	Hongjune Kim, Jianping Zeng 0001, Qingrui Liu, Mohammad Abdel-Majeed, Jaejin Lee, Changhee Jung	Compiler-directed soft error resilience for lightweight GPU register file protection.	PLDI	2020	DBLP DOI BibTeX RDF
11	Ting-Ru Lin, Massoud Pedram	Retiming for High-performance Superconductive Circuits with Register Energy Minimization.	ICCAD	2020	DBLP DOI BibTeX RDF
11	Bharat Garhewal, Frits W. Vaandrager, Falk Howar, Timo Schrijvers, Toon Lenaerts, Rob Smits	Grey-Box Learning of Register Automata.	IFM	2020	DBLP DOI BibTeX RDF
11	Detlef Hartleb, Andreas Ahrens, Ojaras Purvinis, Jelena Zascerinska	Analysis of Free Time Intervals between Buyers at Cash Register using Generating Functions.	PECCS	2020	DBLP DOI BibTeX RDF
11	Ali Hussain Al-Lawati, Luís Soares Barbosa	Towards a register-based census in Oman.	ICEGOV	2020	DBLP DOI BibTeX RDF
11	Amir Hossein Sayyad Abdi, Mohsen Sharifi	Avoiding Register Overflow in the Bakery Algorithm.	ICPP Workshops	2020	DBLP DOI BibTeX RDF
11	Yuqi Su, Hyunjoon Kim, Bongjin Kim	31.2 CIM-Spin: A 0.5-to-1.2V Scalable Annealing Processor Using Digital Compute-In-Memory Spin Operators and Register-Based Spins for Combinatorial Optimization Problems.	ISSCC	2020	DBLP DOI BibTeX RDF
11	Devashree Tripathy, Hadi Zamani 0001, Debiprasanna Sahoo, Laxmi N. Bhuyan, Manoranjan Satpathy	Slumber: static-power management for GPGPU register files.	ISLPED	2020	DBLP DOI BibTeX RDF
11	Kishori M. Konwar, Saptaparni Kumar, Lewis Tseng	Semi-Fast Byzantine-tolerant Shared Register without Reliable Broadcast.	ICDCS	2020	DBLP DOI BibTeX RDF
11	Jhimli Mitra, Michael MacDonald, David Mills, Soumya Ghose, L. Scott Smith, Shourya Sarcar, Desmond Teck-Beng Yeo, Clare M. Tempany, Bryan Bednarz, Sydney Jupitz, Thomas K. Foo	Patient-specific deep deformation models (PsDDM) to register planning and interventional ultrasound volumes in image fusion-guided interventions.	Medical Imaging: Image-Guided Procedures	2020	DBLP DOI BibTeX RDF
11	Constance Fourcade, Mathieu Rubeaux, Diana Mateus	Using Elastix to Register Inhale/Exhale Intrasubject Thorax CT: A Unsupervised Baseline to the Task 2 of the Learn2Reg Challenge.	MICCAI (Challenges)	2020	DBLP DOI BibTeX RDF
11	Ljiljana Zivkovic	Monitoring Urban Development: National Register of Investment Locations as a Tool for Sustainable Urban Land Use Management in Serbia.	ICCSA (3)	2020	DBLP DOI BibTeX RDF
11	Sergey Yu. Melnikov, Konstantin E. Samouylov	Polygons characterizing the joint statistical properties of the input and output sequences of the binary shift register.	ICFNDS	2020	DBLP DOI BibTeX RDF
11	Sergey Yu. Melnikov, Konstantin E. Samouylov	On recognition of the shift register output function with a random input for a Markov model of an input sequence.	ITTMM	2020	DBLP BibTeX RDF
11	Alexandra Angerd, Erik Sintorn, Per Stenström	A GPU Register File using Static Data Compression.	ICPP	2020	DBLP DOI BibTeX RDF
11	Ulla-Mari Kinnunen, Eija Kivekäs, Sari Palojoki, Kaija Saranto	Register-Based Research of Adverse Events Revealing Incomplete Records Threatening Patient Safety.	MIE	2020	DBLP DOI BibTeX RDF
11	Gerald Benoît	Searching Covid-19 by linguistic register: Parallels and warrant for a new retrieval model.	ASIST	2020	DBLP DOI BibTeX RDF
11	Jun-Sang Park, Je-Min Jeon, Jun-Ho Boo, Jae-Hyuk Lee, Kang-Il Cho, Ho-Jin Kim, Gil-Cho Ahn, Seung-Hoon Lee	A 2.2mW 12-bit 200MS/s 28nm CMOS Pipelined SAR ADC with Dynamic Register-Based High-Speed SAR Logic.	A-SSCC	2020	DBLP DOI BibTeX RDF
11	Veronika Laippala, Samuel Rönnqvist, Saara Hellström, Juhani Luotolahti, Liina Repo, Anna Salmela, Valtteri Skantsi, Sampo Pyysalo	From Web Crawl to Clean Register-Annotated Corpora.	WAC@LREC	2020	DBLP BibTeX RDF
11	Manny Rayner, Pierrette Bouillon, Barry Haddow	Using Source-Language Transformations to Address Register Mismatches in SMT.	AMTA	2020	DBLP BibTeX RDF
11	Guowei Chen, Cong Dang Bui, Xinyang Yu, Md. Zahidul Islam, Atsuki Kobayashi, Kiichi Niitsu	A 72-nW 440-mV Time Register Using Stacked-NMOS-Switched Gated Delay Cell in Biomedical Applications.	APCCAS	2020	DBLP DOI BibTeX RDF
11	Ahmad M. Radaideh, Paul V. Gratz	Exploiting Zero Data to Reduce Register File and Execution Unit Dynamic Power Consumption in GPGPUs.	DAC	2020	DBLP DOI BibTeX RDF
11	Lynne Bowker	Register Variation Online. Douglas Biber and Jesse Egbert. Cambridge, UK: Cambridge University Press. 2018.	J. Assoc. Inf. Sci. Technol.	2019	DBLP DOI BibTeX RDF
11	Koichi Fujiwara, Kazushi Kawamura, Masao Yanagisawa, Nozomu Togawa	An FPGA Implementation Method based on Distributed-register Architectures.	IPSJ Trans. Syst. LSI Des. Methodol.	2019	DBLP DOI BibTeX RDF
11	Hyeran Jeon, Hodjat Asghari Esfeden, Nael B. Abu-Ghazaleh, Daniel Wong 0001, Sindhuja Elango	Locality-Aware GPU Register File.	IEEE Comput. Archit. Lett.	2019	DBLP DOI BibTeX RDF
11	Lin-Lin Zhou, Tian Tian 0004, Wen-Feng Qi 0001, Zhongxiao Wang	Constructions of de Bruijn sequences from a full-length shift register and an irreducible LFSR.	Finite Fields Their Appl.	2019	DBLP DOI BibTeX RDF
11	Lorenzo Clemente, Slawomir Lasota 0001, Ranko Lazic 0001, Filip Mazowiecki	Binary Reachability of Timed-register Pushdown Automata and Branching Vector Addition Systems.	ACM Trans. Comput. Log.	2019	DBLP DOI BibTeX RDF
11	Karin Quaas, Mahsa Shirmohammadi	Synchronizing Data Words for Register Automata.	ACM Trans. Comput. Log.	2019	DBLP DOI BibTeX RDF
11	Daniel Morrison, Dennis Delic, Mehmet Rasit Yuce, Jean-Michel Redoute	Multistage Linear Feedback Shift Register Counters With Reduced Decoding Logic in 130-nm CMOS for Large-Scale Array Applications.	IEEE Trans. Very Large Scale Integr. Syst.	2019	DBLP DOI BibTeX RDF
11	Indumathi Ganesan, V. P. M. B. Aarthi, Ramesh Muthusamy	A novel semi-folded parallel successive cancellation-based polar decoder for optimal-register allocation.	J. Supercomput.	2019	DBLP DOI BibTeX RDF
11	Subhrajyoti Deb, Bhaskar Biswas, Bubu Bhuyan	Secure image encryption scheme using high efficiency word-oriented feedback shift register over finite field.	Multim. Tools Appl.	2019	DBLP DOI BibTeX RDF
11	Mohammad Sadrosadati, Amirhossein Mirhosseini, Ali Hajiabadi, Seyed Borna Ehsani, Hajar Falahati, Hamid Sarbazi-Azad, Mario Drumond, Babak Falsafi, Rachata Ausavarungnirun, Onur Mutlu	Highly Concurrent Latency-tolerant Register Files for GPUs.	ACM Trans. Comput. Syst.	2019	DBLP DOI BibTeX RDF
11	Tom Petersen, Maximilian Blochberger, Tobias Mueller, Hannes Federrath, Christian-Alexander Behrendt	Sichere und datenschutzgerechte Umsetzung medizinischer Register.	Datenschutz und Datensicherheit	2019	DBLP DOI BibTeX RDF
11	Lu Liu, Daiguo Xu, Shiliu Xu	Rapid calibration of bits weights error for high-resolution successive approximation register ADC.	IET Circuits Devices Syst.	2019	DBLP DOI BibTeX RDF
11	Andrea Masini, Margherita Zorzi	A Logic for Quantum Register Measurements.	Axioms	2019	DBLP DOI BibTeX RDF
11	Junhong Liu, Xin He, Weifeng Liu 0002, Guangming Tan	Register-Aware Optimizations for Parallel Sparse Matrix-Matrix Multiplication.	Int. J. Parallel Program.	2019	DBLP DOI BibTeX RDF
11	Ipoom Jeong, Changmin Lee 0002, Keunsoo Kim, Won Woo Ro	OverCome: Coarse-Grained Instruction Commit with Handover Register Renaming.	IEEE Trans. Computers	2019	DBLP DOI BibTeX RDF
11	Alejandro Valero, Francisco Candel, Darío Suárez Gracia, Salvador Petit, Julio Sahuquillo	An Aging-Aware GPU Register File Design Based on Data Redundancy.	IEEE Trans. Computers	2019	DBLP DOI BibTeX RDF
11	Motoya Machida, Alexander Y. Shibakov	Stack and register complexity of radix conversions.	Theor. Comput. Sci.	2019	DBLP DOI BibTeX RDF
11	Mojtaba Gholamnia Roshan, Mohammad Gholami	4-Bit serial shift register with reset ability and 4-bit LFSR in QCA technology using minimum number of cells and delay.	Comput. Electr. Eng.	2019	DBLP DOI BibTeX RDF
11	Mauro Ianni, Alessandro Pellegrini 0001, Francesco Quaglia	Anonymous Readers Counting: A Wait-Free Multi-Word Atomic Register Algorithm for Scalable Data Sharing on Multi-Core Machines.	IEEE Trans. Parallel Distributed Syst.	2019	DBLP DOI BibTeX RDF
11	Hagit Attiya, Hyun Chul Chung, Faith Ellen, Saptaparni Kumar, Jennifer L. Welch	Emulating a Shared Register in a System That Never Stops Changing.	IEEE Trans. Parallel Distributed Syst.	2019	DBLP DOI BibTeX RDF
11	Filip Mazowiecki, Cristian Riveros	Copyless cost-register automata: Structure, expressiveness, and closure properties.	J. Comput. Syst. Sci.	2019	DBLP DOI BibTeX RDF
11	Ioannis Seitanidis, Giorgos Dimitrakopoulos, Pavlos M. Mattheakis, Laurent Masse-Navette, David G. Chinnery	Timing-Driven and Placement-Aware Multibit Register Composition.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2019	DBLP DOI BibTeX RDF
11	Chao Yu 0001, Yuebin Bai, Qingxiao Sun, Hailong Yang	Improving Thread-level Parallelism in GPUs Through Expanding Register File to Scratchpad Memory.	ACM Trans. Archit. Code Optim.	2019	DBLP DOI BibTeX RDF
11	Ghassan Shobaki, Austin Kerbow, Christopher Pulido, William Dobson	Exploring an Alternative Cost Function for Combinatorial Register-Pressure-Aware Instruction Scheduling.	ACM Trans. Archit. Code Optim.	2019	DBLP DOI BibTeX RDF
11	Eric Allender, Andreas Krebs, Pierre McKenzie	Better Complexity Bounds for Cost Register Automata.	Theory Comput. Syst.	2019	DBLP DOI BibTeX RDF
11	Xiaotong Cui, Jeff Jun Zhang, Kaijie Wu 0001, Siddharth Garg, Ramesh Karri	Split Manufacturing-Based Register Transfer-Level Obfuscation.	ACM J. Emerg. Technol. Comput. Syst.	2019	DBLP DOI BibTeX RDF
11	Vassos Hadzilacos, Xing Hu 0009, Sam Toueg	Optimal Register Construction in M&M Systems.	CoRR	2019	DBLP BibTeX RDF
11	Mikolaj Bojanczyk, Rafal Stefanski	Single use register automata for data words.	CoRR	2019	DBLP BibTeX RDF
11	Udi Boker, Karoliina Lehtinen	Register Games.	CoRR	2019	DBLP BibTeX RDF
11	Saptaparni Kumar, Jennifer L. Welch	Byzantine-Tolerant Register in a System with Continuous Churn.	CoRR	2019	DBLP BibTeX RDF
11	Mohammad Nasim Imtiaz Khan, Asmit De, Swaroop Ghosh	RF-Trojan: Leaking Kernel Data Using Register File Trojan.	CoRR	2019	DBLP BibTeX RDF
11	Miao Tony He, Jungmin Park, Adib Nahiyan, Apostol Vassilev 0001, Yier Jin, Mark M. Tehranipoor	RTL-PSC: Automated Power Side-Channel Leakage Assessment at Register-Transfer Level.	CoRR	2019	DBLP BibTeX RDF
11	Vinicius Vielmo Cogo, Alysson Bessani	Auditable Register Emulations.	CoRR	2019	DBLP BibTeX RDF
11	Dibyendu Das, Shahid Asghar Ahmad, Kumar Venkataramanan	Deep Learning-based Hybrid Graph-Coloring Algorithm for Register Allocation.	CoRR	2019	DBLP BibTeX RDF
11	Vinit Sarode, Xueqian Li, Hunter Goforth, Yasuhiro Aoki, Animesh Dhagat, Rangaprasad Arun Srivatsan, Simon Lucey, Howie Choset	One Framework to Register Them All: PointNet Encoding for Point Cloud Alignment.	CoRR	2019	DBLP BibTeX RDF
11	Ryoma Senda, Yoshiaki Takata, Hiroyuki Seki	Complexity Results on Register Pushdown Automata.	CoRR	2019	DBLP BibTeX RDF
11	Shlomo Engelson Argamon	Computational Register Analysis and Synthesis.	CoRR	2019	DBLP BibTeX RDF
11	Antoine Mottet, Karin Quaas	On the Containment Problem for Unambiguous Single-Register Automata with Guessing.	CoRR	2019	DBLP BibTeX RDF
11	Putt Sakdhnagool, Amit Sabne, Rudolf Eigenmann	RegDem: Increasing GPU Performance via Shared Memory Register Spilling.	CoRR	2019	DBLP BibTeX RDF
11	Luz Angela Aristizabal Quintero, Nicolás Toro García	Reduction of Monitoring Register on Software Defined Networks.	CoRR	2019	DBLP BibTeX RDF
11	Stéphane Clinchant, Hervé Déjean, Jean-Luc Meunier, Eva Maria Lang, Florian Kleber	Comparing Machine Learning Approaches for Table Recognition in Historical Register Books.	CoRR	2019	DBLP BibTeX RDF
11	Roberto Castañeda Lozano, Christian Schulte 0001	Survey on Combinatorial Register Allocation and Instruction Scheduling.	ACM Comput. Surv.	2019	DBLP DOI BibTeX RDF
11	Anders Forss, Pär Myrelid, Ola Olén, Åsa H. Everhov, Caroline Nordenvall, Jonas Halfvarson, Jonas F. Ludvigsson	Validating surgical procedure codes for inflammatory bowel disease in the Swedish National Patient Register.	BMC Medical Informatics Decis. Mak.	2019	DBLP DOI BibTeX RDF
11	Ronald A. Riley, James T. Graham, Ryan M. Fuller, Rusty O. Baldwin, Ashwin Fisher	A New Way to Detect Cyberattacks: Extracting Changes in Register Values From Radio-Frequency Side Channels.	IEEE Signal Process. Mag.	2019	DBLP DOI BibTeX RDF
11	Zhihua Chen, Ying Zheng, Tao Zhang 0081, David Shan-Hill Wong, Zhonghua Deng	Modeling and Register Control of the Speed-Up Phase in Roll-to-Roll Printing Systems.	IEEE Trans Autom. Sci. Eng.	2019	DBLP DOI BibTeX RDF
11	Roberto Castañeda Lozano, Mats Carlsson, Gabriel Hjort Blindell, Christian Schulte 0001	Combinatorial Register Allocation and Instruction Scheduling.	ACM Trans. Program. Lang. Syst.	2019	DBLP DOI BibTeX RDF
11	Ki-Chan Woo, Hyeong-Ju Kang, Byung-Do Yang	Area-Efficient Bidirectional Shift-Register Using Bidirectional Pulsed-Latches.	IEEE Trans. Circuits Syst. II Express Briefs	2019	DBLP DOI BibTeX RDF
11	Sheng-Yu Fu, Ding-Yong Hong, Yu-Ping Liu, Jan-Jan Wu, Wei-Chung Hsu	Optimizing data permutations in structured loads/stores translation and SIMD register mapping for a cross-ISA dynamic binary translator.	J. Syst. Archit.	2019	DBLP DOI BibTeX RDF
11	Achour Mostéfaoui, Michel Raynal, Matthieu Roy	Time-efficient read/write register in crash-prone asynchronous message-passing systems.	Computing	2019	DBLP DOI BibTeX RDF
11	Falk Howar, Bengt Jonsson 0001, Frits W. Vaandrager	Combining Black-Box and White-Box Techniques for Learning Register Automata.	Computing and Software Science	2019	DBLP DOI BibTeX RDF
11	Anil Kumar, V. Ravichandran, S. Sudhakar	A Novel Approach for FPGA Implementation of Register Exchange Based Viterbi Decoder and Re-Encoding based Node Synchronizer.	ANTS	2019	DBLP DOI BibTeX RDF
11	Loris D'Antoni, Tiago Ferreira 0001, Matteo Sammartino, Alexandra Silva 0001	Symbolic Register Automata.	CAV (1)	2019	DBLP DOI BibTeX RDF
11	Shady Abd El Kader, Nikolay Nikolov, Bjørn Marius von Zernichow, Vincenzo Cutrona, Matteo Palmonari, Brian Elvesæter, Ahmet Soylu, Dumitru Roman	Modeling and Publishing French Business Register (Sirene) Data as Linked Data Using the euBusinessGraph Ontology.	SAWSemStats@ISWC	2019	DBLP BibTeX RDF
11	Keisuke Inoue	An ILP-based Optimization Method for Radiation Hardened Register and ECC Mixed Architectures.	VLSI-SoC	2019	DBLP DOI BibTeX RDF
11	Hiroyuki Seki, Reo Yoshimura, Yoshiaki Takata	Optimal Run Problem for Weighted Register Automata.	ICTAC	2019	DBLP DOI BibTeX RDF
11	Ron Gabor, Yiannakis Sazeides, Arkady Bramnik, Alexandros Andreou, Chrysostomos Nicopoulos, Karyofyllis Patsidis, Dimitris Konstantinou, Giorgos Dimitrakopoulos	Error-Shielded Register Renaming Sub-system for a Dynamically Scheduled Out-of-Order Core.	DATE	2019	DBLP DOI BibTeX RDF
11	Hau Sim Choo, Chia Yee Ooi, Michiko Inoue, Nordinah Ismail, Mehrdad Moghbel, Sreedharan Baskara Dass, Chee Hoo Kok, Fawnizu Azmadi Hussin	Machine-Learning-Based Multiple Abstraction-Level Detection of Hardware Trojan Inserted at Register-Transfer Level.	ATS	2019	DBLP DOI BibTeX RDF
11	Andrzej S. Murawski, Steven J. Ramsay, Nikos Tzevelekos	DEQ: Equivalence Checker for Deterministic Register Automata.	ATVA	2019	DBLP DOI BibTeX RDF
11	Uma Srinivasan 0002, William V. Huott, Chad Adams, Pete Freiburger, Franco Stellari, Peilin Song, Phong Tran, Dave Albert	Case Study of Advanced Diagnostic Techniques for Multi Port Register File.	NATW	2019	DBLP DOI BibTeX RDF
11	Tae-Hyeong Kim, Dae-Jin Kim, Hyeon-Sam Shin, Sang-Ho Lee, Jae-Won Suh, Byung-Do Yang	Low Power Digital PWM Buck Converter With a Clock-Gating Shift-Register.	ICEIC	2019	DBLP DOI BibTeX RDF
11	Ryoma Senda, Yoshiaki Takata, Hiroyuki Seki	Generalized Register Context-Free Grammars.	LATA	2019	DBLP DOI BibTeX RDF
11	Farnoud Farahmand, Duc Tri Nguyen, Viet Ba Dang, Ahmed Ferozpuri, Kris Gaj	Software/Hardware Codesign of the Post Quantum Cryptography Algorithm NTRUEncrypt Using High-Level Synthesis and Register-Transfer Level Design Methodologies.	FPL	2019	DBLP DOI BibTeX RDF
11	Santiago Andrés Frid, Valeria Zapico, Adriana Mansilla, Matías Álvarez, Gastón E. López, Carlos Otero, Daniel R. Luna	Design and Implementation of a Tool for Pharmacists to Register Potential Errors in Prescribed Medication.	MedInfo	2019	DBLP DOI BibTeX RDF
11	Théodore Lopez, Benjamin Monmege, Jean-Marc Talbot	Determinisation of Finitely-Ambiguous Copyless Cost Register Automata.	MFCS	2019	DBLP DOI BibTeX RDF
11	Md Musabbir Adnan, Sherif Amer, Sagarvarma Sayyaparaju, Md Sakib Hasan, Garrett S. Rose	A Scan Register Based Access Scheme for Multilevel Non-Volatile Memristor Memory.	ICECS	2019	DBLP DOI BibTeX RDF