Search results for "ISED"

Hits ?▲	Authors	Title	Venue	Year	Link
1	D. N. Jagadish, M. S. Bhat 0001	Low Energy and Area Efficient Nonbinary Capacitor Array Based SAR ADC.	ISED	2014	DBLP DOI BibTeX RDF
1	Sandip Bhattacharya, Debaprasad Das, Hafizur Rahaman 0001	A Novel GNR Interconnect Model to Reduce Crosstalk Delay.	ISED	2014	DBLP DOI BibTeX RDF
1	R. Rajesh, Kannan Babu Ramia, Muralidhar Kulkarni	Integration of LwIP Stack over Intel(R) DPDK for High Throughput Packet Delivery to Applications.	ISED	2014	DBLP DOI BibTeX RDF
1	U. Aparna, H. S. Mruthyunjaya, M. Sathish Kumar	Plasmonic Lens Based on Elliptically Tapered Metallic Nano Slits.	ISED	2014	DBLP DOI BibTeX RDF
1	Naresh Vemishetty, Arpit Jain, Aashish Amber, Amit Acharyya	A Low Complexity Architecture for Online On-chip Detection and Identification of f-QRS Feature for Remote Personalized Health Care Applications.	ISED	2014	DBLP DOI BibTeX RDF
1	Neha Gupta 0003, Ajay Kumar 0004, Rishu Chaujar	Impact of Channel Doping and Gate Length on Small Signal Behaviour of Gate Electrode Workfunction Engineered Silicon Nanowire MOSFET at THz Frequency.	ISED	2014	DBLP DOI BibTeX RDF
1	Mamata Dalui, Biplab K. Sikdar	CA Based Scalable Protocol Processor for Chip Multiprocessors.	ISED	2014	DBLP DOI BibTeX RDF
1	C. Vasanthanayaki, A. Azhagu Jaisudhan Pazhani, Jincy Johnson	VLSI Implementation of Low Power Multiple Single Input Change (MSIC) Test Pattern Generation for BIST Scheme.	ISED	2014	DBLP DOI BibTeX RDF
1	Bappaditya Mondal, Chandan Bandyopadhyay, Dipak Kumar Kole, Jimson Mathew, Hafizur Rahaman 0001	Diagnosis of SMGF in ESOP Based Reversible Logic Circuit.	ISED	2014	DBLP DOI BibTeX RDF
1	Vasant Easwaran, Nagendra Gulur, Sushaanth Srirangapathi, Mihir Mody, Rahul Gulati, Prashant Karandikar, Prithvi Shankar	Method to Determine Contrariety between Architectures Containing Stratified Memory Mapped Register Sets.	ISED	2014	DBLP DOI BibTeX RDF
1	Rolf Drechsler, Ulrich Kühne	Safe IP Integration Using Container Modules.	ISED	2014	DBLP DOI BibTeX RDF
1	Sovan Ghosh	A Novel Temperature Stable Current Mode Bandgap for Wide Range of Supply Voltage Variation.	ISED	2014	DBLP DOI BibTeX RDF
1	Chikku Abraham, R. Rakhee, Babita Roslind Jose	A Multiple Input Multiple Output Switched Capacitor DC-DC Converter with Reduced Switch Count.	ISED	2014	DBLP DOI BibTeX RDF
1	D. N. Jagadish, M. S. Bhat 0001	A Low Voltage Inverter Based Differential Amplifier for Low Power Switched Capacitor Applications.	ISED	2014	DBLP DOI BibTeX RDF
1	Jyoti Sharma, Mohammad Samar Ansari, Jankiballabh Sharma	Electronically Tunable Resistor-less Universal Filter in ±0.5V 32nm CNFET.	ISED	2014	DBLP DOI BibTeX RDF
1	Subhankar Pal, Chetan Vudadha, P. Sai Phaneendra, Sreehari Veeramachaneni, Srinivas B. Mandalika	A New Design of an N-Bit Reversible Arithmetic Logic Unit.	ISED	2014	DBLP DOI BibTeX RDF
1	M. P. R. Sai Kiran, Y. Siva Krishna, Pachamuthu Rajalakshmi, Amit Acharyya	System Architecture for Smart Ubiquitous Health Monitoring System with Area Optimization in Multiple On-chip Radios Scenario.	ISED	2014	DBLP DOI BibTeX RDF
1	A. Divya Rao, Piyush Kumar, Neha Nain, V. K. Agrawal	MATLAB-Based GUI Development for Stochastic Noise Analysis of Tri-Axial Gyroscopes.	ISED	2014	DBLP DOI BibTeX RDF
1	Srinivas Sabbavarapu, Basireddy Karunakar Reddy, Amit Acharyya	A New Dynamic Library Based IC Design Automation Methodology Using Functional Symmetry with NPN Class Representation Approach to Reduce NRE Costs and Time-to-Market.	ISED	2014	DBLP DOI BibTeX RDF
1	Shailendra Kumar Tripathi, Mohammad Samar Ansari	Tunable Active Biquad Filter in ±0.9V 32 Nm CNFET.	ISED	2014	DBLP DOI BibTeX RDF
1	Swagata Roy Chatterjee, Soham Majumder, Bodhisatta Pramanik, Mohuya Chakraborty	FPGA Implementation of Pipelined Blowfish Algorithm.	ISED	2014	DBLP DOI BibTeX RDF
1	Anush Bekal, Manish Goswami, B. R. Singh, Dipankar Pal	A Low Power 8-Bit Asynchronous SAR ADC Design Using Charge Scaling DAC.	ISED	2014	DBLP DOI BibTeX RDF
1	S. Murugan, D. Karthikesan, S. Sellathurai, E. Praveen, K. Jayakumar	Design of Mechanical Sensing System Based on Nano BaTiO3 Embedded in Biopolymer Electret.	ISED	2014	DBLP DOI BibTeX RDF
1	Krishna Bharadwaj Chivukula, Naresh Vemishetty, Agathya Jagirdar, Amit Acharyya	A Low-Complexity Onchip Real-Time Automated ECG Frame Identification Methodology Targeting Remote Health Care.	ISED	2014	DBLP DOI BibTeX RDF
1	Basireddy Karunakar Reddy, Srinivas Sabbavarapu, Amit Acharyya	Effect of Constant One and Zero, Shared and Non-decomposed Nodes on Runtime and Graph Size of the Shannon Factor Graph (SFG).	ISED	2014	DBLP DOI BibTeX RDF
1	Sudip Ghosh 0001, Arijit Biswas, Santi P. Maity, Hafizur Rahaman 0001	Design of a Low Complexity and Fast Hardware Architecture for Digital Image Watermarking in FWHT Domain on FPGA.	ISED	2014	DBLP DOI BibTeX RDF
1	Vijay Rao, P. P. Priyesh, Subrat Kar	Pratham: A Low-Cost Wireless Node with Programmable Radio Range and Over-the-Air Programming Capability for Resource-Constrained Applications.	ISED	2014	DBLP DOI BibTeX RDF
1	Anish Morakhia, Sridhar Gunnam, Preejit Prakash, Sneha Kudli, Tonse Laxminidhi	A Resolution Independent 2-Bits-per-Cycle SAR ADC.	ISED	2014	DBLP DOI BibTeX RDF
1	Sadeque Reza Khan, Rajsekhar Kr. Nath, M. S. Bhat 0001	GSM and GUI Based Remote Data Logging System.	ISED	2014	DBLP DOI BibTeX RDF
1	P. Kavyashree, Siva Sankar Yellampalli	The Design of Ultra Low Power CMOS CGLNA in Nanometer Technology.	ISED	2014	DBLP DOI BibTeX RDF
1	Yasha Jyothi M. Shirur, Lakshmi H. R., Veena S. Chakravarthi	Implementation of Area Efficient Hybrid MBIST for Memory Clusters in Asynchronous SoC.	ISED	2014	DBLP DOI BibTeX RDF
1	Priyankar Talukdar	Power-Aware Automated Pipelining of Combinational Circuits.	ISED	2014	DBLP DOI BibTeX RDF
1	S. V. VeenaDevi, A. G. Ananth	Fixed Range Block Segmentation and Classification for Fractal Image Compression of Satellite Imageries.	ISED	2014	DBLP DOI BibTeX RDF
1		2014 Fifth International Symposium on Electronic System Design, Surathkal, Mangalore, India, December 15-17, 2014	ISED	2014	DBLP BibTeX RDF
1	Navneet Upadhyay	An Improved Multi-band Speech Enhancement Utilizing Masking Properties of Human Hearing System.	ISED	2014	DBLP DOI BibTeX RDF
1	Vipul Kumar Mishra, Anirban Sengupta	PSDSE: Particle Swarm Driven Design Space Exploration of Architecture and Unrolling Factors for Nested Loops in High Level Synthesis.	ISED	2014	DBLP DOI BibTeX RDF
1	Pranab Roy, Tamosa Chakraborty, Hafizur Rahaman 0001, Parthasarathi Dasgupta	Multilevel Homogeneous Detection Analyzer for Medical Diagnostic Application in Digital Microfluidic Biochips.	ISED	2014	DBLP DOI BibTeX RDF
1	E. S. Shajahan, M. S. Bhat 0001, B. Chenna Reddy	Inductive Tuned High Isolation RF MEMS Capacitive Shunt Switches.	ISED	2014	DBLP DOI BibTeX RDF
1	Shrutika Joshi, A. Srinivas	Power Aware Fault Tolerance in Wireless Networks with Heterogeneous Nodes.	ISED	2014	DBLP DOI BibTeX RDF
1	S. Lalitha, Sahruday Patnaik, T. H. Arvind, Vivek Madhusudhan, Shikha Tripathi	Emotion Recognition through Speech Signal for Human-Computer Interaction.	ISED	2014	DBLP DOI BibTeX RDF
1	S. Kala, Nalesh Sivanandan, S. K. Nandy 0001, Ranjani Narayan	Energy Efficient, Scalable, and Dynamically Reconfigurable FFT Architecture for OFDM Systems.	ISED	2014	DBLP DOI BibTeX RDF
1	Aditya Gour, Ramesh Sanga, R. P. Behera, P. Sahoo, Nagarajan Murali, Sav Satyamurty	Design and Development of FPGA and FPAA Based Remote Terminal Units for Nuclear Power Plants.	ISED	2014	DBLP DOI BibTeX RDF
1	Arighna Deb, Debesh K. Das, Bhargab B. Bhattacharya	Synthesis of Symmetric Boolean Functions Using a Three-Stage Network.	ISED	2014	DBLP DOI BibTeX RDF
1	Pramod Kaddi, Nagaveni Vamsi, Anil Appala, Ashudeb Dutta, Shiv Govind Singh, Nagarjuna Nallam	Efficient Dual Band RF Energy Harvesting Front End for Ultra Low Power Sensitive Passive Wearable Devices.	ISED	2014	DBLP DOI BibTeX RDF
1	Chandra Shaker Balure, M. Ramesh Kini	A Survey - Super Resolution Techniques for Multiple, Single, and Stereo Images.	ISED	2014	DBLP DOI BibTeX RDF
1	Priya Meharde, Vandana Niranjan, Ashwani Kumar	Low Voltage CMOS Active Inductor with Bandwidth and Linearity Improvement.	ISED	2014	DBLP DOI BibTeX RDF
1	Rajesh Mangalore Anand, Soujanya Ravula, M. A. Kalpashree, Soumya Satavisa	Automated Physical Verification of I/O Pads in Full-Custom Environment.	ISED	2014	DBLP DOI BibTeX RDF
1	Bibhash Sen, Rijoy Mukherjee, Rajdeep Kumar Nath, Biplab K. Sikdar	Design of Fault Tolerant Universal Logic in QCA.	ISED	2014	DBLP DOI BibTeX RDF
1	Manodipan Sahoo, Hafizur Rahaman 0001	Impact of Line Resistance Variations on Crosstalk Delay and Noise in Multilayer Graphene Nano Ribbon Interconnects.	ISED	2014	DBLP DOI BibTeX RDF
1	Manodipan Sahoo, Hafizur Rahaman 0001, Bhargab B. Bhattacharya	Impact of Inductance on the Performance of Single Walled Carbon Nanotube Bundle Interconnects.	ISED	2013	DBLP DOI BibTeX RDF
1	Soumyajit Poddar, Prasun Ghosal, Priyajit Mukherjee, Suman Samui, Hafizur Rahaman 0001	An Area and Power Efficient Dynamic TDMA Based Photonic Network on Chip.	ISED	2013	DBLP DOI BibTeX RDF
1	Rakshith Saligram	Design of Low Logical Cost Conservative Reversible Adders Using Novel PCTG.	ISED	2013	DBLP DOI BibTeX RDF
1	Sudip Roy 0001, Bhargab B. Bhattacharya, Sarmishtha Ghoshal, Krishnendu Chakrabarty	Optimal Two-Mixer Scheduling in Dilution Engine on a Digital Microfluidic Biochip.	ISED	2013	DBLP DOI BibTeX RDF
1	Li Gang, Jimson Mathew, Dhiraj K. Pradhan	Multinomial Memristor Model for Simulations and Analysis.	ISED	2013	DBLP DOI BibTeX RDF
1	Vinayak Honkote, Renuka Devi Nagarajan	Process Variation Sensitivities of Rotary Traveling Wave and Mobius Standing Wave Oscillators.	ISED	2013	DBLP DOI BibTeX RDF
1	Varalakshmi Perumal, Judgi Thangavel, Saranya Ramasamy, Swathy Harish	Dynamic Trust Establishment and Amended Window Based Monitoring in Cloud.	ISED	2013	DBLP DOI BibTeX RDF
1	Saloni Varshney, Manish Goswami, B. R. Singh	4-6 Bit Variable Resolution ADC.	ISED	2013	DBLP DOI BibTeX RDF
1	Prokash Ghosh, Celia John, Ajay Gupta, Veerabhadrarao Siripurapu	Enhancement of Production Pattern Development Methodology and Best Practices.	ISED	2013	DBLP DOI BibTeX RDF
1	Neelamma K. Patil, S. Vasudha, Lokesh R. Boregowda	Performance Improvement of Face Recognition System by Decomposition of Local Features Using Discrete Wavelet Transforms.	ISED	2013	DBLP DOI BibTeX RDF
1	C. J. Bindu, S. Mridula	Folded SIR with CSRRs for Ultra Wide Band Applications.	ISED	2013	DBLP DOI BibTeX RDF
1	Bibhas Ghoshal, Chittaranjan Mandal 0002, Indranil Sengupta 0001	Re-using Refresh for Self-Testing DRAMs.	ISED	2013	DBLP DOI BibTeX RDF
1	Pranab Roy, Mahua Raha Patra, Hafizur Rahaman 0001, Parthasarathi Dasgupta	An Intelligent Biochip System for Diagnostic Process Flow Based Integration of Combined Detection Analyzer.	ISED	2013	DBLP DOI BibTeX RDF
1	R. Raja, S. Kumaravel, B. Venkataramani, Ganesh Yashavant Magar	A 1.8V 2.4 GHz Folded-Switch Mixer for Direct Conversion Receiver.	ISED	2013	DBLP DOI BibTeX RDF
1	Mohamad Imran Bin Bandan, Subhasis Bhattacharjee, Rishad A. Shafik, Dhiraj K. Pradhan, Jimson Mathew	Lifetime Reliability-Aware Checkpointing Mechanism: Modelling and Analysis.	ISED	2013	DBLP DOI BibTeX RDF
1	Madhumita Sengupta, J. K. Mandal 0001, Jimson Mathew	G-Let Based Authentication/Secret Message Transmission (GASMT).	ISED	2013	DBLP DOI BibTeX RDF
1	Srinivas Sabbavarapu, Basireddy Karunakar Reddy, Rayapati Prabhat, Kshitiz Gupta, Amit Acharyya, Rishad Ahmed Shafik, Jimson Mathew	A Novel Physical Synthesis Methodology in the VLSI Design Automation by Introducing Dynamic Library Concept.	ISED	2013	DBLP DOI BibTeX RDF
1	Arindam Banerjee 0003, Debesh Kumar Das	The Design of Reversible Multiplier Using Ancient Indian Mathematics.	ISED	2013	DBLP DOI BibTeX RDF
1	Bibhash Sen, Mrinal Goswami, Samik Some, Biplab K. Sikdar	Design of Sequential Circuits in Multilayer QCA Structure.	ISED	2013	DBLP DOI BibTeX RDF
1	Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan	Hardware-Software Codesign of EKF-Based Motor Control for Domain-Specific Reconfigurable Platform.	ISED	2013	DBLP DOI BibTeX RDF
1	Basireddy Karunakar Reddy, Srinivas Sabbavarapu, Kshitiz Gupta, Rayapati Prabhat, Amit Acharyya, Rishad A. Shafik, Jimson Mathew	A Novel and Unified Digital IC Design and Automation Methodology with Reduced NRE Cost and Time-to-Market.	ISED	2013	DBLP DOI BibTeX RDF
1		2013 International Symposium on Electronic System Design, Singapore, December 10-12, 2013	ISED	2013	DBLP BibTeX RDF
1	Abhinav Agarwal, Abhijeet Singh, Amit Acharyya, Rishad A. Shafik, Shaik Rafi Ahamed	Energy-Efficient and High-Speed Robust Channel Identification Methodology to Solve Permutation Indeterminacy in ICA for Artifacts Removal from ECG in Remote Healthcare.	ISED	2013	DBLP DOI BibTeX RDF
1	Kamlesh Kumar Singh, Neeraj K. Chasta, Maryam Shojaei Baghini	Experimental Electrical Modeling of Soil for In Situ Soil Moisture Measurement.	ISED	2013	DBLP DOI BibTeX RDF
1	I. Mamatha, J. Nikhita Raj, Shikha Tripathi, T. S. B. Sudarshan	Reduced Complexity Architecture for Convolution Based Discrete Cosine Transform.	ISED	2013	DBLP DOI BibTeX RDF
1	Sukanta Bhattacharjee, Ansuman Banerjee, Tsung-Yi Ho, Krishnendu Chakrabarty, Bhargab B. Bhattacharya	On Producing Linear Dilution Gradient of a Sample with a Digital Microfluidic Biochip.	ISED	2013	DBLP DOI BibTeX RDF
1	Gaurav Mishra, Yan Lin Aung, Meiqing Wu, Siew Kei Lam, Thambipillai Srikanthan	Real-Time Image Resizing Hardware Accelerator for Object Detection Algorithms.	ISED	2013	DBLP DOI BibTeX RDF
1	Shirshendu Das, Hemangee K. Kapoor	Dynamic Associativity Management Using Fellow Sets.	ISED	2013	DBLP DOI BibTeX RDF
1	Prabir Saha, Deepak Kumar, Partha Bhattacharyya, Anup Dandapat	Reciprocal Unit Based on Vedic Mathematics for Signal Processing Applications.	ISED	2013	DBLP DOI BibTeX RDF
1	Abhishek Ambede, Kavallur Gopi Smitha, A. Prasad Vinod 0001	A New Design Method to Obtain Flexible and Low Complexity Uniform Filter Banks.	ISED	2013	DBLP DOI BibTeX RDF
1	Srinivas Donapati, Harish Yagain	A Comparative Study of Effects of CSC on Image Compression Ratios While Using JPEG-XR.	ISED	2013	DBLP DOI BibTeX RDF
1	Chandan Bandyopadhyay, Debashri Roy, Dipak Kumar Kole, Kamalika Datta, Hafizur Rahaman 0001	ESOP-Based Synthesis of Reversible Circuit Using Improved Cube List.	ISED	2013	DBLP DOI BibTeX RDF
1	Arighna Deb, Debesh K. Das, Susmita Sur-Kolay	Modular Design for Symmetric Functions Using Quantum Quaternary Logic.	ISED	2013	DBLP DOI BibTeX RDF
1	Baisakhi Das, Nirmalya Sundar Maiti, Sukanta Das, Mousumi Saha, Biplab K. Sikdar	Design of an Efficient Scheme for Data Migration in Chip-Multiprocessors.	ISED	2013	DBLP DOI BibTeX RDF
1	Neelamma K. Patil, S. Vasudha, Lokesh R. Boregowda	A Novel Method for Illumination Normalization for Performance Improvement of Face Recognition System.	ISED	2013	DBLP DOI BibTeX RDF
1	Aiman H. El-Maleh, Feras Chikh Oughali	Enhancing Reliability of Combinational Circuits against Soft Errors by Using a Generalized Modular Redundancy Scheme.	ISED	2013	DBLP DOI BibTeX RDF
1	Luo Sun, Jimson Mathew, Rishad A. Shafik, Dhiraj K. Pradhan	Low Power and Robust Binary Tree SRAM Design for Embedded Systems.	ISED	2013	DBLP DOI BibTeX RDF
1	Jason G. Tong, Marc Boule, Zeljko Zilic	Efficient Data Encoding for Improving Fault Simulation Performance on GPUs.	ISED	2013	DBLP DOI BibTeX RDF
1	Arindam Sarkar, J. K. Mandal 0001, Priyadarsan Patra	Double Layer Perceptron Synchronized Computational Intelligence Guided Fractal Triangle Based Cryptographic Technique for Secured Communication (DLPFT).	ISED	2013	DBLP DOI BibTeX RDF
1	Vinay S. Palaparthy, S. U. Susha Lekshmi, Jobish John, Shahbaz Sarik, Maryam Shojaei Baghini, Devendra Narain Singh	Soil Moisture Measurement System for DPHP Sensor and In Situ Applications.	ISED	2013	DBLP DOI BibTeX RDF
1	Sagar Mukherjee, Dipankar Saha, Posiba Mostafa, Sayan Chatterjee, Chandan Kumar Sarkar	A 4-bit Asynchronous Binary Search ADC for Low Power, High Speed Applications.	ISED	2012	DBLP DOI BibTeX RDF
1	Vishram Mishra, Chiew Tong Lau, Syin Chan, Ashish Kumar	Energy Aware Spectrum Decision Framework for Cognitive Radio Networks.	ISED	2012	DBLP DOI BibTeX RDF
1	Rohit Srivastava, Nandini Mudgil, Gaurav Gupta, Hemanta Mondal	SoC Time to Market Improvement through Device Driver Reuse: An Industrial Experience.	ISED	2012	DBLP DOI BibTeX RDF
1	Rolf Drechsler, Robert Wille	Synthesis of Reversible Circuits Using Decision Diagrams.	ISED	2012	DBLP DOI BibTeX RDF
1	Shashikant Sharma, Manisha Pattanaik, Balwinder Raj	Signal Stepping Based Multimode Multi-threshold CMOS Technique for Ground Bounce Noise Reduction in Static CMOS Adders.	ISED	2012	DBLP DOI BibTeX RDF
1	Papia Manna, Dipak Kumar Kole, Hafizur Rahaman 0001, Debesh K. Das, Bhargab B. Bhattacharya	Reversible Logic Circuit Synthesis Using Genetic Algorithm and Particle Swarm Optimization.	ISED	2012	DBLP DOI BibTeX RDF
1	Hoang M. Le, Daniel Große, Rolf Drechsler	From Requirements and Scenarios to ESL Design in SystemC.	ISED	2012	DBLP DOI BibTeX RDF
1	Deepak Bharti, Abhijit R. Asati	Design of a Static Current Simulator Using Device Matrix Approach.	ISED	2012	DBLP DOI BibTeX RDF
1	Anirban De, Santwana Kumari, V. K. Khare, S. S. Pal, Anindya Sadhukhan, V. K. Meshram, S. K. Thakur, Subimal Saha	Design, Development and Testing of a DSP Based Dynamic Voltage Restorer.	ISED	2012	DBLP DOI BibTeX RDF
1	Gerhard W. Dueck	Synthesis of Toffoli Networks: Status and Challenges.	ISED	2012	DBLP DOI BibTeX RDF
1	Debaprasad Das, Sourav Das, Hafizur Rahaman 0001	Design of 4-Bit Array Multiplier Using Multi-wall Carbon Nanotube Interconnects.	ISED	2012	DBLP DOI BibTeX RDF

Publications at "ISED"( http://dblp.L3S.de/Venues/ISED )