| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Mohammed Abderehman, Rupak Gupta, Chandan Karfa |
Reverse Engineering Register to Variable Mapping in High-level Synthesis.  |
ISVLSI  |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Noureddine Ait Said, Mounir Benabdenbi, Katell Morin-Allory |
FPU Reduced Variable Precision in Time: Application to the Jacobi Iterative Method. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Ragh Kuttappa, Leo Filippini, Nicholas Sica, Baris Taskin |
Scalable Resonant Power Clock Generation for Adiabatic Logic Design. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Jianghan Zhu, Bingzhen Chen, Zhitao Yang, Lingxiao Meng, Terry Tao Ye |
Analog Circuit Implementation of Neural Networks for In-Sensor Computing. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrew Haverly, Sonia López |
Implementation of Grover's Algorithm to Solve the Maximum Clique Problem. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Masoud Shahshahani, Dinesh Bhatia |
Resource and Performance Estimation for CNN Models using Machine Learning. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Vikas Pathak, Satyasai Jagannath Nanda, Amit Mahesh Joshi, Sitanshu Sekhar Sahu |
FPGA Implementation of High Speed Anti-notch Lattice filter for Exon Region Identification in Eukaryotic Genes. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Konstantinos G. Liakos, Georgios K. Georgakilas, Fotis C. Plessas |
Hardware Trojan Classification at Gate-level Netlists based on Area and Power Machine Learning Analysis. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhiming Zhang, Ivan Miketic, Emre Salman, Qiaoyan Yu |
Towards Enhancing Power-Analysis Attack Resilience for Logic Locking Techniques. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | John J. Murray, Adam Z. Foshie, Mst Shamim Ara Shawkat, Garrett S. Rose |
Scaling Constraints for Memristor-based Programmable Interconnect in Reconfigurable Computing Arrays. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Rahul Thapa, Bikal Lamichhane, Dongning Ma, Xun Jiao |
SpamHD: Memory-Efficient Text Spam Detection using Brain-Inspired Hyperdimensional Computing. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Luyi Li, Jun Lin 0001, Zhongfeng Wang 0001 |
PipeBSW: A Two-Stage Pipeline Structure for Banded Smith-Waterman Algorithm on FPGA. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad Monir Hossain, Sajeed Mohammad, Jason Vosatka, Jeffery S. Allen, Monica Allen, Farimah Farahmandi, Fahim Rahman, Mark M. Tehranipoor |
HEXON: Protecting Firmware Using Hardware-Assisted Execution-Level Obfuscation. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Flavio Ponzina, Marco Rios, Giovanni Ansaloni, Alexandre Levisse, David Atienza |
A Flexible In-Memory Computing Architecture for Heterogeneously Quantized CNNs. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyle Buettner, Alan D. George |
Heartbeat Classification with Spiking Neural Networks on the Loihi Neuromorphic Processor. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhixin Pan, Prabhat Mishra 0001 |
Accelerating Spectral Normalization for Enhancing Robustness of Deep Neural Networks. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Samudra Dasgupta, Travis S. Humble |
Reproducibility in Quantum Computing. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Haikuo Shao, Jinming Lu, Jun Lin 0001, Zhongfeng Wang 0001 |
An FPGA-Based Reconfigurable Accelerator for Low-Bit DNN Training. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Tim Todman, Wayne Luk |
Custom enhancements to networked processor templates. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Tiago Augusto Fontana, Erfan Aghaeekiasaraee, Renan Netto, Sheiny Fabre Almeida, Upma Gandhi, Aysa Fakheri Tabrizi, David T. Westwick, Laleh Behjat, José Luís Güntzel |
ILP-Based Global Routing Optimization with Cell Movements. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Jinhe Du, Ke Chen 0018, Peipei Yin, Chenggang Yan 0002, Weiqiang Liu 0001 |
Design of An Approximate FFT Processor Based on Approximate Complex Multipliers. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Naveen Kumar Macha, Prerana Samant, Mostafizur Rahman |
Crosstalk Logic Circuits with Built-in Memory. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Demetriou, Conrad J. Haupt, Ken J. Nixon |
A Quantum Variational Approach to Debugging Combinational Logic Circuits. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Qilin Si, M. Imtiaz Rashid, Benjamin Carrión Schäfer |
Micro-architecture Tuning for Dynamic Frequency Scaling in Coarse-Grain Runtime Reconfigurable Arrays with Adaptive Clock Domain Support. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Wu, Jing Tian 0004, Xiao Hu 0007, Zhongfeng Wang 0001 |
A Novel Modular Multiplier for Isogeny-Based Post-Quantum Cryptography. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Yanming Zhang, Xu Qiu, Qin Li 0016, Fei Qiao, Qi Wei 0001, Li Luo, Huazhong Yang |
Optimization and Evaluation of Energy-Efficient Mixed-Signal MFCC Feature Extraction Architecture. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Saswat Kumar Ram, Shubham Chourasia, Banee Bandana Das, Ayas Kanta Swain, Kamalakanta Mahapatra, Saraju P. Mohanty |
A Solar Based Power Module for Battery-Less IoT Sensors Towards Sustainable Smart Cities. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Md. Adnan Zaman, Rajeev Joshi, Srinivas Katkoori |
High Level Modeling of Memristive Crossbar Arrays. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Marcel Walter, Robert Wille, Frank Sill Torres, Rolf Drechsler |
Bail on Balancing: An Alternative Approach to the Physical Design of Field-Coupled Nanocomputing Circuits. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Amin Norollah, Zahra Kazemi, David Hély |
3D-Sorter: 3D Design of a Resource-Aware Hardware Sorter for Edge Computing Platforms Under Area and Energy Consumption Constraints. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Boqian Wang, Zhonghai Lu |
Supporting QoS in AXI4 Based Communication Architecture. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Nagadastagiri Challapalle, Makesh Chandran, Sahithi Rampalli, Vijaykrishnan Narayanan |
X-VS: Crossbar-Based Processing-in-Memory Architecture for Video Summarization. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Manobendra Nath Mondal, Susmita Sur-Kolay, Bhargab B. Bhattacharya |
Current Comparator-Based Reconfigurable Adder and Multiplier on Hybrid Memristive Crossbar. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Ioannis Galanis, Iraklis Anagnostopoulos, Chinh Nguyen, Guillermo Bares, Dona Burkard |
Inference and Energy Efficient Design of Deep Neural Networks for Embedded Devices. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Michaela Brunner, Michael Gruber, Michael Tempelmeier, Georg Sigl |
Logic Locking Induced Fault Attacks. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Anthony Bisulco, Fernando Cladera Ojeda, Volkan Isler, Daniel Dongyuel Lee |
Near-Chip Dynamic Vision Filtering for Low-Bandwidth Pedestrian Detection. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Gopal Raut, Shubham Rai, Santosh Kumar Vishvakarma, Akash Kumar 0001 |
A CORDIC Based Configurable Activation Function for ANN Applications. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Raunaq Nayar, Padmanabhan Balasubramanian, Douglas L. Maskell |
Hardware Optimized Approximate Adder with Normal Error Distribution. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Sayed Ahmad Salehi, Durjoy Deb Dhruba |
Efficient Hardware Implementation of Discrete Wavelet Transform Based on Stochastic Computing. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Tuhin Subhra Das, Navonil Chatterjee, Prasun Ghosal |
Regulating Degree of Adaptiveness for Performance-Centric NoC Routing. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Andreas Kouloumpris, Theocharis Theocharides, Maria K. Michael |
Cost-Effective Time-Redundancy Based Optimal Task Allocation for the Edge-Hub-Cloud Systems. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Abraham Peedikayil Kuruvila, Shamik Kundu, Kanad Basu |
Analyzing the Efficiency of Machine Learning Classifiers in Hardware-Based Malware Detectors. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Ibrahim L. Olokodana, Saraju P. Mohanty, Elias Kougianos |
Distributed Kriging-Bootstrapped DNN Model for Fast, Accurate Seizure Detection from EEG Signals. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Joseph Paturel, Angeliki Kritikakou, Olivier Sentieys |
Fast Cross-Layer Vulnerability Analysis of Complex Hardware Designs. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Subodha Charles, Prabhat Mishra 0001 |
Securing Network-on-Chip Using Incremental Cryptography. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Alhagie Sallah, Prabha Sundaravadivel |
Tot-Mon: A Real-Time Internet of Things Based Affective Framework for Monitoring Infants. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Amit Mahesh Joshi, Prateek Jain 0006, Saraju P. Mohanty |
iGLU: Non-Invasive Device for Continuous Glucose Measurement with IoMT Framework. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Nikolaos Sketopoulos, Christos P. Sotiriou, Vasilis F. Pavlidis |
Metal Stack and Partitioning Exploration for Monolithic 3D ICs. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Tyler Cultice, Carson Labrado, Himanshu Thapliyal |
A PUF Based CAN Security Framework. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Wu Yang, Himanshu Thapliyal |
Low-Power and Energy-Efficient Full Adders With Approximate Adiabatic Logic for Edge Computing. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Biswajit Bhowmik, Santosh Biswas, Jatindra Kumar Deka, Bhargab B. Bhattacharya |
Locating Open-Channels in Octagon Networks on Chip-Microprocessors. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Sheikh Ariful Islam, Srinivas Katkoori |
SafeController: Efficient and Transparent Control-Flow Integrity for RTL Design. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Jun Zhou, Mengquan Li, Pengxing Guo, Weichen Liu |
Mitigation of Tampering Attacks for MR-Based Thermal Sensing in Optical NoCs. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Teruo Tanimoto, Shuhei Matsuo, Satoshi Kawakami, Yutaka Tabuchi, Masao Hirokawa, Koji Inoue |
Practical Error Modeling Toward Realistic NISQ Simulation. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Baogang Zhang, M. G. Sarwar Murshed, Faraz Hussain 0001, Rickard Ewetz |
Fast Resilient-Aware Data Layout Organization for Resistive Computing Systems. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniel Vert, Renaud Sirdey, Stéphane Louise |
Operational Quantum Annealers are Cursed by their Qubits Interconnection Topologies. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Yirong Kan, Man Wu, Renyuan Zhang, Yasuhiko Nakashima |
A Multi-grained Reconfigurable Accelerator for Approximate Computing. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Margherita Ronchini, Milad Zamani, Hooman Farkhani, Farshad Moradi |
Tunable Voltage-Mode Subthreshold CMOS Neuron. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Ryosuke Matsuo, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera, Akihiko Shinya, Masaya Notomi |
A Synthesis Method for Power-Efficient Integrated Optical Logic Circuits Towards Light Speed Processing. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Yaguang Li, Yishuang Lin, Meghna Madhusudan, Arvind K. Sharma, Wenbin Xu, Sachin S. Sapatnekar, Ramesh Harjani, Jiang Hu |
Exploring a Machine Learning Approach to Performance Driven Analog IC Placement. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammadreza Esmali Nojehdeh, Levent Aksoy, Mustafa Altun |
Efficient Hardware Implementation of Artificial Neural Networks Using Approximate Multiply-Accumulate Blocks. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmad Tarraf, Lars Hedrich, Niklas Kochdumper, Malgorzata Rechmal-Lesse, Markus Olbrich |
Equivalence Checking Methods for Analog Circuits Using Continuous Reachable Sets. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Rakesh Kumar 0012, Bibhas Ghoshal |
Classification and Workload Balancing of Multi-threaded Application on Embedded Platforms. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Shashank Suman, Hemangee K. Kapoor |
Reinforcement Learning Based Refresh Optimized Volatile STT-RAM Cache. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Christos Georgakidis, Christos P. Sotiriou, Nikolaos Sketopoulos, Milos Krstic, Oliver Schrape, Anselm Breitenreiter |
R-Abax: A Radiation Hardening Legalisation Algorithm Satisfying TMR Spacing Constraints. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Shaun Miller |
Quantum Resource Counts for Operations Constructed from an Addition Circuit. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Oumarou Oumarou, Alexandru Paler, Robert Basmadjian |
QUANTIFY: A Framework for Resource Analysis and Design Verification of Quantum Circuits. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Farzane Rabiee, Mostafa Kajouyan, Newsha Estiri, Jordan Fluech, Mahdi Fazeli, Ahmad Patooghy |
Enduring Non-Volatile L1 Cache Using Low-Retention-Time STTRAM Cells. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuan-Dar Chung, Rung-Bin Lin |
Engineering a Standard Cell Library for an Industrial Router with ASAP7 PDK. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Yongwen Zhuang, Dongmei Li |
Real Time Bayer Raw Video Projective Transformation System Using FPGA. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Bastian Richter 0001, Amir Moradi 0001 |
Lightweight Ciphers on a 65 nm ASIC A Comparative Study on Energy Consumption. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahboube Fakhire, Ali Jahanian 0001 |
Vulnerability Analysis Against Fault Attack in terms of the Timing Behavior of Fault Injection. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Seungseok Nam, Emil Matús, Sadia Moriam, Gerhard P. Fettweis |
Path-Spreading Search Algorithm and ASIP Approach for Connection Allocation in TDM-NoCs. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Stavros Simoglou, Christos P. Sotiriou, Dimitris Valiantzas, Nikolaos Sketopoulos |
STA for Mixed Cyclic, Acyclic Circuits. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Keshav Govindarajan, V. S. Kanchana Bhaaskaran |
Borrow Select Subtractor for Low Power and Area Efficiency. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Smrutilekha Samanta, Santanu Sarkar |
A 1.8V 8-Bit 500 MSPS Segmented Current Steering DAC with >66 dB SFDR. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Ioannis Zografopoulos, Charalambos Konstantinou |
DERauth: A Battery-Based Authentication Scheme for Distributed Energy Resources. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Sukarn Agarwal, Hemangee K. Kapoor |
LiNoVo: Longevity Enhancement of Non-Volatile Last Level Caches in Chip Multiprocessors. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Josie E. Rodriguez Condia, Marcio Gonçalves, José Rodrigo Azambuja, Matteo Sonza Reorda, Luca Sterpone |
Analyzing the Sensitivity of GPU Pipeline Registers to Single Events Upsets. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | |
2020 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2020, Limassol, Cyprus, July 6-8, 2020 |
ISVLSI |
2020 |
DBLP BibTeX RDF |
|
| 1 | Suvadip Batabyal, Lovekush Sharma |
A Quantum Pipeline for an Executable Quantum Instruction Set Architecture. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan |
SCRAMBLE: The State, Connectivity and Routing Augmentation Model for Building Logic Encryption. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahdi Zahedi, Mahta Mayahinia, Muath Abu Lebdeh, Stephan Wong, Said Hamdioui |
Efficient Organization of Digital Periphery to Support Integer Datatype for Memristor-Based CIM. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Chenhui Feng, Hui Qian 0002, Zhongfeng Wang 0001 |
An Implementation of Pre-Quantized Random Demodulator Based on Amplitude-to-Pulse Converter. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Mehran Goli, Rolf Drechsler |
Automated Design Understanding of SystemC-Based Virtual Prototypes: Data Extraction, Analysis and Visualization. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Christos Kyrkou, Andreas Papachristodoulou, Andreas Kloukiniotis, Andreas Papandreou, Aris S. Lalos, Konstantinos Moustakas, Theocharis Theocharides |
Towards Artificial-Intelligence-Based Cybersecurity for Robustifying Automated Driving Systems Against Camera Sensor Attacks. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Suraj Dohar, Siddharth R. K., Vasantha M. H., Nithin Kumar Y. B. |
A Novel Single Event Upset Tolerant 12T Memory Cell for Aerospace Applications. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas Ayral, François-Marie Le Régent, Zain H. Saleem, Yuri Alexeev, Martin Suchara |
Quantum Divide and Compute: Hardware Demonstrations and Noisy Simulations. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Bokyung Kim, Hai Li 0001 |
Leveraging 3D Vertical RRAM to Developing Neuromorphic Architecture for Pattern Classification. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Lulu Ge, Keshab K. Parhi |
Molecular MUX-Based Physical Unclonable Functions. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Tiankai Su, Atif Yasin, Sébastien Pillement, Maciej J. Ciesielski |
Formal Verification of Constrained Arithmetic Circuits using Computer Algebraic Approach. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Cezar Reinbrecht, Abdullah Aljuffri, Said Hamdioui, Mottaqiallah Taouil, Bruno Forlin, Johanna Sepúlveda |
Guard-NoC: A Protection Against Side-Channel Attacks for MPSoCs. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Abhijit Das 0002, Abhishek Kumar, John Jose, Maurizio Palesi |
Exploiting On-Chip Routers to Store Dirty Cache Blocks in Tiled Chip Multi-processors. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Subodha Charles, Prabhat Mishra 0001 |
Lightweight and Trust-Aware Routing in NoC-Based SoCs. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Nourhan Elhamawy, Maël Gay, Ilia Polian |
An Open-Source Area-Optimized ECEG Cryptosystem in Hardware. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Prema Kumar Govindaswamy, Vijaya Sankara Rao Pasupureddi |
A 2^7 -1 Low-Power Half-Rate 16-Gb/s Charge-Mode PRBS Generator in 1.2V, 65nm CMOS. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Halima Najibi, Jorge Hunter, Alexandre Levisse, Marina Zapater, Miroslav Vasic, David Atienza |
Enabling Optimal Power Generation of Flow Cell Arrays in 3D MPSoCs with On-Chip Switched Capacitor Converters. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Junseok Oh, Florian Neugebauer, Ilia Polian, John P. Hayes |
Retraining and Regularization to Optimize Neural Networks for Stochastic Computing. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Khyati Kiyawat, Yutaka Masuda, Jun Shiomi, Tohru Ishihara |
Real-Time Minimum Energy Point Tracking Using a Predetermined Optimal Voltage Setting Strategy. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Saurabh Tewari, Anshul Kumar, Kolin Paul |
Bus Width Aware Off-Chip Memory Access Minimization for CNN Accelerators. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
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