Search results for "IWSOC"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Trevor W. Fox, Alex Carreira, Laurence E. Turner	The Design of Low-Power Fixed-Point FIR Differentiator IP Blocks.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Panduka Wijetunga	High-performance crossbar design for system-on-chip.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Emil Dumitrescu, Dominique Borrione	Symbolic Simulation as a Simplifying Strategy for SoC Verification.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Chung-Seok (Andy) Seo, Abhijit Chatterjee	Free-Space Optical Interconnect for High-Performance MCM Systems.	IWSOC	2003	DBLP DOI BibTeX RDF
1	S. Regimbal, Jean-Francois Lemire, Yvon Savaria, Guy Bois, El Mostapha Aboulhamid, A. Baron	Automating Functional Coverage Analysis Based on an Executable Specification.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Jhy-Neng Yang, Yi-Chang Cheng, Chen-Yi Lee	A Design of CMOS Broadband Amplifier With High-Q Active Inductor.	IWSOC	2003	DBLP DOI BibTeX RDF
1		Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June - 2 July 2003, Calgary, Alberta, Canada	IWSOC	2003	DBLP BibTeX RDF
1	J. R. Keilman, Graham A. Jullien, Karan V. I. S. Kaler	A SoC Bio-analysis Platform for Real-time Biological Cell Analysis-on-a-Chip.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Neil W. Bergmann, Peter Waldeck, John A. Williams 0001	A Catalog of Hardware Acceleration Techniques for Real-Time Reconfigurable System on Chip.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Amr T. Abdel-Hamid, Sofiène Tahar, El Mostapha Aboulhamid	IP Watermarking Techniques: Survey and Comparison.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Robert Gulde, Michael Weeks	A Position Control System Design.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Matthias Grünewald, Jörg-Christian Niemann, Ulrich Rückert 0001	A performance evaluation method for optimizing embedded applications.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Oswaldo Cadenas, Graham M. Megson	Pullpipelining: A technique for systolic pipelined circuits.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Kasim A. Rashid	Multi-Models Adaptive Controller for Multivariable Systems.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Aldo Romani, Fabio Campi, S. Ronconi, Marco Tartagni, Gianni Medoro, Nicolò Manaresi	A System-on-a-Programmable-Chip for Real-Time Control of Massively Parallel Arrays of Biosensors and Actuators.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Shih-Chang Hsia	VLSI Implementation of Very Low-Power Motion Estimator for Scaleable Coding Systems.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Sergio Saponara, Luca Fanucci, Luca Serafini	Low-Power FFT/IFFT VLSI Macro Cell for Scalable Broadband VDSL Modem.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Masud H. Chowdhury, Yehea I. Ismail	Analysis of Coupling Noise in Dynamic Circuit.	IWSOC	2003	DBLP DOI BibTeX RDF
1	J. L. Silva, R. M. Costa, G. H. R. Jorge	RtrASSoc - An Adaptable Superscalar Reconfigurable System-On-Chip.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Jae Hong Park, Jung-Min Choi, Min Ho Kim, Jong-Wha Chong	An Efficient Equalizer Architecture Using Tap Allocation Memory for HDTV Channel.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Nitish D. Patel, George G. Coghill, Sing Kiong Nguang	Digital Realization of Analogue Computing Elements Using Bit Streams.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Vojko Matko	Porosity Sensor by Using Quartz Crystals and Two Excitation Signals.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Jiann-Chyi Rau, Kuo-Chun Kuo	An Enhanced Tree-Structured Scan Chain for Pseudo-Exhaustive Testing of VLSI Circuits.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Azeddien M. Sllame	Design Space Exploration Methodology for High-Performance System-on-a-Chip Hardware Cores.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Kugan Vivekanandarajah, Thambipillai Srikanthan, Saurav Bhattacharyya, Prasanna Venkatesh Kannan	Incorporating Pattern Prediction Technique for Energy Efficient Filter Cache Design.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Yuanqing Guo, Gerard J. M. Smit, Hajo Broersma, Paul M. Heysters	Template Generation and Selection Algorithms.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Philippe Brunet, Camel Tanougast, Yves Berviller, Serge Weber	Hardware Partitioning Software for Dynamically Reconfigurable SoC Design.	IWSOC	2003	DBLP DOI BibTeX RDF	FPGA Dynamic Reconfiguration RTR SOC
1	Chang Hee Pyoun, Chi-Ho Lin, Hi-Seok Kim, Jong-Wha Chong	The Efficient Bus Arbitration Scheme in SoC Environment.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Sherif G. Aly 0001, Ashraf M. Salem	Java Based Co-Verification of Expedited Mobile Device.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Chia-Tien Dan Lo	The Design of a Self-Maintained Memory Module for Real-Time Systems.	IWSOC	2003	DBLP DOI BibTeX RDF	Copying Collection, Real-Time, Garbage Collection, Dynamic Memory Management
1	Nikzad Babaii Rizvandi, Abdolreza Nabavi	Design, Simulation and Implementation of a Low-Power Digital Decimation Filter for G.232 Standard.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Fernando De Bernardinis, Luca Fanucci, Tommaso Ramacciotti, Pierangelo Terreni	A QoS Internet Protocol Scheduler on the IXP1200 Network Platform.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Jari Heikkinen, Tommi Rantanen, Andrea G. M. Cilio, Jarmo Takala, Henk Corporaal	Evaluating Template-Based Instruction Compression on Transport Triggered Architectures.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Aman A. Al-Imari, Kasim A. Rashid, Najat Hader Al-Egaidy	Design and Implementation of a Surface Electromycogram System for Sport Field Application.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Rodrigo L. Oliveira Pinto, Franco Maloberti	Novel Design Methodology for Short-Channel MOSFET Analog Circuits.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Tao Lin, Zhou Zhengou	The Implementation of 100MHz Data Acquisition Based on FPGA.	IWSOC	2003	DBLP DOI BibTeX RDF	Compression Sampling, flag, field programmable gate array (FPGA), memory, VHDL, Top-Down
1	Laleh Behjat, Anthony Vannelli	Steiner Tree Construction Based on Congestion for the Global Routing Problem.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Mehboob Alam, Choudhury A. Rahman, Wael M. Badawy, Graham A. Jullien	Efficient Distributed Arithmetic Based DWT Architecture for Multimedia Applications.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Bill Halpin, Naresh Sehgal, C. Y. Roger Chen	Detailed Placement with Net Length Constraints.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Mohammed Sayed, Wael M. Badawy	A New Class of Computational RAM Architectures for Real-Time MPEG-4 Applications.	IWSOC	2003	DBLP DOI BibTeX RDF
1	Andrew Y. Lin, Karl S. Gugel, José Carlos Príncipe	Feasibility of Fixed-Point Transversal Adaptive Filters in FPGA Devices with Embedded DSP Blocks.	IWSOC	2003	DBLP DOI BibTeX RDF

Publications at "IWSOC"( http://dblp.L3S.de/Venues/IWSOC )