| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | |
18th IEEE Latin American Test Symposium, LATS 2017, Bogotá, Colombia, March 13-15, 2017  |
LATS  |
2017 |
DBLP BibTeX RDF |
|
| 1 | Alberto Bosio, Arnaud Virazel, Patrick Girard 0001, Mario Barbareschi |
Approximate computing: Design & test for integrated circuits. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Enea Bagalini, Jacopo Sini, Matteo Sonza Reorda, Massimo Violante, H. Klimesch, Peter Sarson |
An automatic approach to perform the verification of hardware designs according to the ISO26262 functional safety standard. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Freddy Forero, Jean-Marc Gallière, Michel Renovell, Víctor H. Champac |
Analysis of short defects in FinFET based logic cells. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Fabio Benevenuti, Fernanda Lima Kastensmidt |
Evaluation of fault attack detection on SRAM-based FPGAs. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Luis Alberto Contreras Benites, Fernanda Lima Kastensmidt |
Fault injection methodology for single event effects on clock-gated ASICs. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Thierry Bonnoit, Alexandre Coelho, Nacer-Eddine Zergainoh, Raoul Velazco |
SEU impact in processor's control-unit: Preliminary results obtained for LEON3 soft-core. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Ismael Lomeli-Illescas, Sergio A. Solis-Bustos, José Ernesto Rayas-Sánchez |
Analysis of the implications of stacked devices in nano-scale technologies for analog applications. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Matheus Berger Oliveira, Joao de Moraes, Sérgio Luis Cechin, Taisy Silva Weber, Joao Netto |
Practical experience designing and debugging an FPGA for a real-time ethernet industrial bus. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Felipe G. H. Leite, Roberto B. B. Santos, Nilberto H. Medina, Vitor A. P. Aguiar, Renato C. Giacomini, Nemitala Added, Fernando Aguirre, Eduardo L. A. Macchione, Fabian Vargas 0001, Marcilei Aparecida Guazzelli da Silveira |
Ionizing radiation effects on a COTS low-cost RISC microcontroller. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Gaiping An, Riccardo Cantoro, Ernesto Sánchez 0001, Matteo Sonza Reorda |
On the detection of board delay faults through the execution of functional programs. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Paulo Ricardo Cechelero Villa, Roger C. Goerl, Fabian Vargas 0001, Leticia B. Poehls, Nilberto H. Medina, Nemitala Added, Vitor A. P. de Aguiar, Eduardo L. A. Macchione, Fernando Aguirre, Marcilei Aparecida Guazzelli da Silveira, Eduardo Augusto Bezerra |
Analysis of single-event upsets in a Microsemi ProAsic3E FPGA. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrea Floridia, R. Margelli, Ernesto Sánchez 0001 |
On the development of a high-level fault simulator for the analysis of performance faults on speculative modules. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Carlos J. González, Cristiano P. Chenet, Matheus Budelon, Rafael Galhardo Vaz, Odair Lelis Goncalez, Tiago R. Balen |
Evaluation of a mixed-signal design diversity system under radiation effects. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Oscar Acevedo Patino, Juan Carlos Martínez Santos |
Physical-aware pattern selection for stuck-at faults. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Vaibhav Venugopal Rao, Ioannis Savidis |
Protecting analog circuits with parameter biasing obfuscation. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | M. Solinas, Alexandre Coelho, Juan A. Fraire, Nacer-Eddine Zergainoh, Pablo A. Ferreyra, Raoul Velazco |
Preliminary results of NETFI-2: An automatic method for fault injection on HDL-based designs. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Amir Charif, Alexandre Coelho, Nacer-Eddine Zergainoh, Michael Nicolaidis |
MINI-ESPADA: A low-cost fully adaptive routing mechanism for Networks-on-Chips. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Oscar Acevedo, Dimitri Kagaris |
LFSR characteristic polynomial and phase shifter computation for two-dimensional test set generation. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Alejandro David Velasco, Bartolomeo Montrucchio, Maurizio Rebaudengo |
TMR technique for mutex kernel data structures. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Gabriel S. Porto, Paulo F. Butzen, Denis Teixeira Franco |
Exploring BDDs to reduce test pattern set. |
LATS |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Freddy Forero, Andres F. Gomez, Víctor H. Champac |
A methodology for NBTI circuit reliability at reduced power consumption using dual supply voltage. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Coati, Rosario Distefano, Nicola Bombieri, Franco Fummi, Michela Mirenda, Carlo Laudanna, Rosalba Giugno |
A SystemC-based platform for assertion-based verification and mutation analysis in systems biology. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Erik Larsson, Farrokh Ghani Zadegan |
Accessing on-chip instruments through the life-time of systems. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Mauricio de Oliveira Barros, Andrea Weber |
System-level diagnosis for WSN: A heuristic. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Alessandro Danese, Jacopo Mocci, Graziano Pravadelli |
Fault model qualification by assertion mining. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Konstantin O. Petrosyants, Lev M. Sambursky, Igor A. Kharitonov, Boris G. Lvov |
Fault simulation in radiation-hardened SOI CMOS VLSIs using universal compact MOSFET model. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Zoran Stamenkovic, Vladimir Petrovic |
A comprehensive approach to fault tolerance: Device, circuit, and system techniques. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Bruna F. Flesch, Bianca Brand, Rodrigo Marques de Figueiredo, Lucio Rene Prade, Marcio Rosa da Silva |
Proposal of a functional safety methodology applied to fault tolerance in FPGA applications. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Bernd Becker 0001 |
Known unknowns - Knowledge in the presence of unknowns. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Eduardo Liebl, Cristina Meinhardt, Paulo F. Butzen |
Reliability analysis of majority voters under permanent faults. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Werner Nedel, Fernanda Lima Kastensmidt, José Rodrigo Azambuja |
Evaluating the effects of single event upsets in soft-core GPGPUs. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Harini Bhamidipati, Daniel G. Saab, Jacob A. Abraham |
Single Trojan injection model generation and detection. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael A. Kochte, Hans-Joachim Wunderlich |
Dependable on-chip infrastructure for dependable MPSOCs. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Krishnendu Chakrabarty |
The hype, myths, and realities of testing 2.5D/3D integrated circuits. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Suvadeep Banerjee, Abhijit Chatterjee, Jacob A. Abraham |
Checksum based error detection in linearized representations of non linear control systems. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Stefano Esposito, Serhiy Avramenko, Massimo Violante |
On the consolidation of mixed criticalities applications on multicore architectures. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | M. De Carvalho, Maurício Altieri, L. Puricelli, Renato P. Butzen, Renato P. Ribas, Eric E. Fabris |
On-silicon validation of a benchmark generation methodology for effectively evaluating combinational cell library design. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Kelson Gent, Michael S. Hsiao |
A control path aware metric for grading functional test vectors. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Eduardo Chielle, Boyang Du, Fernanda Lima Kastensmidt, Sergio Cuenca-Asensi, Luca Sterpone, Matteo Sonza Reorda |
Hybrid soft error mitigation techniques for COTS processor-based systems. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Christian Bartsch 0001, Nico Rödel, Carlos Villarraga, Dominik Stoffel, Wolfgang Kunz |
A HW-dependent software model for cross-layer fault analysis in embedded systems. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Gennaro Severino Rodrigues, Fernanda Lima Kastensmidt |
Soft error analysis at sequential and parallel applications in ARM Cortex-A9 dual-core. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Luiz Gustavo Casagrande, Fernanda Lima Kastensmidt |
Soft error analysis in embedded software developed with & without operating system. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Rafael B. Schivittz, Denis Teixeira Franco, Cristina Meinhardt, Paulo F. Butzen |
A probabilistic model for stuck-on faults in combinational logic gates. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Eduardo Wächter, Francisco F. S. Barreto, Vinicius Fochi, Alexandre M. Amory, Fernando Gehm Moraes |
A layered approach for fault tolerant NoC-based MPSoCs - Special session: Dependable MPSoCs. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Walter Soto Encinas, Francisco Romulo da Silva Araujo, Harney Abrahim |
Infrastructure for formal and dynamic verification of peripheral programming model. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Guilherme Schwanke Cardoso, Tiago R. Balen |
Performance evaluation of radiation hardened analog circuits based on Enclosed Layout geometry. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Charalambos Konstantinou, Marios Sazos, Michail Maniatakos |
Attacking the smart grid using public information. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Subhasish Mitra |
Transforming nanodevices into nanosystems: The N3XT 1, 000X. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | M. Tulio Martins, G. Cardoso Medeiros, Thiago Copetti, Fabian Vargas 0001, Letícia Maria Bolzani Poehls |
Analyzing NBTI impact on SRAMs with resistive-open defects. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Artjom Jasnetski, Raimund Ubar, Anton Tsertov |
On automatic software-based self-test program generation based on high-level decision diagrams. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniel Fusco, Tiago R. Balen |
Radiation effects in low power and ultra low power voltage references. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Jose Isaza-Gonzalez, Alejandro Serrano-Cases, Felipe Restrepo-Calle, Sergio Cuenca-Asensi, Antonio Martínez-Álvarez |
Dependability evaluation of COTS microprocessors via on-chip debugging facilities. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Akhilesh Jaiswal 0001, Kaushik Roy 0001 |
Spin transfer torque memories for on-chip caches: Prospects and perspectives. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Thiago Copetti, Guilherme Medeiros Machado, Leticia Bolzani Poehls, Fabian Vargas 0001, Sergei Kostin, Maksim Jenihhin, Jaan Raik, Raimund Ubar |
Gate-level modelling of NBTI-induced delays under process variations. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Serhiy Avramenko, Matteo Sonza Reorda, Massimo Violante, Görschwin Fey |
Analysis of the effects of soft errors on compression algorithms through fault injection inside program variables. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Amit Karel, Mariane Comte, Jean-Marc Gallière, Florence Azaïs, Michel Renovell |
Comparative study of Bulk, FDSOI and FinFET technologies in presence of a resistive short defect. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Konstantin Shibin, Sergei Devadze, Artur Jutman |
On-line fault classification and handling in IEEE1687 based fault management system for complex SoCs. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Mario Schölzel, Tobias Koal, Sebastian Müller 0005, Stefan Scharoba, Stephanie Roder, Heinrich Theodor Vierhaus |
A comprehensive software-based self-test and self-repair method for statically scheduled superscalar processors. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | J. Barboza, J. Basualdo, Julio Pérez Acle |
Auxiliary IP blocks for early dependability analysis of small processor based systems. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Rogerio Paludo, Djones Lettnin |
A methodology for early functional verification of embedded software combining virtual platforms and bounded model checking. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Pierre-Emmanuel Gaillardon, Romain Magni, Luca Gaetano Amarù, Mehdi Hasan, Ross Walker 0001, Berardi Sensale Rodriguez, Jean-Frédéric Christmann, Edith Beigné |
Three-Independent-Gate Transistors: Opportunities in digital, analog and RF applications. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Anelise Kologeski, Henrique Colao Zanuz, Fernanda Lima Kastensmidt |
Using traffic monitoring to tolerate multiple faults in 3D NoCs. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Afef Kchaou, W. El Hadj Youssef, Rached Tourki, Fraidy Bouesse, Pablo Ramos, Raoul Velazco |
A deep analysis of SEU consequences in the internal memory of LEON3 processor. |
LATS |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | |
17th Latin-American Test Symposium, LATS 2016, Foz do Iguacu, Brazil, April 6-8, 2016 |
LATS |
2016 |
DBLP BibTeX RDF |
|
| 1 | Karine Coulié-Castellani, Wenceslas Rahajandraibe, Hassen Aziza, Jean-Michel Portal, Gilles Micolau |
Improvement of a detection chain based on a VCO concept for microelectronic reliability under natural radiative environment. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Riccardo Cantoro, Marco Gaudesi, Ernesto Sánchez 0001, Pasquale Davide Schiavone, Giovanni Squillero |
An evolutionary approach for test program compaction. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Victor M. Goncalves Martins, Joao Gabriel Reis, Horácio C. Neto, Eduardo Augusto Bezerra |
FPGA redundancy recovery based on partial bitstreams for multiple partitions. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Ivick Guerra-Gómez, Trent McConaghy, Esteban Tlelo-Cuautle |
Study of regression methodologies on analog circuit design. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Florence Azaïs, Stephane David-Grignot, Laurent Latorre, Francois Lefevre |
A digital technique for the evaluation of SSB phase noise of analog/RF signals. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Zissis Poulos, Andreas G. Veneris |
Exemplar-based failure triage for regression design debugging. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Jaak Kousaar, Raimund Ubar, Igor Aleksejev |
Complex delay fault reasoning with sequential 7-valued algebra. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Raul Acosta Hernandez, Marius Strum, Jiang Chau Wang |
Transformations on the FSMD of the RTL code with combinational logic statements for equivalence checking of HLS. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Igor Aleksejev, Sergei Devadze, Artur Jutman, Konstantin Shibin |
Virtual reconfigurable scan-chains on FPGAs for optimized board test. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Luis Gerardo de la Fraga, Esteban Tlelo-Cuautle |
Optimizing operational amplifiers by metaheuristics and considering tolerance analysis. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Sebastian Müller 0005, Tobias Koal, Stefan Scharoba, Heinrich Theodor Vierhaus, Mario Schölzel |
A multi-layer software-based fault-tolerance approach for heterogenous multi-core systems. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Jimmy Tarrillo, Jorge L. Tonfat, Lucas A. Tambara, Fernanda Lima Kastensmidt, Ricardo Reis 0001 |
Multiple fault injection platform for SRAM-based FPGA based on ground-level radiation experiments. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexandro Giron-Allende, Victor Avendaño, Esteban Martinez Guerrero |
A controllable setup and propagation delay flip-flop design. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroyuki Yamauchi, Worawit Somha |
Ringing error prevention techniques in Lucy-Richardson deconvolution process for SRAM space-time margin variation effect screening designs. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Hosoon Shin, Sheldon X.-D. Tan, Guoyong Shi, Esteban Tlelo-Cuautle |
Rare event diagnosis by iterative failure region locating and elite learning sample selection. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Mafalda Cortez, Said Hamdioui, Ryoichi Ishihara |
Design dependent SRAM PUF robustness analysis. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Xian Wang 0003, Kenfack Blanchard, Estella Silva, Abhijit Chatterjee |
"Safe" built-in test and tuning of boost converters using feedback loop perturbations. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexandra Kourfali, Dirk Stroobandt |
Test set generation almost for free using a run-time FPGA reconfiguration technique. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Baohu Li, Bei Zhang, Vishwani D. Agrawal |
Adopting multi-valued logic for reduced pin-count testing. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Ronaldo Rodrigues Ferreira, Ernesto Sánchez 0001, Jean da Rolt, Gabriel L. Nazar, Álvaro F. Moreira, Luigi Carro, Matteo Sonza Reorda |
Permanent fault detection and diagnosis in the lightweight dual modular redundancy architecture. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Davide Ferraretto, Graziano Pravadelli |
Efficient fault injection in QEMU. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Jailene Hernandez, Johan Castrillon, Manuel Jiménez, Angel De La Torre, Pedro Escalona, Rogelio Palomera |
A virtual instrument design for low-cost charge-pumping characterization of integrated MOSFETs. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Ondrej Novák, Jiri Jenícek, Martin Rozkovec |
Test compression for circuits with multiple scan chains. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Paolo Bernardi, Lyl M. Ciganda Brasca, Matteo Sonza Reorda, Said Hamdioui |
SW-based transparent in-field memory testing. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Bharath Shivashankar, Michael Skaggs, Sushmita Kadiyala Rao, Ryan W. Robucci, Nilanjan Banerjee, Chintan Patel |
Estimation of dynamic current waveforms using pre-characterization of standard cells. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Andres F. Gomez, Víctor H. Champac |
Effective selection of favorable gates in BTI-critical paths to enhance circuit reliability. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | João Guilherme Mourão Melo, Frank Sill Torres |
Noise analysis of integrated bulk current sensors for detection of radiation induced soft errors. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Felipe Restrepo-Calle, Sergio Cuenca-Asensi, Antonio Martínez-Álvarez, Fernanda Lima Kastensmidt |
Considerations on application of selective hardening based on software fault tolerance techniques. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Takanori Moriyasu, Satoshi Ohtake |
A method of one-pass seed generation for LFSR-based deterministic/pseudo-random testing of static faults. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Sonza Reorda |
In-field test of safety-critical systems: is functional test a feasible solution? |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | N. Palermo, Valentin Tihhomirov, Thiago Santos Copetti, Maksim Jenihhin, Jaan Raik, Sergei Kostin, Marco Gaudesi, Giovanni Squillero, Matteo Sonza Reorda, Fabian Vargas 0001, Letícia Maria Bolzani Pöhls |
Rejuvenation of nanoscale logic at NBTI-critical paths using evolutionary TPG. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Thiago Copetti, G. Cardoso Medeiros, Letícia Maria Bolzani Poehls, Fabian Vargas 0001 |
NBTI-aware design of integrated circuits: a hardware-based approach. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Grégoire Surrel, Francisco J. Rincón, Srinivasan Murali, David Atienza |
Design of ultra-low-power smart wearable systems. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Antonio Zenteno Ramírez |
Power distribution network analysis using semi irregular plane shape approach and via modeling. |
LATS |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | |
16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015 |
LATS |
2015 |
DBLP BibTeX RDF |
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