Search results for "Radix"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
29	Nikolaos Gaitanis, Constantin Halatsis	Near-Perfect Codes for Binary-Coded Radix-r Arithmetic Units.	IEEE Trans. Computers	1983	DBLP DOI BibTeX RDF	AN codes, binary-coded radix-r arithmetic, error-correcting codes, arithmetic codes
29	C. H. Huang	A Fully Parallel Mixed-Radix Conversion Algorithm for Resedue Number Applications.	IEEE Trans. Computers	1983	DBLP DOI BibTeX RDF	General computing, mixed-radix conversion, parallel and pipelined architecture, residue number system
29	Shalhav Zohar	Rounding and Truncation in Radix (-2) Systems.	IEEE Trans. Computers	1976	DBLP DOI BibTeX RDF	N-bit rounding algorithms, radix (-2), rounding error bounds, truncation errors
29	Paul W. Baker	More Efficient Radix-2 Algorithms for Some Elementary Functions.	IEEE Trans. Computers	1975	DBLP DOI BibTeX RDF	variable left shift, Digital arithmetic, iterative algorithms, elementary functions, radix 2
28	Saranya Karunamurthi, Vijeyakumar Krishnasamy Natarajan	A Novel n-Decimal Reversible Radix Binary-Coded Decimal Multiplier Using Radix Encoding Scheme.	Circuits Syst. Signal Process.	2021	DBLP DOI BibTeX RDF
28	Ramalakshmi Barma Venkata, Noorbasha Fazal	FPGA Implementation of Optimized Radix 4 and Radix 8 Booth Algorithm.	Int. J. Perform. Eng.	2021	DBLP DOI BibTeX RDF
28	Shuyuan Fan, Xiaoli Shi, Annan Wang, Tiejun Hou, Kun Li, Yunpeng Diao	Evaluation of the key active ingredients of 'Radix Astragali and Rehmanniae Radix Mixture' and related signaling pathways involved in ameliorating diabetic foot ulcers from the perspective of TCM-related theories.	J. Biomed. Informatics	2021	DBLP DOI BibTeX RDF
28	Sirani M. Perera, Daniel Silverio, Austin Ogle	Efficient Split-Radix and Radix-4 DCT Algorithms and Applications.	SEA²	2019	DBLP DOI BibTeX RDF
28	Xin-Yu Shih, Yue-Qu Liu, Hong-Ru Chou	48-Mode Reconfigurable Design of SDF FFT Hardware Architecture Using Radix-32 and Radix-23 Design Approaches.	IEEE Trans. Circuits Syst. I Regul. Pap.	2017	DBLP DOI BibTeX RDF
28	Renato H. Neuenfeld, Mateus Beck Fonseca, Eduardo A. C. da Costa, Jean P. Oses	Exploiting addition schemes for the improvement of optimized radix-2 and radix-4 fft butterflies.	LASCAS	2017	DBLP DOI BibTeX RDF
28	Zhuo Qian, Martin Margala	Low-Power Split-Radix FFT Processors Using Radix-2 Butterfly Units.	IEEE Trans. Very Large Scale Integr. Syst.	2016	DBLP DOI BibTeX RDF
28	Renato Neuenfeld, Mateus Fonseca, Eduardo A. C. da Costa	Design of optimized radix-2 and radix-4 butterflies from FFT with decimation in time.	LASCAS	2016	DBLP DOI BibTeX RDF
28	Manzur Rahman, Arindam Sanyal, Nan Sun 0001	A Novel Hybrid Radix-3/Radix-2 SAR ADC With Fast Convergence and Low Hardware Complexity.	IEEE Trans. Circuits Syst. II Express Briefs	2015	DBLP DOI BibTeX RDF
28	Khalid Javeed, Xiaojun Wang 0001	Radix-4 and radix-8 booth encoded interleaved modular multipliers over general Fp.	FPL	2014	DBLP DOI BibTeX RDF
28	Animesh Jain, Ritesh Parikh, Valeria Bertacco	High-radix on-chip networks with low-radix routers.	ICCAD	2014	DBLP DOI BibTeX RDF
28	Xingyu Liu, Yangdong Deng	Fast Radix: A Scalable Hardware Accelerator for Parallel Radix Sort.	FIT	2014	DBLP DOI BibTeX RDF
28	Olga Kupriianova, Christoph Quirin Lauter, Jean-Michel Muller	Radix Conversion for IEEE754-2008 Mixed Radix Floating-Point Arithmetic.	CoRR	2013	DBLP BibTeX RDF
28	Ramya Muralidharan, Chip-Hong Chang	Radix-4 and Radix-8 Booth Encoded Multi-Modulus Multipliers.	IEEE Trans. Circuits Syst. I Regul. Pap.	2013	DBLP DOI BibTeX RDF
28	Manohar Ayinala, Keshab K. Parhi	FFT Architectures for Real-Valued Signals Based on Radix-23 and Radix-24 Algorithms.	IEEE Trans. Circuits Syst. I Regul. Pap.	2013	DBLP DOI BibTeX RDF
28	Sian-Jheng Lin, Wei-Ho Chung	The split-radix fast Fourier transforms with radix-4 butterfly units.	APSIPA	2013	DBLP DOI BibTeX RDF
28	Andrew Carter, Paula Ning, William Koven, David Money Harris, Michael Braly, Nathan Jones, Julien Massas, Trevin Murakami, Alexandra Simoni, Sanu Mathew	Comparison of parallelized radix-2 and radix-4 scalable Montgomery multipliers.	ACSSC	2013	DBLP DOI BibTeX RDF
28	Olga Kupriianova, Christoph Quirin Lauter, Jean-Michel Muller	Radix conversion for IEEE754-2008 mixed radix floating-point arithmetic.	ACSSC	2013	DBLP DOI BibTeX RDF
28	Milos D. Ercegovac, Robert McIlhenny	Shared implementation of radix-10 and radix-16 square root algorithm with limited precision primitives.	ACSCC	2012	DBLP DOI BibTeX RDF
28	Johan Löfgren, Peter Nilsson 0001	On hardware implementation of radix 3 and radix 5 FFT kernels for LTE systems.	NORCHIP	2011	DBLP DOI BibTeX RDF
28	Milos D. Ercegovac, Robert McIlhenny	Shared implementation of radix-10 and radix-16 division algorithm with limited precision primitives.	ACSCC	2011	DBLP DOI BibTeX RDF
28	Waqar Hussain 0001, Fabio Garzia, Jari Nurmi	Evaluation of Radix-2 and Radix-4 FFT processing on a reconfigurable platform.	DDECS	2010	DBLP DOI BibTeX RDF
28	Peter Westermann, Hartmut Schröder	Constraints on the SIMD vectorization of radix-2 and mixed-radix FFTS.	EUSIPCO	2009	DBLP BibTeX RDF
28	Han-Wen Hsu, Chi-Min Liu	Fast Radix- and Mixed-Radix Algorithms for Type-IV DCT.	IEEE Signal Process. Lett.	2008	DBLP DOI BibTeX RDF
28	Saad Bouguezel, M. Omair Ahmad, M. N. Shanmukha Swamy	New radix-(2×2×2)/(4×4×4) and radix-(2×2×2)/(8×8×8) DIF FFT algorithms for 3-D DFT.	IEEE Trans. Circuits Syst. I Regul. Pap.	2006	DBLP DOI BibTeX RDF
28	Alexander A. Petrovsky, Sergei L. Shkredov	Radix 2 and split radix 2-4 algorithms in formal synthesis of parallel-pipeline FFT processors.	EUSIPCO	2004	DBLP BibTeX RDF
28	Chitlur Nagabhushan, Olga Kosheleva, Sergio D. Cabrera, Glenn A. Gibson	Design of Radix-2 and Radix-4 FFT Processors Using a Modular Architecture Family.	PDPTA	1996	DBLP BibTeX RDF
28	Jan Fandrianto	Algorithm for high speed shared radix 8 division and radix 8 square root.	IEEE Symposium on Computer Arithmetic	1989	DBLP DOI BibTeX RDF
28	Jan Fandrianto	Algorithm for high speed shared radix 4 division and radix 4 square-root.	IEEE Symposium on Computer Arithmetic	1987	DBLP DOI BibTeX RDF
27	Yevgen Voronenko, Markus Püschel	Algebraic Signal Processing Theory: Cooley-Tukey Type Algorithms for Real DFTs.	IEEE Trans. Signal Process.	2009	DBLP DOI BibTeX RDF
27	Miaoqing Huang, Kris Gaj, Soonhak Kwon, Tarek A. El-Ghazawi	An Optimized Hardware Architecture for the Montgomery Multiplication Algorithm.	Public Key Cryptography	2008	DBLP DOI BibTeX RDF	MWR2MM Algorithm, Field Programmable Gate Arrays, Montgomery Multiplication
27	Zhongfeng Wang 0001	High-Speed Recursion Architectures for MAP-Based Turbo Decoders.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
27	Y. Wang, Y. Tang, Y. Jiang, Y.-G. Chung, S.-S. Song, M.-S. Lim	Novel Memory Reference Reduction Methods for FFT Implementations on DSP Processors.	IEEE Trans. Signal Process.	2007	DBLP DOI BibTeX RDF
27	Shengmei Mou, Xiaodong Yang 0002	Research on the RAW Dependency in Floating-point FFT Processors.	SNPD (1)	2007	DBLP DOI BibTeX RDF
27	Sylvie Boldo	Pitfalls of a Full Floating-Point Proof: Example on the Formal Proof of the Veltkamp/Dekker Algorithms.	IJCAR	2006	DBLP DOI BibTeX RDF
27	Zhongjun Wang, Lee Guek Yeo, Wenzhen Li, Yanxin Yan, Yujing Ting, Masayuki Tomisawa	A Novel FFT Processor for OFDM UWB Systems.	APCCAS	2006	DBLP DOI BibTeX RDF
27	Saad Bouguezel, M. Omair Ahmad, M. N. S. Swamy	Efficient output-pruning of the 2-D FFT algorithm.	ISCAS (3)	2004	DBLP DOI BibTeX RDF
27	Eduardo A. C. da Costa, Sergio Bampi, José Monteiro 0001	A New Pipelined Array Architecture for Signed Multiplication.	SBCCI	2003	DBLP DOI BibTeX RDF
27	Tim Courtney, Richard H. Turner, Roger F. Woods	Multiplexer Based Reconfiguration for Virtex Multipliers.	FPL	2000	DBLP DOI BibTeX RDF
27	Stuart F. Oberman, Michael J. Flynn	Minimizing the complexity of SRT tables.	IEEE Trans. Very Large Scale Integr. Syst.	1998	DBLP DOI BibTeX RDF
27	Chung Nan Lyu, David W. Matula	Redundant Binary Booth Recoding.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF
27	Stephen E. McQuillan, John V. McCanny	Fast VLSI algorithms for division and square root.	J. VLSI Signal Process.	1994	DBLP DOI BibTeX RDF
24	Srecko Brlek, Michel Koskas, Xavier Provençal	A Linear Time and Space Algorithm for Detecting Path Intersection.	DGCI	2009	DBLP DOI BibTeX RDF	Freeman code, lattice paths, radix tree, discrete figures, data structure, self-intersection
24	Akihiro Hirosaki, Masatomo Miura, Atsushi Matsumoto, Takahiro Hanyu	Vth-Variation Compensation of Multiple-Valued Current-Mode Circuit Using TMR Devices.	ISMVL	2008	DBLP DOI BibTeX RDF	differential-pair circuit, radix-2 signed-digit adder, reliability
24	Margareta Ackerman, Jeffrey O. Shallit	Efficient Enumeration of Regular Languages.	CIAA	2007	DBLP DOI BibTeX RDF	nondeterministic finite automaton, radix order, enumeration, regular language, lexicographical order
24	Jarmo Takala, Konsta Punkka	Scalable FFT Processors and Pipelined Butterfly Units.	J. VLSI Signal Process.	2006	DBLP DOI BibTeX RDF	parallel processing, application-specific integrated circuit, CORDIC, distributed arithmetic, radix-2
24	William L. Freking, Keshab K. Parhi	Performance-Scalable Array Architectures for Modular Multiplication.	J. VLSI Signal Process.	2002	DBLP DOI BibTeX RDF	modular multipliers, systolic computation, high-radix arithmetic implementation, pipelined architectures
24	Ralf Hinze	Bootstrapping one-sided flexible arrays.	ICFP	2002	DBLP DOI BibTeX RDF	flexible arrays, mixed-radix number systems, purely functional data structures, sub-logarithmic look-up, Haskell
24	Syed Mahfuzul Aziz, S. J. Carr	On C-Testability of Carry Free Dividers.	DELTA	2002	DBLP DOI BibTeX RDF	Carry-free, C-Testability, Divider, Radix-2
24	Jaime Seguel, Dorothy Bollman, John Feo	A Framework for the Design and Implementation of FFT Permutation Algorithms.	IEEE Trans. Parallel Distributed Syst.	2000	DBLP DOI BibTeX RDF	Tensor sum, induced permutation, index-digit permutation, mixed-radix digit-reversal
24	Takahiro Hanyu, Tsukasa Ike, Michitaka Kameyama	Low-Power Dual-Rail Multiple-Valued Current-Mode Logic Circuit Using Multiple Input-Signal Levels.	ISMVL	2000	DBLP DOI BibTeX RDF	dual-rail multiple-valued current-mode logic circuit, two supply voltages, differential-pair circuit, radix-2 signed-digit adder
24	William L. Freking, Keshab K. Parhi	Performance-Scalable Array Architectures for Modular Multiplication.	ASAP	2000	DBLP DOI BibTeX RDF	high-radix algorithms, cylindrical arrays, folding transformation, systolic arrays, modular multiplication, scalable architectures
24	Yuanyuan Yang 0001, Jianchao Wang	A New Self-Routing Multicast Network.	IEEE Trans. Parallel Distributed Syst.	1999	DBLP DOI BibTeX RDF	binary radix sorting network, reverse banyan network, recursive construction, compact routing, self-routing, Multicast network
24	Kuang-Chih Liu, Chung-Ta King	On the effectiveness of sectored caches in reducing false sharing misses.	ICPADS	1997	DBLP DOI BibTeX RDF	sectored caches, false sharing misses, bus-based multiprocessors, coherence unit, MESI protocol, LU, SORBYR, SORBYC, benchmarks, FFT, performance metric, cache storage, Radix
24	Lutz J. Micheel, Hans L. Hartnagel	Interband RTDs with Nanoelectronic HBT-LED Structures for Multiple-Valued Computation.	ISMVL	1996	DBLP DOI BibTeX RDF	heterojunction bipolar transistors, resonant tunnelling devices, light emitting devices, interband RTDs, resonant tunnelling devices, nanoelectronic HBT-LED structures, multiple-valued computation, nanoelectronic arrays, complex signal processing methods, HBT-LED-RTD circuitry, heterojunction bipolar transistors, light emitting devices, internal optical methods, signal summation, precision photon streams, positive-digit radix-2 MVL, A/D conversion capability, optical isolation, buried optical interconnects, microcavity lasers, signal processing, optical interconnections, optical interconnects, multiple-valued logic, multivalued logic circuits, thresholding functions, analogue-digital conversion
24	Jean-Claude Bajard, Laurent-Stéphane Didier, Jean-Michel Muller	A New Euclidean Division Algorithm For Residue Number Systems.	ASAP	1996	DBLP DOI BibTeX RDF	Euclidean division algorithm, large moduli, very large integers, high-radix division method, parallel computer, computational geometry, digital arithmetic, residue number systems, residue number systems, floating point arithmetic, floating-point arithmetic, modular arithmetic, special-purpose architecture
24	Byoung Seob Park, Sung Chun Kim	FBSF: a new fast packet switching fabric based-on multistage interconnection network with multiple outlets.	ISPAN	1996	DBLP DOI BibTeX RDF	packet switching fabric, FBSF, multiple outlets, ATM switch architecture, FAB Banyan Switching Fabrics, Batcher sorter, radix-r double shuffle network, r-packet distributors, parallel architectures, packet switching, multistage interconnection networks, multistage interconnection network, switch fabrics
24	Amitabh Mishra, Yeimkuan Chang, Laxmi N. Bhuyan, Fabrizio Lombardi	Fault-tolerant sorting in SIMD hypercubes.	IPPS	1995	DBLP DOI BibTeX RDF	fault-tolerant sorting, SIMD hypercubes, fault tolerant computing, multiprocessors, sorting, multiprocessing systems, hypercube networks, node failures, radix sort
24	Ryutaro Murakami, Yoshiteru Ohkura, Ryosaku Shimada	2k-ary Cyclic AN Codes for Burst Error Correction.	ISMVL	1995	DBLP DOI BibTeX RDF	2/sup k/-ary cyclic AN codes, burst error correction, radix 2/sup k/ expressions, code structure, arithmetic burst errors, burst error correction ability, binary cyclic AN code, error correction codes, error detection, error detection codes, arithmetic codes, arithmetic operations, cyclic codes
24	Ronald Fagin, Jürg Nievergelt, Nicholas Pippenger, H. Raymond Strong	Extendible Hashing - A Fast Access Method for Dynamic Files.	ACM Trans. Database Syst.	1979	DBLP DOI BibTeX RDF	external hashing, radix search, searching, hashing, access method, B-tree, index, file organization, directory, trie, extendible hashing
23	Ismo Hänninen, Jarmo Takala	Radix-4 Recoded Multiplier on Quantum-Dot Cellular Automata.	SAMOS	2009	DBLP DOI BibTeX RDF	nanotechnology, multiplication, arithmetic, QCA
23	Pouya Dormiani, Milos D. Ercegovac, Jean-Michel Muller	Design and Implementation of a Radix-4 Complex Division Unit with Prescaling.	ASAP	2009	DBLP DOI BibTeX RDF
23	Alex Piñeiro, Javier D. Bruguera, Fabrizio Lamberti, Paolo Montuschi	A Radix-2 Digit-by-Digit Architecture for Cube Root.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF	Cost/performance, High-Speed Arithmetic
23	Ashur Rafiev, Julian P. Murphy, Danil Sokolov, Alexandre Yakovlev	Conversion driven design of binary to mixed radix circuits.	ICCD	2008	DBLP DOI BibTeX RDF
23	Hans Eberle, Pedro Javier García, José Flich, José Duato, Robert J. Drost, Nils Gura, David Hopkins 0001, Wladek Olesinski	High-radix crossbar switches enabled by proximity communication.	SC	2008	DBLP DOI BibTeX RDF
23	Guoan Bi, Yongmei Wei	Split-Radix Algorithms for Arbitrary Order of Polynomial Time Frequency Transforms.	IEEE Trans. Signal Process.	2007	DBLP DOI BibTeX RDF
23	Steven G. Johnson, Matteo Frigo	A Modified Split-Radix FFT With Fewer Arithmetic Operations.	IEEE Trans. Signal Process.	2007	DBLP DOI BibTeX RDF
23	Gianni Franceschini, S. Muthukrishnan 0001, Mihai Patrascu	Radix Sorting with No Extra Space.	ESA	2007	DBLP DOI BibTeX RDF
23	Seung Ho Ok, Byung In Moon	A Digit Reversal Circuit for the Variable-Length Radix-4 FFT.	FGCN (2)	2007	DBLP DOI BibTeX RDF
23	Yukihiro Iguchi, Tsutomu Sasao, Munehiro Matsuura	On Designs of Radix Converters Using Arithmetic Decompositions--Binary to Decimal Converters--.	ISMVL	2007	DBLP DOI BibTeX RDF
23	Hani H. Saleh, Bassam Jamil Mohd, Adnan Aziz, Earl E. Swartzlander Jr.	Contention-free switch-based implementation of 1024-point Radix-2 Fourier Transform Engine.	ICCD	2007	DBLP DOI BibTeX RDF
23	Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, Akashi Satoh	SPA against an FPGA-Based RSA Implementation with a High-Radix Montgomery Multiplier.	ISCAS	2007	DBLP DOI BibTeX RDF
23	Gian Carlo Cardarilli, Marco Ottavi, Salvatore Pontarelli, Marco Re, Adelio Salsano	Fault Localization, Error Correction, and Graceful Degradation in Radix 2 Signed Digit-Based Adders.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	Fault tolerance, error checking, high-speed arithmetic
23	Shu-Chung Yi, Kun-Tse Lee, Jin-Jia Chen, Chien-Hung Lin, Chuen-Ching Wang, Chin-Fa Hsieh, Chih-Yung Lu	The new architecture of radix-4 Chinese abacus adder.	ISMVL	2006	DBLP DOI BibTeX RDF
23	Bonseok Koo, Dongwook Lee, Gwonho Ryu, Taejoo Chang, Sangjin Lee 0002	High-Speed RSA Crypto-processor with Radix-4 Modular Multiplication and Chinese Remainder Theorem.	ICISC	2006	DBLP DOI BibTeX RDF	Booth’s algorithm, RSA, Chinese Remainder Theorem, Montgomery multiplication, Carry Save Adder
23	Jeesung Lee, Hanho Lee, Sang-in Cho, Sangsung Choi	A high-speed, low-complexity radix-24 FFT processor for MB-OFDM UWB systems.	ISCAS	2006	DBLP DOI BibTeX RDF
23	Yibo Fan, Xiaoyang Zeng, Yu Yu, Gang Wang, Qianling Zhang	A modified high-radix scalable Montgomery multiplier.	ISCAS	2006	DBLP DOI BibTeX RDF
23	Gian Carlo Cardarilli, Marco Ottavi, Salvatore Pontarelli, Marco Re, Adelio Salsano	Localization of Faults in Radix-n Signed Digit Adders.	IOLTS	2006	DBLP DOI BibTeX RDF
23	Jun-Hong Chen, Ming-Der Shieh, Haw-Shiuan Wu, Wen-Ching Lin	Asynchronous Design of Modular Multiplication Using Adaptive Radix Computation.	APCCAS	2006	DBLP DOI BibTeX RDF
23	David Guevorkian, Aki Launiainen, Ville Lappalainen, Petri Liuha, Konsta Punkka	A Method for Designing High-Radix Multiplier-Based Processing Units for Multimedia Applications.	IEEE Trans. Circuits Syst. Video Technol.	2005	DBLP DOI BibTeX RDF
23	Leonardo Londero de Oliveira, Cristiano Santos, Daniel Lima Ferrão, Eduardo A. C. da Costa, José Monteiro 0001, João Baptista dos Santos Martins, Sergio Bampi, Ricardo Augusto da Luz Reis	A Comparison of Layout Implementations of Pipelined and Non-Pipelined Signed Radix-4 Array Multiplier and Modified Booth Multiplier Architectures.	VLSI-SoC	2005	DBLP DOI BibTeX RDF
23	Andreas Lindahl, Lars Bengtsson	A Low-Power FIR Filter Using Combined Residue and Radix-2 Signed-Digit Representation.	DSD	2005	DBLP DOI BibTeX RDF
23	Justin Hensley, Anselmo Lastra, Montek Singh	A Scalable Counterflow-Pipelined Asynchronous Radix-4 Booth Multiplier.	ASYNC	2005	DBLP DOI BibTeX RDF
23	Mateus Fonseca, Eduardo A. C. da Costa, Sergio Bampi, José Monteiro 0001	Design of a radix-2m hybrid array multiplier using carry save adder format.	SBCCI	2005	DBLP DOI BibTeX RDF	hybrid multiplier, low power, carry save adder
23	David Money Harris, Ram Krishnamurthy 0001, Mark A. Anders 0001, Sanu Mathew, Steven Hsu	An Improved Unified Scalable Radix-2 Montgomery Multiplier.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
23	Fouad El-Aker	Fast In-place Integer Radix Sorting.	International Conference on Computational Science (3)	2005	DBLP DOI BibTeX RDF
23	Saad Bouguezel, M. Omair Ahmad, M. N. S. Swamy	An approach for computing the radix-2/4 DIT FHT and FFT algorithms using a unified structure.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
23	Saad Bouguezel, M. Omair Ahmad, M. N. S. Swamy	An efficient multidimensional decimation-in-frequency FHT algorithm based on the radix-2/4 approach.	ISCAS (3)	2005	DBLP DOI BibTeX RDF
23	Yi Wang 0016, Jussipekka Leiwo, Thambipillai Srikanthan	Efficient high radix modular multiplication for high-speed computing in re-configurable hardware [cryptographic applications].	ISCAS (2)	2005	DBLP DOI BibTeX RDF
23	Anup Savla, Jennifer Leonard, Arun Ravindran	Error Correction In Pipelined ADCS Using Arbitrary Radix Calibration.	VLSI Design	2004	DBLP DOI BibTeX RDF
23	Monk-Ping Leong, Philip Heng Wai Leong	A variable-radix digit-serial design methodology and its application to the discrete cosine transform.	IEEE Trans. Very Large Scale Integr. Syst.	2003	DBLP DOI BibTeX RDF
23	Tomás Lang, Elisardo Antelo	Radix-4 Reciprocal Square-Root and Its Combination with Division and Square Root.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	Combined division, reciprocal square root, exact rounding, staircase selection function, square root, digit-recurrence algorithm
23	Che-Hong Chen, Bin-Da Liu, Jar-Ferr Yang	Direct recursive structures for computing radix-r two-dimensional DCT.	ISCAS (4)	2003	DBLP DOI BibTeX RDF
23	Marc Joye, Sung-Ming Yen	New Minimal Modified Radix-r Representation with Applications to Smart Cards.	Public Key Cryptography	2002	DBLP DOI BibTeX RDF
23	Yi Yang, Chunyan Wang 0004, M. Omair Ahmad, M. N. S. Swamy	An FPGA implementation of an on-line radix-4 CORDIC 2-D IDCT core.	ISCAS (4)	2002	DBLP DOI BibTeX RDF
23	Amar Aggoun, A. Farwan, M. K. Ibrahim	A radix-2n vector inner product.	ISCAS (3)	2002	DBLP DOI BibTeX RDF