Search results for "cascode"

Hits ?▲	Authors	Title	Venue	Year	Link
18	H. Hahn, H. Yacoub, T. Zweipfennig, G. Lukens, Simon Kotzea, A. Debald, A. N. Oculak, Renato Negra, Holger Kalisch, Andrei Vescan	Novel approach for a monolithically integrated GaN cascode with minimized conduction and switching losses.	DRC	2018	DBLP DOI BibTeX RDF
18	Yan Lu 0002	A Reconfigurable Switched-Capacitor DC-DC Converter and Cascode LDO for Dynamic Voltage Scaling and High PSR.	APCCAS	2018	DBLP DOI BibTeX RDF
18	Kai-Yu Hu, Yu-Huang Chen, Heng-Ci Lin, Chien-Hung Tsai	Digital Buck Converter with Adaptive Driving Circuit for Cascode Power MOS.	GCCE	2018	DBLP DOI BibTeX RDF
18	Tong Yao, Rajapandian Ayyanar	A Multifunctional Double Pulse Tester for Cascode GaN Devices.	IEEE Trans. Ind. Electron.	2017	DBLP DOI BibTeX RDF
18	Chun-Chieh Chen, Yen-Chun Wang	A 2.4/5.2/5.8 GHz Triple-Band Common-Gate Cascode CMOS Low-Noise Amplifier.	Circuits Syst. Signal Process.	2017	DBLP DOI BibTeX RDF
18	Shirin Pourashraf, Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal	Super class AB OTA without open-loop gain degradation based on dynamic cascode biasing.	Int. J. Circuit Theory Appl.	2017	DBLP DOI BibTeX RDF
18	Reshma P. G., Varun P. Gopi, V. Suresh Babu, Khan A. Wahid	Analog CMOS implementation of FFT using cascode current mirror.	Microelectron. J.	2017	DBLP DOI BibTeX RDF
18	Luigi Colalongo, Anna Richelli, Pierluigi Cabinio, Zsolt Miklós Kovács-Vajna	A Bidirectional Differential Cascode Voltage Switch DC-DC Buck-Boost Converter for Low Voltage Application.	J. Low Power Electron.	2017	DBLP DOI BibTeX RDF
18	Sheng Xie, Sicong Wu, Luhong Mao, Haiou Li	A design methodology to extend bandwidth for regulated cascode transimpedance amplifier.	IEICE Electron. Express	2017	DBLP DOI BibTeX RDF
18	Young Jun Park, Fei Yuan 0005	1-1 MASH ΔΣ time-to-digital converter with differential cascode time integrator.	MWSCAS	2017	DBLP DOI BibTeX RDF
18	Giovanni Piccinni, Gianfranco Avitabile, Giuseppe Coviello, Claudio Talarico	A novel design optimization framework for regulated cascode transimpedance amplifiers.	ECCTD	2017	DBLP DOI BibTeX RDF
18	Lida Kouhalvandi, Sercan Aygün, Ece Olcay Günes, Mürvet Kirci	Design of a high gain telescopic-cascode operational amplifier based on the ZTC operation condition.	ICECS	2017	DBLP DOI BibTeX RDF
18	Lida Kouhalvandi, Sercan Aygün, Ece Olcay Günes, Mürvet Kirci	An improved 2 stage opamp with rail-to-rai! gain-boosted folded cascode input stage and monticelli rail-to-rail class AB output stage.	ICECS	2017	DBLP DOI BibTeX RDF
18	Rahul Sreekumar, Mehdi Nasrollahpour, Sotoudeh Hamedi-Hagh	Cascode Stage Based LNA for Bluetooth Applications in 45 nm CMOS Technology.	NGCAS	2017	DBLP DOI BibTeX RDF
18	Chun-hsiang Chang, Marvin Onabajo	Low-power low-noise amplifier IIP3 improvement under consideration of the cascode stage.	ISCAS	2017	DBLP DOI BibTeX RDF
18	Qi Cheng 0005, Weimin Li, Xian Tang, Jianping Guo	A cascode miller compensated three-stage amplifier with local Q-factor control for wide capacitive load applications.	ISCAS	2017	DBLP DOI BibTeX RDF
18	Wenhui Li, Awei Zhang, Weiwei Chen	Design of a voltage-tunable pre-emphasis circuit utilizing a pseudo-differential cascode architecture.	ASICON	2017	DBLP DOI BibTeX RDF
18	Antaryami Panigrahi, Abhipsa Parhi	A 1.8 V Gain Enhanced Fully Differential Doubly-Recycled Cascode OTA with 100 dB Gain 200 MHz UGB in CMOS.	VDAT	2017	DBLP DOI BibTeX RDF
18	Nikhil Raj, Ashutosh Kumar Singh 0001, Anil Kumar Gupta	Low Voltage High Output Impedance Bulk-Driven Quasi-Floating Gate Self-Biased High-Swing Cascode Current Mirror.	Circuits Syst. Signal Process.	2016	DBLP DOI BibTeX RDF
18	Rafael Assalti, Lígia Martins d'Oliveira, Marcelo Antonio Pavanello, Denis Flandre, Michelly de Souza	Experimental and simulation analysis of electrical characteristics of common-source current mirrors implemented with asymmetric self-cascode silicon-on-insulator n-channel metal-oxide-semiconductor field-effect transistors.	IET Circuits Devices Syst.	2016	DBLP DOI BibTeX RDF
18	Mohamed Ben-Esmael, Mary Mathew, Bryan L. Hart, Khaled Hayatleh	Technique for Increasing the Output Impedance of CMOS Regulated Cascode Circuits.	J. Circuits Syst. Comput.	2016	DBLP DOI BibTeX RDF
18	S. Kumaravel 0001, Anand Kukde, B. Venkataramani, R. Raja	A high linearity and high gain Folded Cascode LNA for narrowband receiver applications.	Microelectron. J.	2016	DBLP DOI BibTeX RDF
18	Nikhil Raj, Ashutosh Kumar Singh 0001, Anil Kumar Gupta	Low voltage high performance bulk driven quasi-floating gate based self-biased cascode current mirror.	Microelectron. J.	2016	DBLP DOI BibTeX RDF
18	Tripurari Sharan, Vijaya Bhadauria	Sub-threshold, cascode compensated, bulk-driven OTAs with enhanced gain and phase-margin.	Microelectron. J.	2016	DBLP DOI BibTeX RDF
18	Bishnu Prasad De, Rajib Kar, Durbadal Mandal, Sakti Prasad Ghoshal	An efficient design of CMOS comparator and folded cascode op-amp circuits using particle swarm optimization with an aging leader and challengers algorithm.	Int. J. Mach. Learn. Cybern.	2016	DBLP DOI BibTeX RDF
18	Ananiah Durai Sundararajan, S. M. Rezaul Hasan	Quadruply Split Cross-Driven Doubly Recycled gm-Doubling Recycled Folded Cascode for Microsensor Instrumentation Amplifiers.	IEEE Trans. Circuits Syst. II Express Briefs	2016	DBLP DOI BibTeX RDF
18	Zi-Peng Bian, Ming-Ming Zhang, Hsien-Shun Wu, Ching-Kuang C. Tzuang	22-27 GHz 11 dB inductive feedback cascode amplifier with 12 picoseconds group delay variation.	IEICE Electron. Express	2016	DBLP DOI BibTeX RDF
18	Mario Iannazzo, Eduard Alarcón, Himadri Pandey, Vikram Passi, Max C. Lemme	CVD graphene-FET based cascode circuits: A design exploration and fabrication towards intrinsic gain enhancement.	ESSDERC	2016	DBLP DOI BibTeX RDF
18	Po-Yu Kuo, Gang-Jhih Fan, Sheng-Da Tsai	The enhancement of recycling folded cascode amplifier.	ICCE-TW	2016	DBLP DOI BibTeX RDF
18	Ashish Joshi, Indu Yadav, Satinder K. Sharma, Hitesh Shrimali	The pole-zero doublet: A cascode operational amplifier with cross coupled capacitor.	MWSCAS	2016	DBLP DOI BibTeX RDF
18	Lim Nguyen	Folded cascode current source with dual mirrors current feedback.	MWSCAS	2016	DBLP DOI BibTeX RDF
18	Diaa Abd-elrahman, Mohamed Atef, Guoxing Wang	10 Gb/s 1.95 mW active cascode transimpedance amplifier for high speed optical receivers.	MWSCAS	2016	DBLP DOI BibTeX RDF
18	Nikolay N. Prokopenko, Ilya V. Pakhomov, A. V. Bugakova, Nikolay V. Butyrlagin	The method of speeding of the operational amplifiers based on the folded cascode.	EWDTS	2016	DBLP DOI BibTeX RDF
18	Fernanda D. V. R. Oliveira, Tiago M. de F. Lopes, José Gabriel Rodríguez Carneiro Gomes, Fernando Antonio Pinto Barúqui, Antonio Petraglia	Focal-plane image encoder with cascode current mirrors and increased vector quantization bit rate.	SBCCI	2016	DBLP DOI BibTeX RDF
18	Qi Cheng 0005, Hong Zhang, Lizhong Xue, Jianping Guo	A 1.2-V 43.2-μW three-stage amplifier with cascode miller-compensation and Q-reduction for driving large capacitive load.	ISCAS	2016	DBLP DOI BibTeX RDF
18	Mehran Nazari, Reza Rezaei Siahrood, Javad Yavand Hassani, Alireza Farahani	Design of a wideband low noise amplifier using modified cascode structure for 45GHz band applications.	IST	2016	DBLP DOI BibTeX RDF
18	Jusang Park, Junho Yu, Sehyuk Ann, Namsoo Kim	CMOS cascode structure current reference for low power temperature sensor.	SSD	2016	DBLP DOI BibTeX RDF
18	Shibang Lin, Dejian Liang, Yuan Cao 0003, Xiaofang Pan, Xiaojin Zhao	A low power and compact physical unclonable function based on the cascode current mirrors.	APCCAS	2016	DBLP DOI BibTeX RDF
18	Kriangkrai Sooksood	Wide current range and high compliance-voltage bulk-driven current mirrors: Simple and cascode.	APCCAS	2016	DBLP DOI BibTeX RDF
18	Min Tan 0004, Wing-Hung Ki	A Cascode Miller-Compensated Three-Stage Amplifier With Local Impedance Attenuation for Optimized Complex-Pole Control.	IEEE J. Solid State Circuits	2015	DBLP DOI BibTeX RDF
18	Jian Kang Li, Yong-Zhong Xiong, Yihu Li, Wen Wu	Analysis and Optimization of Cascode Structure in Power Amplifier for X-Band Phase Array Radar Application.	Circuits Syst. Signal Process.	2015	DBLP DOI BibTeX RDF
18	Meysam Akbari, Omid Hashemipour	High Gain and High CMRR Two-Stage Folded Cascode OTA with Nested Miller Compensation.	J. Circuits Syst. Comput.	2015	DBLP DOI BibTeX RDF
18	Urvashi Singh, Maneesha Gupta, Richa Srivastava	A new wideband regulated cascode amplifier with improved performance and its application.	Microelectron. J.	2015	DBLP DOI BibTeX RDF
18	Carmelo Zuccarotto, Anna Richelli, Zsolt Miklós Kovács-Vajna	Design of a Low Voltage High Symmetrical Slew Rate Opamp Based on Self Cascode in UMC 0.18 μm.	J. Low Power Electron.	2015	DBLP DOI BibTeX RDF
18	Anna Richelli, Gilbert Matig-a, Jean-Michel Redoute	Design of a folded cascode opamp with increased immunity to conducted electromagnetic interference in 0.18 μm CMOS.	Microelectron. Reliab.	2015	DBLP DOI BibTeX RDF
18	Fernanda D. V. R. Oliveira, José Gabriel Rodríguez Carneiro Gomes, Antonio Petraglia	Influence of cascode and simple current mirrors in inner product implementations for CMOS imagers.	LASCAS	2015	DBLP DOI BibTeX RDF
18	Sammy Cerida, Erick Raygada, Carlos Silva, Manuel Monge	A low-noise fully differential recycling folded cascode neural amplifier.	LASCAS	2015	DBLP DOI BibTeX RDF
18	Stone Cheng, Po-Chien Chou	Power conditioning applications of 700V GaN-HEMTs cascode switch.	IECON	2015	DBLP DOI BibTeX RDF
18	Ning Zhang, Zhao Lin, Liang Hong, Yunyu Tang, Hao Ma 0002	An improved analytical model of GaN HEMT in cascode configuration during turn-on transition.	ISIE	2015	DBLP DOI BibTeX RDF
18	María de Rodanas Valero Bernal, Antonio J. López-Martín, Shanta Thoutam, Jaime Ramírez-Angulo, Ramón González Carvajal	Class AB two stage and folded cascode OpAmps based on a squaring circuit.	ISCAS	2015	DBLP DOI BibTeX RDF
18	Moaaz Ahmed, Ikramullah Shah, Fang Tang, Amine Bermak	An improved recycling folded cascode amplifier with gain boosting and phase margin enhancement.	ISCAS	2015	DBLP DOI BibTeX RDF
18	Xu Zhang, Chongli Cai, Degang Chen 0001, Gregory Blum	Cascode and transconductance with capacitances feedback compensation for multistage amplifiers driving no load and 1nF capacitive load.	ISCAS	2015	DBLP DOI BibTeX RDF
18	Yuki Takagi, Yoichiro Takayama, Ryo Ishikawa, Kazuhiko Honjo	A High-Efficiency Low-Distortion Cascode Power Amplifier Consisting of Independently Biased InGaP/GaAs HBTs.	IEICE Trans. Electron.	2014	DBLP DOI BibTeX RDF
18	Umakanta Nanda, Debiprasad Priyabrata Acharya, Sarat Kumar Patra	A New Transmission Gate Cascode Current Mirror Charge Pump for Fast Locking Low Noise PLL.	Circuits Syst. Signal Process.	2014	DBLP DOI BibTeX RDF
18	Gholamreza Nikandish, A. Yousefi, Ali Medi	Stability analysis of broadband cascode amplifiers in the presence of inductive parasitic components.	IET Circuits Devices Syst.	2014	DBLP DOI BibTeX RDF
18	Pui-In Mak, Miao Liu, Yaohua Zhao, Rui Paulo Martins	Enhancing the performances of recycling folded cascode OpAmp in nanoscale CMOS through voltage supply doubling and design for reliability.	Int. J. Circuit Theory Appl.	2014	DBLP DOI BibTeX RDF
18	Wen Wang, Chunhua Wang 0001	Capacitor Cross-Coupled Fully-differential CMOS Folded Cascode LNAs with Ultra Low Power Consumption.	Wirel. Pers. Commun.	2014	DBLP DOI BibTeX RDF
18	Jack Ou, Pietro M. Ferreira	A gm/ID-Based Noise Optimization for CMOS Folded-Cascode Operational Amplifier.	IEEE Trans. Circuits Syst. II Express Briefs	2014	DBLP DOI BibTeX RDF
18	Kim B. Ostman, Jani K. Jarvenhaara, Svetozar S. Broussev, Ismo Viitaniemi	A 3.6-to-1.8-V Cascode Buck Converter With a Stacked LC Filter in 65-nm CMOS.	IEEE Trans. Circuits Syst. II Express Briefs	2014	DBLP DOI BibTeX RDF
18	Gilberto Curatola, Andreas Kassmanhuber, Sergey Yuferev, Jörg Franke, Gianmauro Pozzovivo, Simone Lavanga, Gerhard Prechtl, Thomas Detzel, Oliver Haeberlen	GaN virtual prototyping: From traps modeling to system-level cascode optimization.	ESSDERC	2014	DBLP DOI BibTeX RDF
18	Abdelkader Taibi, Abdelhalim Slimane, Sid-Ahmed Tedjini-Bailiche, Mohand-Tahar Belaroussi, Djabar Maafri, Mohamed Trabelsi 0002	A 0.9 V low power reconfigurable CMOS folded cascode LNA for multi-standard wireless applications.	IDT	2014	DBLP DOI BibTeX RDF
18	Ricardo Povoa, Nuno Lourenço 0003, Nuno Horta, Rui Santos-Tavares, João Goes	A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner.	ICECS	2014	DBLP DOI BibTeX RDF
18	Vincent Binet, Francois Amiard, Emmanuel Allier, Simon Valcin, Angelo Nagari	A fully integrated Class-D amplifier in 40nm CMOS with dynamic cascode bias and load current sensing.	ESSCIRC	2014	DBLP DOI BibTeX RDF
18	Nazif Emran Farid, Siti Maisurah Mohd Hassan, Rasidah Sanusi	A 0.13µm CMOS double-cascode power amplifier driver for a 40 GHz radio-over-fiber system.	WPMC	2014	DBLP DOI BibTeX RDF
18	Sreehari Rao Patri, Suresh Alapati, Surendra Chowdary, K. S. R. Krishna Prasad	250mA ultra low drop out regulator with high slew rate double recycling folded cascode error amplifier.	VDAT	2014	DBLP DOI BibTeX RDF
18	Marco Ho, Shi Bu, Yanqi Zheng, Ka Nang Leung, Jianping Guo	A 124-dB double-gain-boosted cascode amplifier with 92% rail-to-rail output swing.	APCCAS	2014	DBLP DOI BibTeX RDF
18	Hiroo Wakaumi	A folded-cascode OP Amp with a dynamic switching bias circuit.	APCCAS	2014	DBLP DOI BibTeX RDF
18	Cheng Li, Samuel Palermo	A Low-Power 26-GHz Transformer-Based Regulated Cascode SiGe BiCMOS Transimpedance Amplifier.	IEEE J. Solid State Circuits	2013	DBLP DOI BibTeX RDF
18	Hao Zhang 0087, Mengshu Huang, Yimeng Zhang, Tsutomu Yoshihara	Self-Cascode MOSFET with a Self-Biased Body Effect for Ultra-Low-Power Voltage Reference Generator.	IEICE Trans. Electron.	2013	DBLP DOI BibTeX RDF
18	Mohamed Ben-Esmael, F. J. Lidgey, Khaled Hayatleh, Bryan L. Hart	Gain-Bandwidth Trade-Off in the CMOS Cascode amplifier.	J. Circuits Syst. Comput.	2013	DBLP DOI BibTeX RDF
18	S. Manjula, D. Selvathi 0001	Design of Low Power 2.4GHz CMOS Cascode LNA with Reduced Noise Figure for WSN Applications.	Wirel. Pers. Commun.	2013	DBLP DOI BibTeX RDF
18	Chunbao Ding, Wanrong Zhang 0002, Dongyue Jin, Hongyun Xie, Yanxiao Zhao, Qiang Fu, Jiaxin Ju	An inductorless high linear UWB Cascode LNA with tunable active resistance feedback and post-linearization technique.	Microelectron. J.	2013	DBLP DOI BibTeX RDF
18	Hamed Aminzadeh, Mohammad Danaie, Wouter A. Serdijn	Hybrid cascode feedforward compensation for nano-scale low-power ultra-area-efficient three-stage amplifiers.	Microelectron. J.	2013	DBLP DOI BibTeX RDF
18	Bhawna Aggarwal, Maneesha Gupta, Anil Kumar Gupta	Analysis of low voltage bulk-driven self-biased high swing cascode current mirror.	Microelectron. J.	2013	DBLP DOI BibTeX RDF
18	Reza Faghih Mirzaee, Tooraj Nikoubin, Keivan Navi, Omid Hashemipour	Differential Cascode Voltage Switch (DCVS) Strategies by CNTFET Technology for Standard Ternary Logic.	Microelectron. J.	2013	DBLP DOI BibTeX RDF
18	Lei Yan, Tom K. Johansen	Design of InP DHBT power amplifiers at millimeter-wave frequencies using interstage matched cascode technique.	Microelectron. J.	2013	DBLP DOI BibTeX RDF
18	S. M. Rezaul Hasan	A 0.8V 40 Gb/s Novel CMOS Regulated Cascode Trans-impedance Amplifier for Optical Sensing Applications.	J. Signal Process. Syst.	2013	DBLP DOI BibTeX RDF
18	Daniel Sira, Torben Larsen	Process, Voltage and Temperature Compensation Technique for Cascode Modulated PAs.	IEEE Trans. Circuits Syst. I Regul. Pap.	2013	DBLP DOI BibTeX RDF
18	P. V. Ananda Mohan	Comments on "Noise Performance of a Regulated Cascode Transimpedance Amplifier for Radiation Detectors".	IEEE Trans. Circuits Syst. I Regul. Pap.	2013	DBLP DOI BibTeX RDF
18	Yeo Myung Kim, Hong Gul Han, Tae Wook Kim	A 0.6-V +4 dBm IIP3 LC Folded Cascode CMOS LNA With gm Linearization.	IEEE Trans. Circuits Syst. II Express Briefs	2013	DBLP DOI BibTeX RDF
18	Zhichao Zhang, Muhammad Raashid Khan, Anh Dinh, Li Chen 0001	A high linear broadband cascode LNA employing common-gate linearity enhancing technology.	IEICE Electron. Express	2013	DBLP DOI BibTeX RDF
18	Ehsan Kargaran, Yasser Mafinejad, Khalil Mafinezhad, Hooman Nabovati	A new gm-boosting current reuse CMOS folded cascode LNA.	IEICE Electron. Express	2013	DBLP DOI BibTeX RDF
18	Mohamed Atef, Hong Chen, Horst Zimmermann	10Gb/s inverter based cascode transimpedance amplifier in 40nm CMOS technology.	DDECS	2013	DBLP DOI BibTeX RDF
18	Hsuan-Ling Kao, Chih-Sheng Yeh, Cheng-Lin Cho, B. W. Wang, P. C. Lee, B. H. Wei, Hsien-Chin Chiu	Design of an S-band 0.35 µm AlGaN/GaN LNA using cascode topology.	DDECS	2013	DBLP DOI BibTeX RDF
18	Hong-Yi Huang, Cheng-Yu Chen, Kuo-Hsing Cheng	External capacitorless low dropout linear regulator using cascode structure.	DDECS	2013	DBLP DOI BibTeX RDF
18	Elton N. Lima, José Luis Cura, Luis Nero Alves	Folded-cascode transimpedance amplifiers employing a CMOS inverter as input stage.	ECCTD	2013	DBLP DOI BibTeX RDF
18	Philip J. Garsed, Richard A. McMahon	Optimising the dynamic performance of an all-wide-bandgap cascode switch.	IECON	2013	DBLP DOI BibTeX RDF
18	Giuseppe Sorrentino, Maurizio Melito, Alfonso Patti, Giovanni Parrino, Angelo Raciti	GaN HEMT devices: Experimental results on normally-on, normally-off and cascode configuration.	IECON	2013	DBLP DOI BibTeX RDF
18	Siva V. Thyagarajan, Ali M. Niknejad, Christopher D. Hull	A 60 GHz linear wideband power amplifier using cascode neutralization in 28 nm CMOS.	CICC	2013	DBLP DOI BibTeX RDF
18	Young-Ho Kim, Sang-Soo Lee	A 72dBO 11.43mA novel CMOS regulated cascode TIA for 3.125Gb/s optical communications.	SoCC	2013	DBLP DOI BibTeX RDF
18	Nuno Pereira 0002, Luís Bica Oliveira, João Goes	Design of Cascode-Based Transconductance Amplifiers with Low-Gain PVT Variability and Gain Enhancement Using a Body-Biasing Technique.	DoCEIS	2013	DBLP DOI BibTeX RDF
18	Nuno Pereira 0002, Luís B. Oliveira, João Goes, João Pedro Oliveira 0003	Cascode amplifiers with low-gain variability using body-biasing temperature and supply compensation.	MIXDES	2013	DBLP BibTeX RDF
18	Sau Siong Chong, Pak Kwong Chan	Cross Feedforward Cascode Compensation for Low-Power Three-Stage Amplifier With Large Capacitive Load.	IEEE J. Solid State Circuits	2012	DBLP DOI BibTeX RDF
18	Zhisheng Li, Johan Bauwelinck, Guy Torfs, Xin Yin, Jan Vandewege	A New Common-Mode Stabilization Method for a CMOS Cascode Class-E Power Amplifier with Driver Stage.	IEICE Trans. Electron.	2012	DBLP DOI BibTeX RDF
18	Fabian Khateb, Nabhan Khatib, David Kubánek	Novel Ultra-Low-Power Class AB CCII+ Based on Floating-Gate Folded Cascode OTA.	Circuits Syst. Signal Process.	2012	DBLP DOI BibTeX RDF
18	Ruey-Lue Wang, Yan-Kuin Su, Hung-Hsi Chien, Chung-Chin Chuang, Hsu-Feng Hsiao, Chih-Ho Tu, Ying-Zong Juang	A concurrent dual-band folded-cascode mixer using a LC-tank biasing circuit.	Microelectron. J.	2012	DBLP DOI BibTeX RDF
18	Chunbao Ding, Wanrong Zhang 0002, Dongyue Jin, Hongyun Xie, Pei Shen, Liang Chen	A Novel Low Power UWB Cascode SiGe BiCMOS LNA with Current Reuse and Zero-Pole Cancellation	CoRR	2012	DBLP BibTeX RDF
18	Ralf Siemieniec, Gerhard Nöbauer, Daniel Domes	Stability and performance analysis of a SiC-based cascode switch and an alternative solution.	Microelectron. Reliab.	2012	DBLP DOI BibTeX RDF
18	ZiJie Hu, Koen Mouthaan	Design and Stability Analysis of a Low-Voltage Subharmonic Cascode FET Mixer.	IEEE Trans. Circuits Syst. II Express Briefs	2012	DBLP DOI BibTeX RDF
18	Luís B. Oliveira, Carlos M. Leitao, Manuel Medeiros Silva	Noise Performance of a Regulated Cascode Transimpedance Amplifier for Radiation Detectors.	IEEE Trans. Circuits Syst. I Regul. Pap.	2012	DBLP DOI BibTeX RDF