Search results for "set-associative"

Found 211 publication records. Showing 211 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
7	Philip P. Shirvani, Edward J. McCluskey	PADded Cache: A New Fault-Tolerance Technique for Cache Memories.	VTS	1999	DBLP DOI BibTeX RDF
7	Larry Carter, Kang Su Gatlin	Towards an Optimal Bit-Reversal Permutation Program.	FOCS	1998	DBLP DOI BibTeX RDF	Transpose, Cache, FFT, Memory hierarchy, Permutations
7	Ernesto Damiani, Valentino Liberali, Andrea Tettamanzi	Evolutionary Design of Hashing Function Circuits Using an FPGA.	ICES	1998	DBLP DOI BibTeX RDF
7	Ramon Doallo, Basilio B. Fraguela, Emilio L. Zapata	Cache Probabilistic Modeling for Basic Sparse Algebra Kernels Involving Matrices with a Non Uniform Distribution.	EUROMICRO	1998	DBLP DOI BibTeX RDF
7	Liuxi Yang, Josep Torrellas	Speeding up the Memory Hierarchy in Flat COMA Multiprocessors.	HPCA	1997	DBLP DOI BibTeX RDF	cache-only memory architectures, cache coherence protocols, cache hierarchies, scalable shared-memory multiprocessors
7	Thomas J. Murray 0002, A. Wayne Madison, James Westall	Lookahead page placement.	ACM Southeast Regional Conference	1995	DBLP DOI BibTeX RDF
7	Carlos Montemayor, Marie Sullivan, Jen-Tien Yen, Pete Wilson, Richard Evers, K. R. Kishore	The PowerPC 603e microprocessor: an enhanced, low-power, superscalar microprocessor.	ICCD	1995	DBLP DOI BibTeX RDF	PowerPC 603e microprocessor, low-power superscalar microprocessor, portable products, on-chip instruction, cache associativity, bus modes, 120 SPECint92, 105 SPECfp92, die size, software controllable power-down modes, power saving capability, 16 Kbyte, performance evaluation, performance, computer architecture, system design, power consumption, data cache, cache storage, microprocessor chips, frequency, system buses, portable computers, portable computers, transistors, 100 MHz
7	Lishing Liu	Cache designs with partial address matching.	MICRO	1994	DBLP DOI BibTeX RDF
7	Brian N. Bershad, Dennis Lee 0001, Theodore H. Romer, J. Bradley Chen	Avoiding Conflict Misses Dynamically in Large Direct-Mapped Caches.	ASPLOS	1994	DBLP DOI BibTeX RDF
7	Lishing Liu, Jih-Kwon Peir	Cache sampling by sets.	IEEE Trans. Very Large Scale Integr. Syst.	1993	DBLP DOI BibTeX RDF
7	Wen-Hann Wang, Jean-Loup Baer	Efficient Trace-Driven Simulation Methods for Cache Performance Analysis.	SIGMETRICS	1990	DBLP DOI BibTeX RDF

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